JP4529614B2 - Method for manufacturing printed wiring board - Google Patents

Description

The present invention relates to a method for manufacturing a printed wiring board with a built-in passive element, and more particularly to a method for manufacturing a printed wiring board with a built-in resistance element that is excellent in productivity and economy and has little variation in characteristics.

  In recent years, with the demand for higher performance and smaller size of electronic devices, the density and functionality of circuit components have been further increased. For example, when electronic components are mounted on a printed wiring board, passive elements such as an inductor element (L), a capacitor element (C), and a resistance element (R) are used to increase the mounting density and provide a noise reduction function. A printed wiring board having a structure built in the substrate is used.

  For such a printed wiring board, a famous forming method by LCR batch firing on a ceramic substrate has been used for a long time from the viewpoint of incorporating passive elements in the substrate (for example, see Patent Document 1).

  However, the formation method by batch firing has problems in terms of productivity and cost. In addition, passive elements including semiconductors and organic substances cannot be built in the formation method by firing. For this reason, in a ceramic substrate, a part cannot be mounted on the upper part of the part where a built-in gap is made, so that a three-dimensional connection cannot be made and there is a limit to increasing the density. Further, when a ceramic substrate is used, the connection between the layers is made via vias sintered with a high resistance metal such as tungsten or molybdenum, so that the connection resistance becomes relatively large. This is a serious problem in a circuit such as a power supply that wants to suppress loss due to resistance.

  On the other hand, not only a formation method by baking but also an attempt to sequentially stack high-precision LCRs on a circuit board by applying a semiconductor process such as a spin coating method or physical etching by laser irradiation or the like. That is, this is a system in which an insulating layer and a conductor layer are sequentially stacked.

  However, an attempt to sequentially stack high-precision LCRs on a circuit board lacks versatility and requires expensive equipment in terms of process.

  Therefore, as a method that is versatile, inexpensive, and economical, a method of manufacturing a printed wiring board by incorporating an LCR in a resin substrate is widely used.

  For example, as a method of forming the inductor element (L) on the resin substrate, there is a method of forming a coil pattern by patterning a conductor circuit (see, for example, Patent Document 2). In addition, as a method for forming a dielectric layer of the capacitor element (C) on the resin substrate, a thin dielectric layer is formed using a highly filled filler having a high dielectric constant in the resin, and the capacitor is built in. There is a method (for example, refer to Patent Document 3). In addition, as a method of forming the resistance element (R) on the resin substrate, there is a method of forming a resistance element by screen printing a resistor paste in which carbon black is dispersed in a resin.

  By the way, multilayer printed wiring boards with improved mounting efficiency are generally manufactured by imposing a plurality of identical products on a relatively large substrate from the viewpoint of obtaining excellent productivity, and each product is manufactured in the final manufacturing process. It is preferable to cut into small pieces.

  Therefore, for the printed wiring board that is versatile and excellent in economic efficiency, it is also possible to obtain excellent productivity by imposing a plurality of identical products on a relatively large base material. It is preferable from the viewpoint.

  From the viewpoint of obtaining such excellent productivity and economic efficiency, printed wiring boards are manufactured by printing built-in passive elements on a resin substrate using screen printing that can form multiple products on a large substrate by printing. How to do is being studied.

In particular, as a method of forming a resistance element (R) that is one of passive elements, a step of forming first and second copper-based metal layers on an electrically insulating substrate, and a step of forming first and second copper-based metal layers A step of printing an undercoat layer on the substrate, a step of forming a silver plating layer on the surfaces of the first and second copper-based metal layers, and a first and second copper-based metal layer having a silver plating layer A method of manufacturing a printed wiring board having a step of printing an electric resistor between the two is disclosed (for example, see Patent Document 4).
JP 2001-85839 A JP 2003-142832 A JP 2002-176266 A Japanese Patent Laid-Open No. 11-4056

  However, in the method for manufacturing a printed wiring board described in Patent Document 4, electrical resistors are printed on the silver plating layers on the first and second copper-based metal layers and on the undercoat layer therebetween. The resistance value varies due to the variation in the printing shape (low printing accuracy) caused by the level difference of the copper-based metal layer portion. Therefore, there is a problem that the control of the resistance value becomes very difficult and the characteristics vary.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a method for manufacturing a printed wiring board having a built-in resistance element that is excellent in productivity and economy and has little variation in characteristics.

The invention corresponding to claim 1 is embedded in the surface of the insulating layer so as to be separated from each other so that the surface is exposed smoothly from the substrate, the insulating layer formed on the substrate, and the insulating layer. A pair of conductive layers, a pair of wiring layers selectively formed on the insulating layer so as to partially overlap each of the conductive layers, and the conductive layers are electrically connected. In the method of manufacturing a printed wiring board including at least a part of each conductive layer and a part of the insulating layer, the pair of conductive layers is formed on the metal layer. A step, a step of disposing the insulating layer on the substrate, a step of laminating the metal layer on the insulating layer so as to embed each conductive layer on the surface of the insulating layer, and the laminated metal layer Are selectively etched into the pair of conductive layers. Forming the pair of wiring layers in contact with each other, exposing the surface of each conductive layer and the surface of the insulating layer between the respective wiring layers smoothly, and electrically connecting each conductive layer As described above, there is provided a method for manufacturing a printed wiring board comprising a step of forming the resistor by screen printing on at least a part of each conductive layer and a part of the insulating layer .

The invention corresponding to claim 2 is the method for manufacturing a printed wiring board corresponding to claim 1, wherein each of the wiring layers is made of a metal having an etching rate higher than that of each of the conductive layers and the insulating layer. It is a manufacturing method of a printed wiring board.

<Action>
Accordingly, the invention corresponding to claim 1 is provided with a pair of conductive layers embedded so that the surface is exposed to the surface of the insulating layer smoothly by taking the above-described means. Since the resistor can be printed on a smooth surface, variation in characteristics can be reduced. Further, since the resistor is formed by screen printing, it is excellent in productivity and economy. Therefore, it is possible to provide a printed wiring board having a built-in resistance element that is excellent in productivity and economy and has little variation in characteristics.

  In the invention corresponding to claim 2, each wiring layer is a metal that is easier to be etched than each conductive layer and insulating layer. Therefore, in addition to the operation corresponding to claim 1, each conductive layer is electrically conductive even when each wiring layer is formed by etching. The layer and the insulating layer are not etched, and it becomes easy to form a smooth surface.

The invention corresponding to claim 1 forms a pair of conductive layers on a metal layer, disposes the insulating layer on the substrate, and embeds each conductive layer on the surface of the insulating layer so that the metal layer is formed on the insulating layer. Since the stacked metal layers are etched in a vacuum, it is easy to form a pair of conductive layers embedded so that the surface is exposed smoothly with respect to the surface of the insulating layer. Therefore, since the resistor can be printed on a smooth surface, it is possible to reduce variations in printing. Further, since the resistor is formed by screen printing, it is excellent in productivity and economy. Therefore, it is possible to provide a method for manufacturing a printed wiring board having a built-in resistance element that is excellent in productivity and economy and has little variation in characteristics.

As described above, according to the present invention, it is possible to provide a method for manufacturing a printed wiring board having a built-in resistance element that is excellent in productivity and economy and has little variation in characteristics.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
<First Embodiment>
FIG. 1 is a cross-sectional view showing an example of the structure of a printed wiring board according to the first embodiment of the present invention. The printed wiring board 10 has a pair of conductive layers 30A and 30B embedded so that the surface is exposed smoothly to the surface of the insulating layer 20, and a part of each of the conductive layers 30A and 30B individually overlaps. Resistors formed by screen printing on a pair of first wiring layers 40A and 40B formed on the conductive layer and a part of each conductive layer and a part of the insulating layer so as to electrically connect the conductive layers. The build-up layer including the body 50 is connected to the second wiring layers 80A and 80B on the substrate 70 through the through-hole plating 60.

  Here, the insulating layer 20 is formed on the substrate 70 via the second wiring layers 80A and 80B, and the conductive layers 30A and 30B are embedded on the surface opposite to the substrate 70. As a material of the prepreg used here, for example, a glass fiber impregnated with an epoxy resin, a glass fiber impregnated with a polyimide resin, or a paper impregnated with a phenol resin is used. Further, bismaleimide triazine resin, benzocyclobutene resin, liquid crystal polymer, and the like are also applicable.

  The conductive layers 30A and 30B are electrodes embedded in the surface of the insulating layer 20 so as to be separated from each other, partly formed so as to be in contact with the first wiring layers 40A and 40B, respectively, and electrically connected to the resistor 50. Connected. As a material of this electrode, any conductive paste can be used as long as it can form a pattern by a printing method. For example, gold paste, platinum paste, silver paste, copper paste, nickel paste, palladium paste and the like can be mentioned. Among them, a silver paste that is not easily oxidized in air and is relatively inexpensive is particularly preferable. In addition, the conductive layers 30A and 30B are not limited to a formation method in which a conductive paste is stacked and patterned by screen printing or the like, and may be formed by a method in which unnecessary portions are removed after the entire surface is stacked by plating or the like.

  The wiring layers 40A and 40B are formed by etching a metal layer 40, which will be described later, and constitute the wiring of the printed wiring board. Further, a part is formed so as to be in contact with the conductive layers 30A and 30B, respectively. The material of the metal layer 40 may be any material as long as it is suitable for this manufacturing method. In particular, the metal layer 40 is resistant to chemicals used and can be finally removed by etching or peeling. Preferably there is. Here, the metal layer 40 is made of a metal having an etching rate higher than that of the conductive layers 30A and 30B and the insulating layer 20 from the viewpoint that the conductive layers 30A and 30B are not etched (difficulty) when the metal layer 40 is patterned. ing. Examples of the material of the metal layer 40 include copper, copper alloy, 42 alloy, nickel, and the like. In particular, a copper foil, a copper plate, and a copper alloy are preferable because not only electrolytic plated products and rolled products can be selected, but also various thicknesses can be easily obtained.

  The resistor 50 has a function of a resistor that is electrically connected to each of the conductive layers 30A and 30B. As a material of the resistor 50, for example, a resistor paste in which a filler such as carbon is dispersed and kneaded in an epoxy resin or a phenol resin is preferable.

  The through-hole plating 60 is a plating layer applied to the surface of the through-hole 61 formed in the printed wiring board 10 and electrically connects the first wiring layers 40A and 40B and the second wiring layers 80A and 80B. . When a multilayer printed wiring board is formed, the wiring layers formed for each layer are electrically connected.

  The substrate 70 is a resin substrate on which second wiring layers 80A and 80B are selectively formed in advance. A core substrate having glass fibers or the like as a core may be used, or a metal layer or the like that can be removed and finally removed. In the first embodiment, one having a core is selected. Here, the second wiring layers 80 </ b> A and 80 </ b> B are circuit wirings selectively formed on the substrate 70 in advance.

  Here, the passive element formed on the insulating layer 20 is referred to as a passive function unit 90. The passive function unit 90 includes a functional body such as a resistor and a dielectric and at least two conductor circuits in contact with the functional body, and functions between a pair of conductor circuits formed in the same layer. There are a planar structure in which a body is formed and a three-layer structure having a structure of conductor / functional body / conductor in the thickness direction. When the functional body is a resistor, the passive element is a resistive element, and when the functional body is a dielectric, it is a capacitor element. In the case of forming a resistance element, it is preferable to have a planar structure with few formation processes.

  In FIG. 1, the passive function unit 90 corresponds to a resistance element having a planar structure of a functional body (resistor 50) and conductors 30A and 30B positioned between the paired first wiring layers 40A and 40B. . When the passive function unit 90 is a resistance element, the electrical characteristics of the conductors 30A and 30B and the function body (resistor 50) are the thickness, cross-sectional area, shape, resistivity, and the first wiring pair. It is determined by the distance between the layers 40A and 40B, the contact area with the conductors 30A and 30B, the shape, and the like, and the resistance value (Ω) can be adjusted by adjusting them.

  Next, an example of the manufacturing method of the printed wiring board comprised as mentioned above is demonstrated using FIG.

  First, patterned conductive layers 30A and 30B are printed on the metal layer 40 (FIGS. 2A and 2B).

  At this time, separately from the step of forming the conductive layers 30A and 30B, the substrate 70 having the second wiring layers 80A and 80B formed in advance on the surface is prepared.

  Then, the insulating layer 20 is disposed on the substrate 70, and the metal layer 40 is overlapped with the insulating layer 20 so as to embed the conductive layers 30A and 30B on the surface of the insulating layer 20, and vacuum lamination is performed (FIG. 2C). ). At this time, the metal layer 40 and the substrate 70 are aligned by previously forming a through hole (not shown) in a part of the surface of the metal layer 40 and the substrate 70 and fitting a pin into the through hole. The

  After laminating the insulating layer 20 on the substrate 70, a through hole 61 is formed in the substrate with a drill (FIG. 2D), and through-hole plating 60 is applied to electrically connect the layers (FIG. 2E).

  Further, the metal layer 40 is selectively etched by a general subtractive method to form wiring layers 40A and 40B in contact with the conductive layers 30A and 30B on the insulating layer 20 (FIG. 2F). . Here, when the metal layer 40 is etched, the metal layer 40 is made of a metal that is more easily etched than the conductive layers 30A and 30B and the insulating layer 20, so that the surfaces of the conductive layers 30A and 30B and the surfaces of the insulating layer 20 are used. Can be exposed to each other smoothly.

  Next, the resistor 50 is printed by patterning so that the tip contacts the electrodes (conductive layers 30A and 30B) (FIG. 2G). Specifically, a resistor paste is pattern-printed by screen printing and thermally cured to form the resistor 50. Examples of the screen printing referred to in the present invention include those using a screen plate having a mesh made of metal or resin, and metal mask printing. Here, as shown in FIG. 2G, it is preferable to leave a small gap between the resistor 50 and the wiring layers 40A and 40B from the viewpoint of obtaining a printing margin. The reason is that even if the printing position of the resistor 50 is slightly shifted, the resistance value of the resistance element is determined by the size of the resistor 50 and the distance and size between the conductive layers 30A and 30B. This is because the insulating layer 20 has no step and the resistor 50 is formed on a flat surface, so that the shape of the resistor can be formed with high accuracy. In particular, when the resistor 50 is formed by the screen printing method, problems such as wraparound caused by unevenness of the printed surface, particularly due to the electrode, and uneven thickness do not occur.

  When the printed wiring board 10 is a multilayer printed wiring board, it is possible to build a resistance element in an arbitrary layer by repeating the steps (A) to (G) shown in FIG. 2 a plurality of times.

  As described above, according to the present embodiment, the pair of conductive layers 30A and 30B embedded so that the surface is exposed smoothly with respect to the surface of the insulating layer 20 can be used to provide resistance to the smooth surface. The body 50 can be printed. That is, a part of the passive element is embedded in the insulating layer 20, and the functional body (resistor 50) is formed without receiving the step of the electrodes (conductive layers 30A and 30B).

  Therefore, it is possible to provide a printed wiring board having a built-in resistance element with little variation in characteristics. Supplementally, since the resistor 50 is formed on a flat surface, the shape of the resistor can be formed with high accuracy. In addition, since the step due to the conductive layers 30A and 30B does not occur, there is an advantage that the upper insulating layer 20 and the wiring layers 40A and 40B are not easily cracked.

  In addition, since the resistor 50 is formed by screen printing, it is possible to provide a printed wiring board 10 incorporating a resistance element excellent in productivity and economy, and a method for manufacturing the same.

  Further, since each of the first wiring layers 40A and 40B is a metal that is more easily etched than each of the conductive layers 30A and 30B and the insulating layer 20, it is easy to form a smooth surface. Therefore, the variation in characteristics can be further reduced.

  Further, as a manufacturing method, a pair of conductive layers 30A and 30B are formed on the metal layer 40, and the insulating layer 20 is disposed on the substrate 70 separately from the step of forming the conductive layers 30A and 30B. 20, the metal layer 40 is vacuum-laminated on the insulating layer 20 so as to embed the conductive layers 30 </ b> A and 30 </ b> B on the surface, and the laminated metal layer 40 is etched. It becomes easy to form the pair of conductive layers 30A and 30B embedded so as to be exposed smoothly. Therefore, it is possible to provide a method for manufacturing the printed wiring board 10 including the resistance elements with little variation in characteristics.

  Examples of the use of the printed wiring board 10 according to the present embodiment include the following examples.

  (1) By mounting a semiconductor chip (not shown) on one surface (upper surface in the figure) of the printed wiring board 10 by a flip chip method or a wire bonding method, a semiconductor package in which the passive function unit 90 is built-in is obtained. Obtainable. Thereby, it is possible to obtain a passive function having a substantially small distance from the semiconductor chip, that is, a small inductance component.

  (2) The process shown in FIGS. 2A to 2G is repeated a plurality of times on one side or both sides of the substrate 70, and the insulating layer 20 containing the passive element is sequentially stacked (build-up), thereby forming the passive element. Can be obtained. A conventional through hole or via hole (IVH) is used for interlayer connection of the multilayer printed wiring board.

According to the present embodiment, when the multilayer is formed, the lower-layer resistor is formed on a smooth surface. Therefore, unlike the conventional sequential lamination, the upper-layer resistor is formed on a smooth surface. It can be formed easily. Therefore, it is possible to easily obtain a printed wiring board with little variation in characteristics even when the number of layers is increased.

<Second Embodiment>
The second embodiment of the present invention is a modification of the first embodiment, in which a resistance element and a capacitor element are formed simultaneously. Since the resistor element and the method for forming the resistor element are the same as those in the first embodiment, the description thereof will be omitted. Here, the capacitor element and the method for forming the capacitor element will be mainly described.

  FIG. 3 is a sectional view showing an example of the structure of a printed wiring board according to the second embodiment of the present invention. The same parts as those in FIG. 1 are denoted by the same reference numerals, and different parts will be mainly described here. In the following embodiments, the same description is omitted.

  10 A of printed wiring boards of this invention are provided with the buildup layer which consists of the resistance part 100 and the capacitor | condenser part 110, and are connected with the 2nd wiring layers 80A-80D on the board | substrate 70 through the through-hole plating 60, respectively. .

  Here, the resistance portion 100 partially overlaps with each of the conductive layers 30A and 30B, and the pair of conductive layers 30A and 30B embedded so that the surface is exposed smoothly with respect to the surface of the insulating layer 20A. A pair of first wiring layers 40A and 40B formed as described above and a resistor 50 formed so as to be electrically connected to each of the conductive layers 30A and 30B are provided.

  Capacitor portion 110 includes dielectric layer 120 and capacitor electrode 130 embedded on the surface of insulating layer 20B so that the surface is smoothly exposed, first wiring layers 40C and 40D formed on dielectric layer 120, A first wiring layer 40E formed on the capacitor electrode 130 is provided.

  The dielectric layer 120 is an electrode embedded in the insulating layer 20B together with the capacitor electrode 130, and is a dielectric paste capable of screen printing. The dielectric paste here is a paste obtained by highly filling a thermosetting resin such as an epoxy resin or a phenol resin with a high dielectric constant filler and dispersing it. As the high dielectric constant filler, titanium oxide, barium titanate, barium titanate ceramic, zirconate titanate ceramic, strontium titanate ceramic, or the like can be used. The particle shape may be spherical or needle-shaped.

  The capacitor electrode 130 is formed so as to cover a part of the dielectric layer 120. The capacitor electrode 130 may be made of any conductive paste as long as it can be patterned by a printing method. For example, gold paste, platinum paste, silver paste, copper paste, nickel paste, palladium paste and the like can be mentioned. Among them, a copper paste that is less likely to cause ion migration and is inexpensive is particularly preferable.

  The first wiring layers 40 </ b> C to 40 </ b> E are formed by etching the metal layer 40.

  The passive function unit 140 is an electrode sandwiched between a first wiring layer 40E and a capacitor electrode 130 that is printed in advance so as to connect the functional body made of the dielectric 120 to the other first wiring layer 40D. 130, a capacitor element having a three-layer structure including a dielectric 120 and a first wiring layer 40E.

  The electrical characteristics of the passive function unit 140 are determined by the thickness, surface area, and shape of the dielectric layer 120, the distance between the first wiring layer 40E and the capacitor electrode 130, the contact area, the shape, and the like. The capacitance (F) can be adjusted.

  Next, an example of the manufacturing method of the printed wiring board comprised as mentioned above is demonstrated using FIG.

  First, patterned conductive layers 30A and 30B are printed on the metal layer 40 (FIGS. 4A and 4B).

  Further, the dielectric layer 120 is formed on the metal layer 40 by a screen printing method (FIG. 4C).

  Then, the capacitor electrode 130 is printed and formed so as to be in contact with one surface (the upper surface in the drawing) of the dielectric layer 120 (FIG. 4D).

  Next, separately from the step of forming the conductive layers 30A and 30B, the dielectric layer 120, and the capacitor electrode 130, a substrate 70 on which the second wiring layers 80A to 80E are formed in advance is prepared, and an insulating layer is formed on the substrate 70. 20 is placed, and the metal layer 40 is overlapped with the insulating layer 20 and vacuum-laminated so that the conductive layers 30A and 30B and the capacitor electrode 130 are embedded in the surface of the insulating layer 20 (FIG. 4E). At this time, the metal layer 40 and the substrate 70 are aligned by previously forming a through hole (not shown) in a part of the surface of the metal layer 40 and the substrate 70 and fitting a pin into the through hole. The

  After the insulating layer 20 is laminated on the substrate 70, through holes 61A and 61B are formed on the substrate with a drill (FIG. 4F), and through-hole plating 60A to 60D is applied to connect the layers (FIG. 4G). .

  Further, the first wiring layers 40A to 40E are formed on the insulating layer 20 by a general subtractive method (FIG. 4H). Here, when the metal layer 40 is etched, a metal that is more easily etched than the conductive layers 30A and 30B, the capacitor electrode 130, and the insulating layer 20 is used for the metal layer 40. (Conductive layers 30A and 30B, capacitor electrode 130) can be exposed.

  Next, the resistor 50 is printed and formed so as to be in contact with the exposed electrodes (conductive layers 30A and 30B) in a smooth state with the surface of the insulating layer 20 by patterning (FIG. 4I).

  Further, when the printed wiring board 10A is a multilayer wiring board, the steps (A) to (I) shown in FIG. 4 can be repeated a plurality of times.

  As described above, according to the present embodiment, in addition to the effects of the first embodiment, the capacitor element having a three-layer structure in which the dielectric layer 120 formed by screen printing is sandwiched between the capacitor electrode 130 and the first wiring layer 40E. It can be embedded in the insulating layer 20. That is, it is possible to provide a printed wiring board having a built-in capacitor element with little variation in characteristics even when stacked using screen printing excellent in productivity and economy, and a method for manufacturing the same.

  Furthermore, since it is possible to form the resistance element and the capacitor element at the same time, it is not necessary to make each element separately, and the productivity and economy are excellent.

  Conventionally, in a method of forming a thin dielectric layer using a high-filler filler with a high dielectric constant in a resin and incorporating a capacitor, flatness is affected by the step of the lower electrode and wiring pattern. Was getting worse. In particular, the capacitor pattern has a tendency to swell because the same pattern is laminated. When the flatness is regarded as important, the thickness of the dielectric must be increased, and the capacitance is reduced, so that a capacitor having the required capacity cannot be obtained.

  According to the present embodiment, it is possible to provide a printed wiring board including a capacitor element in which the thickness of the dielectric is reduced while emphasizing the flatness of the electrode portion in which these problems are eliminated.

<Third Embodiment>
In this embodiment, unlike the first and second embodiments, the wiring layer is formed by a general semi-additive method after the metal layer is removed by etching.

  FIG. 5 is a sectional view showing an example of the structure of a printed wiring board according to the third embodiment of the present invention. Unlike the first and second embodiments, the structure of the printed wiring board 10B is that the second wiring layers 80A to 80C of the substrate 70 and the first wiring layers 40A to 40E of the buildup layer are not through holes. They are connected by filled via holes 150A and 150B formed by filled plating.

  When filled via holes 150A and 150B are formed as multilayer wiring boards, via holes and passive components can be formed directly above the via holes, and in terms of design freedom, compared to conformal vias using ordinary plating solutions. It is advantageous.

  Since other structures are the same as those in the first and second embodiments, description thereof is omitted.

  Next, an example of the manufacturing method of the printed wiring board comprised as mentioned above is demonstrated using FIG.

  First, the conductive marks 30A and 30B patterned on the support 40S and the alignment marks 160A and 160B used when forming the conductor layer of the buildup layer are printed and formed (FIGS. 6A and 6B). ). Here, any material can be used for the support 40S as long as it can be peeled off or removed by etching. As the support 40S, for example, if a peelable translucent resin (film) is used, alignment can be performed easily and with high accuracy. However, here, an example using a metal layer that can be removed by etching is used. Says.

  Further, the dielectric layer 120 is formed on the support 40S by a screen printing method (FIG. 6C).

  Then, the capacitor electrode 130 is printed and formed so as to be in contact with one surface (the upper surface in the drawing) of the dielectric layer 120 (FIG. 6D).

  Next, apart from the step of forming the conductive layers 30A and 30B, the dielectric layer 120, and the capacitor electrode 130, a substrate 70 on which the second wiring layers 80A to 80C are formed in advance is prepared, and an insulating layer is formed on the substrate 70. 20 is placed, and the support 40S is overlapped with the insulating layer 20 so as to embed the conductive layers 30A and 30B and the capacitor electrode 130 on the surface of the insulating layer, and vacuum lamination is performed (FIG. 6E).

  At this time, the support 40S and the substrate 70 are aligned by previously forming a through hole (not shown) in a part of the surface of the support 40S and the substrate 70 and fitting a pin into the through hole. The

  After laminating the insulating layer 20 on the substrate 70, the support 40S is etched away by a general method, and a via hole 151 is formed on the exposed surface of the insulating layer 20 using a carbon dioxide laser, UV / YAG laser, or excimer laser. (FIG. 6F).

  At this time, the alignment marks 160A and 160B printed and formed in advance are read and via processing is performed, but the alignment marks used in the subsequent resist exposure process are also simultaneously processed.

  Furthermore, after roughening the surface with a chemical such as potassium permanganate, an electroless plating treatment is performed, a resist is attached to the surface, and then exposure and development are performed. Thereby, the patterning resist 170 is formed. The alignment at the time of exposure is performed with reference to the alignment marks 160A and 160B previously formed. Finally, the via hole 151 is filled by using pattern plating to form filled via holes 150A and 150B (FIG. 6G).

  Then, after peeling the patterning resist 170 with alkali, the electroless plating layer is removed by a weak etching process, and the first wiring layers 40A to 40E are formed on the insulating layer 20 (FIG. 6H).

  Thereby, the passive function unit 140 has a three-layer structure in which the dielectric layer 120 is sandwiched between the capacitor electrode 130 and the first wiring layer 40E, and has a function as a capacitor element.

  Next, the resistor 50 is printed by patterning so that the tip is in contact with the surface of the insulating layer 20 exposed in a smooth state (conductive layers 30A and 30B). This resistance paste is pattern-printed by screen printing and thermally cured to form a resistance element (FIG. 6I).

  Further, when the printed wiring board 10B is a multilayer wiring board, the steps (A) to (I) shown in FIG. 6 can be repeated a plurality of times.

  In the present invention, it is also possible to perform trimming with a laser so that the electrical characteristics of the passive element fall within the allowable range of the predetermined resistance value. In this case, the film of the resistor 50 formed on the insulating layer 20 is irradiated with a laser to form a trimming groove, and the total resistance of the resistor 50 is adjusted.

  As described above, according to the present embodiment, a pair of conductive layers 30A and 30B are formed on the support 40S, the insulating layer 20 is disposed on the substrate 70, and the conductive layers 30A and 30B are formed on the surface of the insulating layer 20. Since the support 40S is vacuum-laminated on the insulating layer 20 so as to be embedded, and the stacked support 40S is removed, the support 40S is embedded so that the surface is exposed to the surface of the insulating layer 20 smoothly. It becomes easy to form the pair of conductive layers 30A and 30B. Therefore, since the resistor can be printed on a smooth surface, it is possible to reduce variations in printing. Further, since the resistor is formed by screen printing, it is excellent in productivity and economy. Therefore, it is possible to provide a printed wiring board having a built-in resistance element that is excellent in productivity and economy and has little variation in characteristics, and a manufacturing method thereof.

  Further, according to the present embodiment, since the wiring layers 40A to 40E are formed by the semi-additive method, a fine pattern can be formed as compared with the subtractive method (first embodiment), and the semiconductor package or the like is higher. A dense printed wiring board can be manufactured.

  Note that the present invention is not limited to the above-described embodiment as it is, and can be embodied by modifying the constituent elements without departing from the scope of the invention in the implementation stage. In addition, various inventions can be formed by appropriately combining a plurality of components disclosed in the embodiment. For example, some components may be deleted from all the components shown in the embodiment. Furthermore, you may combine a component suitably in different embodiment.

It is a figure which shows an example of the structure of the printed wiring board which concerns on the 1st Embodiment of this invention. It is a figure which shows an example of the manufacturing method of the printed wiring board which concerns on the 1st Embodiment of this invention. It is a figure which shows an example of the structure of the printed wiring board which concerns on the 2nd Embodiment of this invention. It is a figure which shows an example of the manufacturing method of the printed wiring board which concerns on the 2nd Embodiment of this invention. It is a figure which shows an example of the structure of the printed wiring board which concerns on the 3rd Embodiment of this invention. It is a figure which shows an example of the manufacturing method of the printed wiring board which concerns on the 3rd Embodiment of this invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 ... Printed wiring board 20,20A, 20B ... Insulating layer, 30A, 30B ... Conductive layer, 40 ... Metal layer, 40A-40E ... 1st wiring layer, 40S ... Support, 50 ... resistor, 60A-60D ... through-hole plating, 70 ... substrate, 80A-80E ... second wiring layer, 90 ... passive function part (resistance), 100. ..Resistance part, 110 ... capacitor part, 120 ... dielectric layer, 130 ... capacitor electrode, 140 ... passive function part (capacitor), 150A, 150B ... filled via hole, 160A, 160B ... Alignment mark, 170 ... Pattern resist.

Claims (2)

A substrate,
An insulating layer formed on the substrate;
A pair of conductive layers embedded in the surface of the insulating layer so as to be exposed from the insulating layer smoothly,
A pair of wiring layers selectively formed on the insulating layer so as to partially overlap each of the conductive layers;
Wherein each conductive layer so as to be electrically connected, in the manufacturing method of the print wiring board and at least the resistor formed on the part of some and the insulating layer of each of the conductive layers,
Forming the pair of conductive layers on a metal layer;
Disposing the insulating layer on the substrate;
Laminating the metal layer on the insulating layer so as to embed each conductive layer on the surface of the insulating layer;
By selectively etching the stacked metal layers, the pair of wiring layers individually contacting the pair of conductive layers is formed, and the surface of each conductive layer between the wiring layers and the Exposing the surface of the insulating layer to each other smoothly;
Forming the resistor by screen printing on at least a part of each conductive layer and a part of the insulating layer so as to electrically connect the conductive layers;
A method of manufacturing a printed wiring board, comprising: In the manufacturing method of the printed wiring board of Claim 1,
The respective wiring layers, a method for manufacturing a printed wiring board characterized by comprising a metal having a greater etching rate than the etching rate of each of the conductive layers and the insulating layer.

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