JP4857547B2 - Manufacturing method of multilayer wiring board with built-in components - Google Patents

Description

  The present invention relates to a method for manufacturing a multilayer wiring board incorporating passive elements such as resistors, capacitors, and inductors.

When manufacturing a wiring board incorporating a passive element such as a resistor, a capacitor, or an inductor, the passive element and the wiring layer are generally formed on the same substrate.
Thus, when it was set as the structure which provided the passive element and the wiring layer in the same board | substrate, it was difficult to test | inspect and adjust the said passive element independently.
In addition, since the management items for manufacturing the passive element and the wiring layer are different, when the passive element is formed in the wiring layer forming process, the capacitance of the passive element may change.
On the other hand, in Patent Document 1, in order to efficiently produce a multilayer wiring board in which passive elements such as resistors, capacitors, and inductors are formed with high yield, a plurality of substrates on which passive elements are formed are respectively connected via prepregs. Further, it is described that a copper foil is exposed on the lower surface and the upper surface, and the passive element and the wiring layer are connected by via connection or through hole connection to form a multilayer wiring board.
However, the structure of the substrate on which the passive elements are formed is a structure in which the passive elements are formed on the front and back of the substrate, so that it is difficult to inspect and adjust each passive element formed on the insulating substrate alone. However, it was unavoidable to form a multilayer substrate that was formed as it was and was built in as it was.
JP 2003-154971 A

  The present invention solves the problem that if a passive element is formed in an actual circuit, the problem cannot be inspected and the capacitance of the element alone cannot be adjusted due to a circuit problem, and the management items in the wiring circuit board and the passive element forming process are different. Another object of the present invention is to provide a method for manufacturing a multilayer wiring board with a built-in passive element that can independently inspect and adjust the passive element.

  According to the first aspect of the present invention, an element substrate in which at least one element of a resistance element, a capacitor, and an inductor is arranged in an independent state is formed on one surface of a thin film insulating substrate, and each element of the element substrate is inspected. After the adjustment, the wiring substrate having the wiring layer and the element substrate are stacked in the stacking process of the multilayer wiring substrate, and each element of the element substrate and the wiring layers of the upper and lower wiring substrates are connected via or This is a method for manufacturing a multilayer wiring board in which a passive element is built in the substrate by through-hole connection.

  According to a second aspect of the present invention, the resistance element is formed by forming a metal resistance thin film on the entire surface of the thin film insulating substrate by a thin film metal forming process, and performing a photolithography process and etching on a predetermined portion of the metal resistance thin film. 2. The method of manufacturing a multilayer wiring board with a built-in passive element according to claim 1, wherein the resistance element is processed into a predetermined size and shape.

  The invention according to claim 3 is characterized in that the resistance element is a resistance element in which a resistor paste is printed in a predetermined size and shape at a predetermined location of a thin film insulating substrate. This is a method of manufacturing a multilayer wiring board incorporating the passive elements.

  According to a fourth aspect of the present invention, there is provided the passive element according to the second or third aspect, wherein the resistance element is provided with a wiring layer connection electrode made of a conductive paste at an end portion. It is a manufacturing method of a multilayer wiring board.

  According to a fifth aspect of the present invention, there is provided the passive element according to any one of the second to fourth aspects, wherein the thin film insulating substrate constituting the element substrate has a resistance element electrode formed in advance. This is a method of manufacturing a built-in multilayer wiring board.

  Here, as a method of incorporating a resistance element as a passive element in a multilayer wiring circuit board formed by a lamination process, an element substrate in which each element is formed in a predetermined position on a thin insulating substrate in advance and a lamination process of the multilayer wiring board At the same time, after stacking at the same time, it is possible to place and connect each element inside the substrate by via-connecting to the wiring layers of the upper and lower wiring substrates, and to incorporate the components inside the multilayer wiring substrate.

As a method of forming the resistance element on the thin film substrate, a metal thin film is formed on the entire surface of the thin film substrate by thin film metal formation (sputtering, electroless plating, vapor deposition, etc.), and a predetermined size is obtained by a photolithography process and an etching technique. Now, a thin film metal was left and arranged to form a resistance element.
In addition, although the metal foil formed by the said electroless plating has a desirable high resistance value, it needs to be selected according to the capacity | capacitance of the resistance to be used.
Further, as a method of forming the resistance element, a method of printing a resistor paste in a predetermined size at a predetermined location to form a resistance element is also possible. It is necessary to select the resistivity and the size of the resistor paste according to the capacity of the resistor element to be used.

When connecting the thin film metal resistors and printed resistor elements formed above with the upper and lower wiring layers, there is no problem with thin film metal or printed paste as long as it is through-hole connection, but in via connection in laser processing, the metal layer Problems such as penetrating through.
Therefore, it is possible to cope with via connection by laser by forming a connection electrode on the end portion of the resistance element with a conductive paste by printing.
There is also a method in which connection electrodes to the wiring layers of the upper and lower wiring boards are formed in advance on the thin film insulating layer in the same manner as the wiring circuit. By forming a resistor with a thin film metal or a resistance paste on the thin film substrate on which the connection electrode is formed, connection with the upper and lower wiring layers can be performed as usual.

  Next, the inductance can be formed by using a copper foil previously formed on a thin film substrate by a photolithography process and etching. Further, the inductor shape can be formed by printing a conductive paste.

For capacitors, the lower electrode of the capacitor is formed by photolithography and etching in the same manner as the inductor, and a dielectric paste is partially formed on the electrode by printing, or a photosensitive dielectric film is used. There is a method in which a dielectric is partially formed on an electrode by a photolithography process.
The upper electrode can form a capacitor by printing a conductive paste on the dielectric.

  Since the element formed in the thin film insulating layer does not have a wiring circuit and is independent of each element, the capacitance of each element can be measured and can be easily trimmed for adjustment.

By forming passive elements on the thin film insulator in advance separately from the wiring circuit, each element can be reliably inspected and can be formed in a separate process from the wiring circuit, thus increasing the yield. This leads to cost reduction in the manufacturing process.
In addition, depending on the arrangement of each element, the formed thin film insulating sheet can be shared, which leads to cost reduction of the entire substrate.
Furthermore, by forming each element on the same surface, it becomes possible to manage each thin film substrate on which each element is formed, leading to a reduction in the defect rate.

The wiring board structure of the present invention will be described with reference to FIGS.
As shown in FIGS. 7 and 8, the element-embedded substrate forming method of the present invention forms a resistance electrode terminal 45, an inductor 60, and a capacitor lower electrode 50 on a thin film insulating substrate 10. Further, the resistance element 20 is formed by a thin film metal forming process, a photolithography process, and an etching process.
The resistance element can be formed by adjusting the resistance value with a trimming device to adjust the capacitance of the resistance element.
Next, a dielectric layer is formed on the capacitor lower electrode 50 by printing a dielectric paste.
Then, after forming the dielectric layer, a conductive paste is printed on the dielectric to form the capacitor upper electrode 52.
The element substrate on which each element is formed is built in the substrate by the process of FIG.
The wiring substrate 1 on which the wiring circuit is formed, the element substrate 10a on which each element is formed, and the insulating substrate 2 are laminated and pasted by a vacuum press. Each substrate is bonded and integrated by sandwiching an adhesive layer such as a prepreg.
Next, hole processing for conduction is performed by laser processing aiming at a hole for a through hole provided in the electrode portion of the inductor, the electrode portion of the capacitor, and the resistance terminal electrode portion 30.
Here, depending on the selection of the laser, the electrode portion can be processed, and therefore there is no need to provide a through hole in the resistance electrode portion. The wiring layer of the core substrate 1 is processed, and then the insulating substrate 2 and the conductor layer 3 are formed on the rear part in the electroless plating process. After the conductor layer 3 is formed, the upper wiring layer 3a is formed by a photolithography process and an etching process, and each element formed on the inner thin film insulating substrate can be electrically connected to the wiring circuit.
In this step, the passive element-embedded substrate of the present invention can be formed.

Example 1
Hereinafter, Example 1 will be described with reference to FIGS. 1, 2, and 3.
First, a BT resin substrate having a core thickness of 0.06 mm was used as the material of the thin film insulating substrate 10. A resistive material made of carbon paste is used on the insulating substrate 10 by screen printing, and the film thickness and size are adjusted in accordance with the resistance capacity, and printed on the thin film substrate as shown in FIGS. Formed. After printing, it was temporarily baked at 80 ° C. for 30 minutes, and further baked at 190 ° C. for 2 hours.
Next, in order to form a capacitor, the lower electrode 50 was formed by printing using a copper paste made of a copper paste.
Then, after printing, temporary baking was performed at 80 ° C. for 30 minutes to form a dielectric paste so as to cover the lower electrode, and a dielectric layer 511 was formed. Further, after printing, the substrate was temporarily baked at 80 ° C. for 30 minutes, and the upper electrode 52 of the capacitor was formed by printing with a copper paste.
After printing, temporary baking was performed at 80 ° C., and main baking was performed at 190 ° C. for 2 hours, thereby forming a capacitor and a resistance element.
Then, the trimming device is used to adjust the resistance value in order to adjust the capacitance of the resistance element. Next, as shown in FIG. 3A, the wiring circuit board 1, the element board 10a, and the insulating board 2 are arranged. , 60 μm prepreg (not shown) was laminated and integrated as shown in FIG. 3B by a vacuum press.
Next, using a carbon dioxide gas laser processing machine, as shown in FIG. 3 (c), drilling is performed so as to penetrate to the terminal portions of each element of the thin film substrate 10a and the land connection portions of the printed circuit board 1. Went.
Further, as shown in FIG. 3 (d), a thin film metal layer is formed on the insulating substrate 2 and the through hole by an electroless copper plating process, and then the thickness of the thin film metal layer is increased to 12 μm by electrolytic copper plating. A metal layer 3 was formed.
Next, in order to form a wiring layer, a dry film resist (RY-3315 15 μm thick, manufactured by Hitachi Chemical Co., Ltd.) is laminated on the metal layer 3, and exposure (UV exposure, 40 mJ) and development are performed using a wiring pattern mask. (1% sodium carbonate, 15 seconds, spray development) was performed, and a wiring pattern was formed by etching with ferric chloride solution to form a substrate with built-in passive elements shown in FIG.

(Example 2)
Hereinafter, Example 2 will be described with reference to FIGS. 4, 5, and 6.
As a material for the thin film insulating substrate 10, a BT resin substrate having a thickness of 0.06 mm was used. The insulating substrate 10 was coated by screen printing using a carbon paste as a resistance material and adjusting the film thickness and size according to the resistance capacity.
After printing, it was temporarily baked at 80 ° C. for 30 minutes, and a conductive paste 30 made of silver paste was printed in a ring shape as shown in FIGS. 4 and 5 on the terminal portion of the resistance element. Also, form the inductor with silver paste by printing.
After printing, the lower electrode 50 was formed by printing using a conductive paste made of a copper paste for provisional baking at 80 ° C. for 30 minutes and further forming a capacitor. After printing, the substrate was temporarily baked at 80 ° C. for 30 minutes, and the dielectric paste was formed so as to cover the lower electrode with a dielectric paste.
Further, after printing, the substrate was temporarily baked at 80 ° C. for 30 minutes, and the upper electrode 52 of the capacitor was formed by printing with a copper paste. After printing, temporary baking was performed at 80 ° C. and main baking was performed at 190 ° C. for 2 hours to form a capacitor, a resistance element, and an inductor element.
The hole diameter at the center of the ring of the resistance terminal portion was 100 μm, and the cross-sectional shape was arranged as shown in FIG.
In this step, an element substrate 10a on which passive elements are formed is formed. And then. In order to adjust the capacitance of the resistance element, the resistance value was adjusted with a trimming device.
Next, as shown in FIG. 6 (a), the printed circuit board 1, the thin film substrate 10a, and the insulating substrate 2 are arranged, and a 60 μm prepreg (not shown) is used to perform FIG. The layers were integrated as shown in b).
Next, as shown in FIG. 6C, using a carbon dioxide laser processing machine, drilling is performed so that each element terminal portion of the element substrate 10a and the land connection portion of the printed circuit board 1 are penetrated. Went.
The resistance element was drilled so as to widen the hole of the ring provided in the silver paste.
Further, as shown in FIG. 6 (d), a thin film metal layer is formed on the insulating substrate 2 and the through hole by an electroless copper plating process, and the thickness of the thin film metal layer is increased to 15 μm by electrolytic copper plating. Layer 3 was formed. Next, the wiring layer is laminated with a dry film resist (RY-3315 15 μm thickness, manufactured by Hitachi Chemical Co., Ltd.) on the upper part of the metal layer 3, and is exposed (UV exposure, 40 mJ) and developed (1% carbonic acid using a wiring pattern mask). (Soda, 15 seconds, spray development) was performed, and a wiring pattern was formed by etching with a ferric chloride solution to form a passive element built-in substrate shown in FIG.

(Example 3)
Hereinafter, an Example is described using FIG. 7, FIG. 8, FIG.
A 0.06 mm-thick BT resin substrate having a 12 μm copper foil on one side was used as a material for the thin film substrate 10.
Next, as shown in FIGS. 7 and 8, a dry film resist (RY-3315 15 μm thick, manufactured by Hitachi Chemical Co., Ltd.) is laminated on the copper foil, and exposure (UV exposure, 40 mJ) and development are performed using a wiring pattern mask. (1% sodium carbonate, 15 seconds, spray development) was performed, and the terminal portion of the resistance element, the inductor and the lower electrode of the capacitor were formed by etching with ferric chloride solution.
The electrode part of the resistor was coated by using screen printing, using a carbon paste as a resistor material, adjusting the film thickness and size according to the resistor capacity. After printing, the substrate was temporarily baked at 80 ° C. for 30 minutes, and a dielectric paste was formed to cover the lower electrode and a dielectric layer 51 was formed in order to form a capacitor.
Further, after printing, the substrate was temporarily baked at 80 ° C. for 30 minutes, and the upper electrode 52 of the capacitor was formed by printing with a copper paste. After printing, temporary baking was performed at 80 ° C., and main baking was performed at 190 ° C. for 2 hours, thereby forming a capacitor and a resistance element.
In order to adjust the capacitance of the resistance element, the resistance value was adjusted with a trimming device. Next, as shown in FIG. 9 (a), the printed circuit board 1, the thin film substrate 10a, and the insulating substrate 2 are arranged, and a 60 μm prepreg (not shown) is used, and a vacuum press machine is used. The layers were integrated as shown in (b).
Next, as shown in FIG. 9 (c), using a carbon dioxide laser processing machine, holes are formed so as to penetrate to the terminal portions of each element of the thin film substrate 10a and the land connection portions of the printed circuit board 1. Processing was performed. The resistance element was drilled so as to widen the hole of the ring provided in the terminal.
Furthermore, as shown in FIG. 9 (d), a thin film metal layer is formed on the insulating substrate 2 and the through hole by an electroless copper plating step, and the thickness of the thin film metal layer is further increased to 15 μm by electrolytic copper plating. Metal layer 3 was formed.
Next, in order to form a wiring layer, a dry film resist (manufactured by Hitachi Chemical Co., Ltd., RY-3315 15 μm thick) is laminated on the upper part of the metal layer 3, and exposure (UV exposure, 40 mJ) and development (using a wiring pattern mask) 1% sodium carbonate, 15 seconds, spray development), a wiring pattern was formed by etching with ferric chloride solution, and a passive element built-in substrate as shown in FIG. 9E was formed.

Explanatory drawing which shows the example of arrangement | positioning of the passive element of this invention. Sectional drawing from ab of FIG. Explanatory drawing which shows the example of the manufacturing method of the multilayer wiring board of this invention. Explanatory drawing which shows the example of arrangement | positioning of the passive element of this invention. Sectional drawing from ab of FIG. Explanatory drawing which shows the example of the manufacturing method of the multilayer wiring board of this invention. Explanatory drawing which shows the example of arrangement | positioning of the passive element of this invention. Sectional drawing from ab of FIG. Explanatory drawing which shows the example of the manufacturing method of the multilayer wiring board of this invention.

1 ... Wiring board 2 ... Insulating board 3 ... Metal layer 3a ... Wiring circuit 2a ... ... Thin film resistor substrate 10 ... Thin film insulating substrate 10a ... Element substrate 10b ... Drilled. Element substrate 20... Resistor 30... Terminal electrode 50... Lower electrode 51. Body layer 52 ... Upper electrode 60 ... Inductor

Claims (5)

Forming an element substrate in which at least one element of a resistance element, a capacitor, and an inductor are arranged independently on one side of a thin film insulating substrate,
After inspecting and adjusting each element of the element substrate, in the stacking process of the multilayer wiring substrate, the element substrate is stacked between the wiring substrate having the wiring layer and the insulating substrate via an adhesive layer,
Bonding and integrating the wiring substrate, the element substrate, and the insulating substrate;
A method of manufacturing a multilayer wiring board in which passive elements are built in a substrate by via-connecting or through-hole connecting each element of the element substrate and wiring layers of the upper and lower wiring boards.   The resistance element forms a metal resistance thin film on the entire surface of the thin film insulating substrate by a thin film metal formation process, and is processed into a predetermined size and shape by a photolithography process and etching at a predetermined portion of the metal resistance thin film. 2. The method for manufacturing a multilayer wiring board with a built-in passive element according to claim 1, wherein the resistive element is a resistive element.   2. The multilayer wiring board with a built-in passive element according to claim 1, wherein the resistance element is a resistance element in which a resistor paste is printed in a predetermined size and shape at a predetermined location of a thin film insulating substrate. Manufacturing method.   4. The method of manufacturing a multilayer wiring board with a built-in passive element according to claim 2, wherein the resistance element is provided with a wiring layer connection electrode made of a conductive paste at an end. 5. The method of manufacturing a multilayer wiring board with a built-in passive element according to claim 2, wherein the thin film insulating substrate constituting the element substrate is formed with a resistance element electrode in advance.

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