JP4504024B2 - 電子デバイスの製造方法 - Google Patents
電子デバイスの製造方法 Download PDFInfo
- Publication number
- JP4504024B2 JP4504024B2 JP2003582070A JP2003582070A JP4504024B2 JP 4504024 B2 JP4504024 B2 JP 4504024B2 JP 2003582070 A JP2003582070 A JP 2003582070A JP 2003582070 A JP2003582070 A JP 2003582070A JP 4504024 B2 JP4504024 B2 JP 4504024B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- substrate
- foil
- cavity
- pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
- H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
- H03H3/08—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of resonators or networks using surface acoustic waves
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00261—Processes for packaging MEMS devices
- B81C1/00333—Aspects relating to packaging of MEMS devices, not covered by groups B81C1/00269 - B81C1/00325
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/4985—Flexible insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
- H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/02—Details
- H03H9/05—Holders; Supports
- H03H9/10—Mounting in enclosures
- H03H9/1057—Mounting in enclosures for microelectro-mechanical devices
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0274—Optical details, e.g. printed circuits comprising integral optical means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0284—Details of three-dimensional rigid printed circuit boards
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/183—Components mounted in and supported by recessed areas of the printed circuit board
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09063—Holes or slots in insulating substrate not used for electrical connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09118—Moulded substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/30—Details of processes not otherwise provided for in H05K2203/01 - H05K2203/17
- H05K2203/302—Bending a rigid substrate; Breaking rigid substrates by bending
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Acoustics & Sound (AREA)
- Micromachines (AREA)
- Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
Description
− 箔を設けるステップと、
− 前記キャビティを形成しつつ、前記基板の前記メタライゼーション側に前記箔を加えるステップであって、前記箔の一部が前記カバーを形成するステップと、
− 前記カバーを前記基板に対して取り付けるステップと、
を含んでいる方法に関する。
− 第1の側にパターン層を備え且つ第2の側に犠牲層を備える箔が設けられ、
− 前記箔が前記基板の突出部に配置され、前記キャビティの周囲には前記基板と前記箔との間に隙間が形成され、
− 基板の周囲の隙間に絶縁材料を充填することにより、前記箔が前記基板に対して取り付けられる、
ことによって達成される。
Claims (11)
- メタライゼーション側を有する基板を備え且つ前記メタライゼーション側には前記基板とカバーとによって境界付けられるキャビティ内に電気素子が存在する電子デバイスの製造方法であって、
− 箔を設けるステップと、
− 前記キャビティを形成しつつ、前記基板の前記メタライゼーション側に前記箔を加えるステップであって、前記箔の一部が前記カバーを形成するステップと、
− 前記カバーを前記基板に対して取り付けるステップと、
を含んでいる方法において、
− 前記箔は、第1の側にパターン層を備え且つ第2の側に犠牲層を備え、前記パターン層と前記犠牲層との間に、パターン化された副層が存在し、前記パターン層および前記副層は、互いに凹部によって区別される第1のパターンおよび第2のパターンを有し、前記凹部は、前記パターン層の面内の直径よりも、前記副層の面内の直径の方が大きく、それにより、絶縁材料が加えられる時に、前記パターン層が前記絶縁材料中に埋め込まれ、
− 前記箔が前記基板の突出部に配置され、前記キャビティの周囲には前記基板と前記箔との間に隙間が形成され、
− 前記キャビティの周囲の前記隙間に前記絶縁材料を充填することにより、前記箔が前記基板に対して取り付けられ、
− 前記箔が前記基板に対して取り付けられた後、前記犠牲層が除去される、
方法。 - メタライゼーション側を有する基板を備え且つ前記メタライゼーション側には前記基板とカバーとによって境界付けられるキャビティ内に電気素子が存在する電子デバイスの製造方法であって、
− 箔を設けるステップと、
− 前記キャビティを形成しつつ、前記基板の前記メタライゼーション側に前記箔を加えるステップであって、前記箔の一部が前記カバーを形成するステップと、
− 前記カバーを前記基板に対して取り付けるステップと、
を含んでいる方法において、
− 前記箔は、第1の側にパターン層を備え且つ第2の側に保護層を備え、前記パターン層と前記保護層との間に、パターン化された副層が存在し、前記パターン層および前記副層は、互いに凹部によって区別される第1のパターンおよび第2のパターンを有し、前記凹部は、前記パターン層の面内の直径よりも、前記副層の面内の直径の方が大きく、それにより、絶縁材料が加えられる時に、前記パターン層が前記絶縁材料中に埋め込まれ、
− 前記箔が前記基板の突出部に配置され、前記キャビティの周囲には前記基板と前記箔との間に隙間が形成され、
− 前記キャビティの周囲の前記隙間に前記絶縁材料を充填することにより、前記箔が前記基板に対して取り付けられる、
方法。 - 前記パターン層が金属を含んでいる、請求項1又は2に記載の方法。
- 前記基板のメタライゼーション側には前記キャビティの近傍にガイドトラックが存在し、このトラック上には、前記箔が取り付けられる前に導電性コネクタが設けられ、このコネクタは、前記箔が取り付けられる際に前記パターン層のトラックと接触される、請求項3に記載の方法。
- 前記導電性コネクタと接触される前記パターン層の前記トラックは、その上に半田を堆積させることができる接触パッドである、請求項4に記載の方法。
- − 変形された箔が箔として使用され、この変形された箔は、エッジによって境界付けられる突出部を有し、
− 前記箔は、この箔の前記突出部が前記キャビティの前記カバーを形成し且つ前記エッジが前記基板と接触するように、前記基板に対して取り付けられる、請求項1又は2に記載の方法。 - メタライゼーション側を有する基板を備え、前記メタライゼーション側には前記基板とカバーとによって境界付けられるキャビティ内に電気素子が存在する電子デバイスであって、前記カバーとして、前記キャビティの近傍の空間内に位置される絶縁材料によって前記基板に対して取り付けられる層が存在し、前記層は前記絶縁材料中に機械的に埋め込まれ、前記絶縁材料を有する前記空間は、前記層の面内で前記層に隣接する第1の領域と、前記層の反対側の第2の領域とを有し、前記第1及び第2の領域は互いに隣接しており、前記第2の領域は、前記層の面内の前記第1の領域の直径よりも大きい直径を有する、電子デバイス。
- 機械的に埋め込まれる前記層が金属を含んでいる、請求項7に記載の電子デバイス。
- 前記基板が集積回路を備えている、請求項7に記載の電子デバイス。
- 前記電気素子がマイクロ・メカニカル・システム(MEMS)素子である、請求項7に記載の電子デバイス。
- 前記層の反対側の保護層、を更に備える請求項7に記載の電子デバイス。
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP02076427 | 2002-04-11 | ||
EP02078208 | 2002-08-05 | ||
EP02079545 | 2002-10-30 | ||
PCT/IB2003/001300 WO2003084861A2 (en) | 2002-04-11 | 2003-04-10 | Method of manufacturing an electronic device in a cavity with a cover |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2005522334A JP2005522334A (ja) | 2005-07-28 |
JP4504024B2 true JP4504024B2 (ja) | 2010-07-14 |
Family
ID=28794672
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2003582070A Expired - Fee Related JP4504024B2 (ja) | 2002-04-11 | 2003-04-10 | 電子デバイスの製造方法 |
Country Status (10)
Country | Link |
---|---|
US (1) | US7160476B2 (ja) |
EP (2) | EP1501756B1 (ja) |
JP (1) | JP4504024B2 (ja) |
KR (1) | KR20040098070A (ja) |
CN (1) | CN100415634C (ja) |
AT (1) | ATE354538T1 (ja) |
AU (1) | AU2003216588A1 (ja) |
DE (1) | DE60311982T2 (ja) |
TW (1) | TWI279391B (ja) |
WO (1) | WO2003084861A2 (ja) |
Families Citing this family (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7351641B2 (en) | 2004-08-12 | 2008-04-01 | Tessera, Inc. | Structure and method of forming capped chips |
US7368803B2 (en) * | 2004-09-27 | 2008-05-06 | Idc, Llc | System and method for protecting microelectromechanical systems array using back-plate with non-flat portion |
US7999366B2 (en) | 2004-11-26 | 2011-08-16 | Stmicroelectronics, S.A. | Micro-component packaging process and set of micro-components resulting from this process |
EP1661850B1 (fr) * | 2004-11-26 | 2007-06-13 | Stmicroelectronics Sa | Procédé de conditionnement de micro-composants utilisant une matrice |
US7327044B2 (en) * | 2005-01-21 | 2008-02-05 | Fox Electronics | Integrated circuit package encapsulating a hermetically sealed device |
US7741189B2 (en) * | 2005-06-20 | 2010-06-22 | E.I. Du Pont De Nemours And Company | Electrodes, inner layers, capacitors, electronic devices and methods of making thereof |
TWI257656B (en) * | 2005-08-03 | 2006-07-01 | Advanced Semiconductor Eng | Method for fabricating protection caps for protecting elements on wafer surface |
DE102005053722B4 (de) | 2005-11-10 | 2007-08-16 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Deckelwafer, in der Mikrosystemtechnik einsetzbares Bauelement mit einem solchen Wafer sowie Lötverfahren zum Verbinden entsprechender Bauelement-Teile |
EP2098478A1 (en) * | 2008-03-07 | 2009-09-09 | Nederlandse Organisatie voor toegepast-natuurwetenschappelijk Onderzoek TNO | Manufacturing micro components including a cover structure. |
JP5463961B2 (ja) * | 2010-03-04 | 2014-04-09 | 富士通株式会社 | Memsデバイスの製造方法およびmemsデバイス |
DE102011004577B4 (de) * | 2011-02-23 | 2023-07-27 | Robert Bosch Gmbh | Bauelementträger, Verfahren zur Herstellung eines solchen Bauelementträgers sowie Bauteil mit einem MEMS-Bauelement auf einem solchen Bauelementträger |
US8749056B2 (en) | 2011-05-26 | 2014-06-10 | Infineon Technologies Ag | Module and method of manufacturing a module |
US9203451B2 (en) | 2011-12-14 | 2015-12-01 | Infineon Technologies Ag | System and method for an RF receiver |
US8716852B2 (en) * | 2012-02-17 | 2014-05-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Micro-electro mechanical systems (MEMS) having outgasing prevention structures and methods of forming the same |
US9225311B2 (en) | 2012-02-21 | 2015-12-29 | International Business Machines Corporation | Method of manufacturing switchable filters |
US10224260B2 (en) | 2013-11-26 | 2019-03-05 | Infineon Technologies Ag | Semiconductor package with air gap |
DE102014102518B4 (de) * | 2014-02-26 | 2022-04-28 | Snaptrack, Inc. | Package für ein abstimmbares Filter |
US9738516B2 (en) * | 2015-04-29 | 2017-08-22 | Taiwan Semiconductor Manufacturing Co., Ltd. | Structure to reduce backside silicon damage |
CN110076940B (zh) * | 2019-03-26 | 2021-10-08 | 中国科学院微电子研究所 | 一种基于金属微观结构的精密模具 |
US10959336B2 (en) * | 2019-03-28 | 2021-03-23 | Mikro Mesa Technology Co., Ltd. | Method of liquid assisted binding |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60241237A (ja) * | 1984-05-15 | 1985-11-30 | Mitsubishi Electric Corp | 混成集積回路装置 |
US5155299A (en) * | 1988-10-05 | 1992-10-13 | Olin Corporation | Aluminum alloy semiconductor packages |
US5043534A (en) * | 1990-07-02 | 1991-08-27 | Olin Corporation | Metal electronic package having improved resistance to electromagnetic interference |
US5738797A (en) * | 1996-05-17 | 1998-04-14 | Ford Global Technologies, Inc. | Three-dimensional multi-layer circuit structure and method for forming the same |
US6140144A (en) * | 1996-08-08 | 2000-10-31 | Integrated Sensing Systems, Inc. | Method for packaging microsensors |
US5798557A (en) * | 1996-08-29 | 1998-08-25 | Harris Corporation | Lid wafer bond packaging and micromachining |
US6146917A (en) * | 1997-03-03 | 2000-11-14 | Ford Motor Company | Fabrication method for encapsulated micromachined structures |
-
2003
- 2003-04-10 DE DE60311982T patent/DE60311982T2/de not_active Expired - Lifetime
- 2003-04-10 KR KR10-2004-7016122A patent/KR20040098070A/ko not_active Application Discontinuation
- 2003-04-10 AT AT03712496T patent/ATE354538T1/de not_active IP Right Cessation
- 2003-04-10 EP EP03712496A patent/EP1501756B1/en not_active Expired - Lifetime
- 2003-04-10 US US10/510,590 patent/US7160476B2/en not_active Expired - Fee Related
- 2003-04-10 CN CNB038080591A patent/CN100415634C/zh not_active Expired - Fee Related
- 2003-04-10 WO PCT/IB2003/001300 patent/WO2003084861A2/en active IP Right Grant
- 2003-04-10 EP EP06123172A patent/EP1753023A3/en not_active Withdrawn
- 2003-04-10 JP JP2003582070A patent/JP4504024B2/ja not_active Expired - Fee Related
- 2003-04-10 AU AU2003216588A patent/AU2003216588A1/en not_active Abandoned
- 2003-04-11 TW TW092108374A patent/TWI279391B/zh not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
US7160476B2 (en) | 2007-01-09 |
AU2003216588A1 (en) | 2003-10-20 |
DE60311982T2 (de) | 2007-11-08 |
EP1753023A3 (en) | 2007-02-21 |
EP1501756B1 (en) | 2007-02-21 |
AU2003216588A8 (en) | 2003-10-20 |
CN100415634C (zh) | 2008-09-03 |
KR20040098070A (ko) | 2004-11-18 |
US20050121413A1 (en) | 2005-06-09 |
WO2003084861A2 (en) | 2003-10-16 |
WO2003084861A3 (en) | 2004-05-13 |
DE60311982D1 (de) | 2007-04-05 |
EP1501756A2 (en) | 2005-02-02 |
EP1753023A2 (en) | 2007-02-14 |
JP2005522334A (ja) | 2005-07-28 |
TWI279391B (en) | 2007-04-21 |
TW200400918A (en) | 2004-01-16 |
ATE354538T1 (de) | 2007-03-15 |
CN1646417A (zh) | 2005-07-27 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4504024B2 (ja) | 電子デバイスの製造方法 | |
KR100945622B1 (ko) | 전자 부품 모듈 | |
KR101009818B1 (ko) | 전자 디바이스 제조 방법, 캐리어 및 캐리어 제조 방법 | |
JP4838732B2 (ja) | 電気的構成素子および製造方法 | |
JP4410085B2 (ja) | 可変容量素子及びその製造方法 | |
JP2005522864A (ja) | 電子装置とこの装置の製造方法 | |
TWI307529B (en) | Method of forming a penetration electrode and substrate having a penetration electrode | |
WO1997022146A1 (fr) | Boitier de semi-conducteur comportant un circuit a couches multiples et composant a semi-conducteur | |
JP4576849B2 (ja) | 集積回路装置 | |
US11632861B2 (en) | Method for manufacturing embedded circuit board, embedded circuit board, and application | |
KR20040101423A (ko) | 반도체 디바이스 및 이의 제조 방법 및 캐리어 제조 방법 | |
EP1659092B1 (en) | Method for fabricating an electrode in a packaging substrate | |
JP2006202918A (ja) | 機能素子パッケージ体及びその製造方法 | |
JP5026025B2 (ja) | 半導体装置 | |
JP2008159973A (ja) | 電子部品モジュールおよびこれを内蔵した部品内蔵回路基板 | |
JP2005522861A (ja) | 電子デバイスの製造方法 | |
JP4426413B2 (ja) | 半導体装置の製造方法 | |
WO2008133369A9 (en) | The manufacturing method of the thin film ceramic multi layer substrate | |
JP2015084386A (ja) | 電子デバイス | |
CN110800101A (zh) | 电子部件模块 | |
US20120261816A1 (en) | Device package substrate and method of manufacturing the same | |
KR100636780B1 (ko) | 글래스 기판을 이용한 패키징 제조방법 및 그 방법으로제조된 패키징 기판 | |
KR20040030921A (ko) | 접촉패드가 구비된 표면을 가진 전기장치의 전기적 및기계적 연결을 허용하는 방법 및 장치 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20060410 |
|
RD02 | Notification of acceptance of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7422 Effective date: 20070510 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20090324 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20090623 |
|
A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20090630 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20090917 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20100330 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20100422 |
|
R150 | Certificate of patent or registration of utility model |
Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130430 Year of fee payment: 3 |
|
LAPS | Cancellation because of no payment of annual fees |