WO2008133369A9

WO2008133369A9 - The manufacturing method of the thin film ceramic multi layer substrate

Info

Publication number: WO2008133369A9
Application number: PCT/KR2007/002846
Authority: WO
Inventors: Sang-Hee Kim
Original assignee: Top Engineering Co., Ltd
Priority date: 2007-04-30
Filing date: 2007-06-13
Publication date: 2009-12-23
Also published as: TW200845865A; WO2008133369A1; CN101683003A; CN101683003B; KR20080097065A

Abstract

Provided is a thin film ceramic multilayer wiring board that is appropriate for use as a highly - integrated multilayer wiring board for a probe card which tests a highfrequency module for mobile communication, a microwave connector, a cable assembly, a semiconductor chip, etc., and a method of manufacturing the thin film ceramic multilayer wiring board. The thin film ceramic multilayer wiring board includes: a first conductive structure and a first insulating structure surrounding the first conductive structure, both constituting a multilayer wiring board body; a second insulating structure surrounding the first insulating structure; and a second conductive structure formed on an output pad of the first conductive structure. Here, the second conductive structure is formed by sequentially plating Cu, Ni and Au. According to the thin film ceramic multilayer wiring board and method of manufacturing the same, the second conductive structure is formed using a thin film conductive structure. Therefore, a fine pattern is readily implemented and high integration can be achieved.

Description

THE MANUFACTURING METHOD OF THE THIN FILM CERAMIC MULTI LAYER SUBSTRATE

Technical Field

[1] The present invention relates to a thin film ceramic multilayer wiring board and a method of manufacturing the same, and more particularly, to a thin film ceramic multilayer wiring board that is suitable for use as a highlyintegrated multilayer wiring board for a probe card which tests highfrequency modules for mobile communication, a microwave connector, a cable assembly, a semiconductor chip, etc., and a method of manufacturing the thin film ceramic multilayer wiring board. Background Art

[2] Developments in mobile communication technology over recent years have led to electronic components used in that field being rapidly miniaturized, multifunc- tionalized, modularized, and made to use higher frequencies. In such technology, for which consumer demand is high, a high or lowtemperature cofired ceramic multilayer wiring board is widely used.

[3] In other words, electronic devices using a semiconductor device, such as a semiconductor chip, etc., are lately being improved in terms of function and size. The integration density of semiconductor devices is increasing and they are being miniaturized and made with multiple pins. As a board having a builtin semiconductor device with more pins and a smaller size, a multilayer wiring board using a builtup method has been provided.

[4] In such a multilayer wiring board, a reinforcing material, such as a glass fiber fabric copper clad laminated board, is used as a core layer. An insulating layer and a wiring layer are selectively formed one on either surface of the core layer. Also, a fine wiring layer is formed on the multilayer wiring board so that a highlyintegrated semiconductor device can be installed on the fine wiring layer.

[5] A hightemperature cofired ceramic multilayer wiring board (HTCC_MLC) is formed by heat treatment at a temperature of 1500 ⁰C or more. For an insulating material of the HTCC_MLC, 94 % or more alumina is used as the main ingredient, a small amount of silica is used as an additive, and tungsten (W) that can be plasticized at high temperature is mainly used as an electrical conductor. The HTCC_MLC has excellent mechanical solidity and chemical resistance, and thus is frequently applied to a highlyintegrated package with a thin film conductive line formed thereon. However, the electrical conductivity of a tungsten conductor plasticized at high temperature is lower than that of silver (Ag) or copper (Cu), so that the HTCCMLC has a poor high- frequency characteristic. In addition, a coefficient of thermal expansion is about double that of a silicon semiconductor device, which is a serious problem in an application field requiring matching of thermal expansion coefficients.

[6] On the other hand, a lowtemperature cofired ceramic multilayer wiring board

(LTCC_MLC) is formed by heat treatment at a temperature of 900 ⁰C or less. Thus, a large amount of silica having a low melting point and a relatively small amount of alumina are used. As a plasticizing temperature is 900 ⁰C or less, silver or copper is used as an electrically conductive material. In addition, a resistor, an inductor and a condenser, which are passive devices, are installed in the board. Thus, the board is widely used for miniaturizing, multifunctionalizing, modularizing, and accommodating an electronic component for high frequency.

[7] However, the surface of the LTCC_MLC contains a large amount of silicon oxide

(SiO₂), and thus is easily etched in an etching process using a strongly acidic substance such as hydrofluoric acid (HF), or a strongly basic substance such as potassium hydroxide (KOH).

[8] A method for solving this problem is disclosed in Korean LaidOpen Patent Publication No. 1020070013063 entitled "Multilayered Wire Substrate and Method of Manufacturing the Same."

[9] The publication discloses a technique for solving the problem that the surface of an

LTCC_MLC including a silicon compound is easily etched in an etching process using a strongly acidic substance such as hydrofluoric acid (HF), or a strongly basic substance such as potassium hydroxide (KOH), because a first insulating structure, which is the surface of the LTCC_MLC, contains a large amount of silicon oxide (SiO₂

)•

[10] More specifically, to solve the abovementioned problem, a first insulating structure is completely covered and protected by a second insulating structure that is resistant to etchants, including strongly acidic substances such as hydrofluoric acid (HF) and strongly basic substances such as potassium hydroxide (KOH).

[11] As illustrated in FIG. 1, a multilayer wiring board body 1000a includes a first conductive structure 100 and a first insulating structure 200. The first conductive structure 100 includes at least one conductive pattern 10 and at least one conductive contact 20. The first insulating structure 200 surrounds the first conductive structure 100 to expose a part 101 of the first conductive structure 100 and includes an LTCC material that can be sintered even at about 1000 ⁰C or less. The upper surface of the first insulating structure 200 and that of the part 101 of the first conductive structure 100 are disposed at the same level. On the multilayer wiring board body 1000a, a second conductive structure 300 electrically connected with the part 101 of the first conductive structure 100 is disposed. In addition, a second insulating structure 400 sur- rounding the second conductive structure 300 and the multilayer wiring board body 1000a is disposed to partially expose the second conductive structure 300. On the surface of the second conductive structure exposed through the second insulating structure 400, a conductive coating film 500 is formed to protect the second conductive structure 300.

[12] Another example of a multilayer wiring board and a method of manufacturing the same is disclosed in Korean LaidOpen Patent Publication No. 20070028246 (March 12, 2007).

[13] FIG. 2 is a cross-sectional view of a multilayer wiring board disclosed in the publication. As illustrated in FIG. 2, the multilayer wiring board comprises a reinforcement wiring layer 103, a first insulating layer 104, an interconnection 105, a second insulating layer 106, an interconnection 108, a third insulating layer 107, an interconnection 110, a fourth insulating layer 109, and an interconnection 112, which are sequentially stacked from bottom to top. A solder resist 102 is formed on the lower surface of the first insulating layer 104, and a solder resist 120 is formed on the upper surface of the fourth insulating layer 109. The respective insulating layers 104, 106, 107 and 109 are formed of an epoxybased builtup resin having a thermosetting property. The interconnection 105 consists of a via plug part 105a and a pattern interconnection part 105b. The via plug part 105a is formed inside an opening formed in the first insulating layer 104, and the pattern interconnection part 105b is formed on the upper surface of the first insulating layer 104.

Disclosure of Invention

Technical Problem

[14] The techniques disclosed in the above publications have drawbacks in that a manufacturing method is complicated, and it is difficult to implement a highdensity wiring board. This is because a second insulating structure does not cover the output pad of a first conductive structure in a first insulating structure due to a screen printing process technique, and a second conductive structure is formed to connect the output pad to the outside.

[15] After the second insulating structure is formed by a plasma spray method to completely cover the first insulating structure and the second conductive structure and to have a thickness of 0.1 mm to 1.0 mm, both surfaces of the second insulating structure are sequentially lapped to expose an output pad of the second conductive structure. Here, the thickness and insulating characteristic of the lapped second insulating structure may vary according to the thickness of the second conductive structure and lapping process conditions, and additional process management is required for maintaining stable quality. [16] In addition, a thin film conductive structure is formed again on the exposed second conductive structure after the lapping process is finished, thereby further complicating the manufacturing process. Technical Solution

[17] The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a thin film ceramic multilayer wiring board appropriate for use in semiconductor component devices that are being miniaturized, multifunctionalized, modularized and using higher frequencies as mobile communication technology develops, and that has chemical resistance particularly in an etching process using a strongly acidic substance such as hydrofluoric acid (HF), or a strongly basic substance such as potassium hydroxide (KOH), and a method of manufacturing the thin film ceramic multilayer wiring board.

[18] Another object of the present invention is to provide a thin film ceramic multilayer wiring board and a method of manufacturing the same that require only a simple manufacturing process and can readily implement a fine pattern.

[19] According to the inventive thin film ceramic multilayer wiring board and method of manufacturing the same, the following effects can be obtained.

[20] A process is simplified by connecting a first conductive structure with a second conductive structure using a photolithography method. And, by forming the second conductive structure with a thin film conductive structure, a fine pattern is readily implemented so that high integration can be easily achieved.

[21] In addition, a second insulating structure made of aluminum oxide is formed by a physical deposition method, e.g., ebeam or sputtering, on a first insulating structure containing a substantial amount of silicon oxide, thus not exposing the first insulating structure to a strongly acidic substance such as hydrofluoric acid (HF), or a strongly basic substance such as potassium hydroxide (KOH). Consequently, it is possible to readily manufacture a ceramic multilayer wiring board having excellent chemical resistance.

[22]

Brief Description of Drawings

[23] FIG. 1 is a cross-sectional view of a conventional multilayer wiring board;

[24] FIG. 2 is a cross-sectional view of another conventional multilayer wiring board;

[25] FIG. 3 is a cross-sectional view of a thin film ceramic multilayer wiring board according to an exemplary embodiment of the present invention; and

[26] FIGS. 4 and 14 are cross-sectional views illustrating a method of manufacturing the thin film ceramic multilayer wiring board shown in FIG. 3 according to an exemplary embodiment of the present invention. Best Mode for Carrying out the Invention

[27] In order to accomplish the object, an aspect of the present invention provides a thin film ceramic multilayer wiring board comprising: a first conductive structure and a first insulating structure surrounding the first conductive structure, both constituting a multilayer wiring board body; a second insulating structure surrounding the first insulating structure; and a second conductive structure formed on an output pad of the first conductive structure. Here, the second conductive structure is formed by sequentially plating Cu, Ni and Au.

[28] The second conductive structure may be formed on the output pad of the first conductive structure to have a larger diameter than the output pad of the first conductive structure.

[29] The second insulating structure may be formed to a thickness of 0.3 to 3 μm.

[30] The output pad of the first conductive structure may be formed of a base metal layer, and the base metal layer may be formed by sequentially depositing Ti, Pd and Cu.

[31] The base metal layer may be formed to a thickness of 0.5 μm.

[32] Another aspect of the present invention provides a method of manufacturing a multilayer wiring board, comprising: forming a multilayer wiring board body including a first conductive structure and a first insulating structure surrounding the first conductive structure to expose a part of the first conductive structure; forming a photoresist layer on both surfaces of the multilayer wiring board body; exposing and developing the photoresist layer to form a photoresist protection layer on an output pad of the first conductive structure; forming a second insulating structure on the photoresist protection layer; and removing the photoresist protection layer and forming a second conductive structure on the output pad of the first conductive structure.

[33] The photoresist layer may be formed by a photolithography technique.

[34] The photoresist layer may be deposited to a thickness of 30 to 40 μm.

[35] In the step of forming the photoresist layer, an adhesion enhancer that increases adhesive strength between the photoresist layer and the multilayer wiring board body may be applied.

[36] The photoresist protection layer may be deposited to a thickness of 30 to 40 μm.

[37] The photoresist protection layer may be formed to have a larger diameter than the output pad of the first conductive structure.

[38] The second insulating structure may be formed to a thickness of 0.3 to 3 μm.

[39] The photoresist protection layer may be removed by photoresist stripping equipment.

[40] The second conductive structure may be formed after the photoresist protection layer is removed and a base metal layer is formed.

[41] The base metal layer may be formed to a thickness of about 0.5 μm by sequentially depositing Ti, Pd and Cu.

[42] The second conductive structure may be formed by sequentially plating Cu, Ni and

Au. Mode for the Invention

[43] The above and other objects, features and advantages of the present invention will be more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which:

[44] Hereinafter, the configuration of the present invention is described with reference to the accompanying drawings.

[45] Like reference numerals refer to like elements throughout the drawings, and such elements will only be described once.

[46] FIG. 3 is a cross-sectional view of a thin film ceramic multilayer wiring board according to an exemplary embodiment of the present invention.

[47] As illustrated in FIG. 3, a thin film ceramic multilayer wiring board according to an exemplary embodiment of the present invention comprises: a first conductive structure 1 and a first insulating structure 2 surrounding the first conductive structure 1, both constituting a multilayer wiring board body; a second insulating structure 3 surrounding the first insulating structure 2; and a second conductive structure 4 formed on an output pad of the first conductive structure 1. Here, the second conductive structure 4 is formed by sequentially plating Cu, Ni and Au.

[48] In addition, the second conductive structure 4 is formed on the output pad of the first conductive structure 1 to be larger than the diameter of the first conductive structure (see FIG. 9).

[49] In addition, in the thin film ceramic multilayer wiring board according to an exemplary embodiment of the present invention, the second insulating structure 3 is formed to a thickness of 0.3 to 3 μm.

[50] In addition, as illustrated in FIG. 9, the output pad of the first conductive structure 1 is formed of a base metal layer, which is formed by sequentially depositing Ti, Pd and Cu, and may have a thickness of about 0.5 μm.

[51] The process of manufacturing a thin film ceramic multilayer wiring board as shown in FIG. 3 will be described below with reference to FIGS. 4 to 14.

[52] First, the thin film ceramic multilayer wiring board is formed by a process of: manufacturing green sheets; forming via holes on the green sheets; filling the via holes with a metal; printing a conductive line pattern on the designed green sheets; laminating the green sheets on which the conductive pattern is printed by applying heat and pressure; simultaneously plasticizing the laminated green sheets at a designed temperature; and polishing both surfaces of the designed ceramic multilayer wiring board to adjust the flatness and thickness of the board. Through the process, a structure exposing output pads 5 of the first conductive structure 1 is obtained as illustrated in FIG. 4. Since the process employs the same technique as conventional art, a detailed description of the process will be omitted. In other words, the insulating layers and interconnections illustrated in FIG. 2 can be readily formed by a wellknown technique. Here, the respective green sheets and via holes are referred to as the first conductive structure 1, and insulating layers formed for the respective interconnections are referred to as the first insulating structure 2. The thin film ceramic multilayer wiring board of the present invention is not limited to the 31ayer structure shown in FIG. 4.

[53] However, according to the present invention, the first insulating structure 2 is not exposed to a strongly acidic substance such as hydrofluoric acid (HF), or a strongly basic substance such as potassium hydroxide (KOH). Before a second insulating structure 3 resistant to such chemicals is deposited, a dry sensitizer is deposited to a thickness of 30 to 40 μm by a photolithography method used in a semiconductor manufacturing process, as illustrated in FIG. 4, thereby forming a photoresist layer 6. The photoresist layer 6 is stacked on both surfaces of the board by common lamination equipment.

[54] Subsequently, the photoresist layer 6 is exposed and developed to have a figure shown in FIG. 6. More specifically, a photoresist protection layer 7 having a thickness of 30 to 40 μm is formed on both surfaces of the board so that the second insulating structure 3 does not cover the output pads 5 of the first conductive structure 1.

[55] Here, to increase adhesive strength between the deposition layer 5 of the dry sensitizer and the ceramic multilayer wiring board, an adhesion enhancer may be used. The diameter of the photoresist protection layer 7 is larger than that of the output pads 5 of the first conductive structure 1.

[56] Subsequently, in a state in which the photoresist protection layer 7 is formed, a second insulating structure 3 having a thickness of 1 to 3 μm is formed by an ebeam vacuum deposition or sputtering technique, which are physical deposition techniques, as illustrated in FIG. 7.

[57] Subsequently, the photoresist protection layer 7 is removed by photoresist stripping equipment, which is illustrated in FIG. 8. Here, it is possible to simultaneously and readily expose the output pads 5 on both surfaces of the first conductive structure 1.

[58] The present invention applies the process technique and removes from a screen printing method of conventional art a process of forming the second conductive structure 4 and a process of sequentially lapping both surfaces of the second insulating structure 3 to expose the second conductive structure 4, thereby simplifying the process. In particular, since the output pads of the second conductive structure 4 are not formed by the screen printing method, highdensity interconnection design is possible, and it is possible to manufacture a highlyintegrated thin film ceramic multilayer wiring board.

[59] Subsequently, the thin film wiring board shown in FIG. 3 is completed according to

FIGS. 9 to 14.

[60] More specifically, referring to FIG. 9, a base metal layer 8 for thin film interconnections is formed. Using the sputtering technique, which is a physical deposition technique, the base metal layer 8 is formed over both entire surfaces of the board to have a thickness of about 0.5 μm by sequentially depositing Ti, Pd and Cu, which are base metals, on both surfaces in a high vacuum chamber.

[61] Subsequently, as illustrated in FIGS. 10 and 11, a sensitizer is deposited on both surfaces of the board, and interconnections and pads are formed by an exposure and development process.

[62] Subsequently, as illustrated in FIG. 12, Cu, Ni and Au are sequentially deposited by an electroplating method to form pads.

[63] FIG. 13 illustrates a process after removing the sensitizer, and referring to FIG. 14, unnecessary base metal layers formed of Cu, Pd and Ti are sequentially etched.

[64] By the abovedescribed process, the second conductive structure 4 shown in FIG. 3 is completed.

[65] According to the thin film ceramic multilayer wiring board suggested in the present invention, the second insulating structure 3 is selectively deposited to a thickness of 0.3 to 3 μm by the photolithography method, thereby removing an additional lapping process. In addition, since the second conductive structure 4 is formed by a thin film pad forming process rather than the pad forming process of the screen printing method, it is possible to simplify the entire process and also design a highlyintegrated wiring board. Furthermore, silver (Ag) or copper (Cu), which have excellent electrical conductivity, is used for the conductive structure of the ceramic multilayer wiring board, and thus the board is particularly appropriate for high frequency and high integration.

[66] While the invention has been shown and described with reference to certain exemplary embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims. Industrial Applicability

[67] The present invention can be applied to a thin film ceramic multilayer wiring board that is appropriate for use as a highlyintegrated multilayer wiring board for a probe card used to test a highfrequency module for mobile communication, a microwave connector, a cable assembly, a semiconductor chip, and so on.

[68]

Claims

[1] A thin film ceramic multilayer wiring board comprising: a first conductive structure and a first insulating structure surrounding the first conductive structure, the first conductive structure and the first insulating structure constituting a multilayer wiring board body; a second insulating structure surrounding the first insulating structure; and a second conductive structure formed on an output pad of the first conductive structure, wherein the second conductive structure is formed by sequentially plating Cu, Ni and Au.

[2] The thin film ceramic multilayer wiring board of claim 1, wherein the second conductive structure is formed on the output pad of the first conductive structure to be larger than the output pad of the first conductive structure.

[3] The thin film ceramic multilayer wiring board of claim 2, wherein the second insulating structure is formed to a thickness of 0.3 to 3 μm.

[4] The thin film ceramic multilayer wiring board of claim 3, wherein the output pad of the first conductive structure is formed of a base metal layer, and the base metal layer is formed by sequentially depositing Ti, Pd and Cu.

[5] The thin film ceramic multilayer wiring board of claim 4, wherein the base metal layer is formed to a thickness of about 0.5 μm.

[6] A method of manufacturing a multilayer wiring board, comprising: forming a multilayer wiring board body including a first conductive structure and a first insulating structure surrounding the first conductive structure to expose a part of the first conductive structure; forming a photoresist layer on both surfaces of the multilayer wiring board body; exposing and developing the photoresist layer to form a photoresist protection layer on an output pad of the first conductive structure; forming a second insulating structure on the photoresist protection layer; and removing the photoresist protection layer and forming a second conductive structure on the output pad of the first conductive structure.

[7] The method of claim 6, wherein the photoresist layer is formed by a photolithography technique.

[8] The method of claim 7, wherein the photoresist layer is deposited to a thickness of 30 to 40 μm.

[9] The method of claim 8, wherein in the step of forming the photoresist layer, an adhesion enhancer that increases adhesive strength between the photoresist layer and the multilayer wiring board body is applied. [10] The method of claim 6, wherein the photoresist protection layer is formed to a thickness of 30 to 40 μm. [11] The method of claim 6, wherein the photoresist protection layer is formed to have a larger diameter than the output pad of the first conductive structure. [12] The method of claim 6, wherein the second insulating structure is formed to a thickness of 0.3 to 3 μm. [13] The method of claim 6, wherein the photoresist protection layer is removed by photoresist stripping equipment. [14] The method of claim 13, wherein the second conductive structure is formed after the photoresist protection layer is removed and a base metal layer is formed. [15] The method of claim 13, wherein the base metal layer is formed to a thickness of about 0.5 μm by sequentially depositing Ti, Pd and Cu. [16] The method of claim 15, wherein the second conductive structure is formed by sequentially plating Cu, Ni and Au.