JP4492187B2 - Multilayer positive temperature coefficient thermistor - Google Patents

Description

  The present invention relates to a laminated positive temperature coefficient thermistor (hereinafter simply referred to as a thermistor), and more particularly to improving the withstand voltage performance thereof.

  The required performance for the thermistor is withstand voltage performance. This withstand voltage performance is evaluated for the thermistor 101 having the structure shown in FIG. First, the structure of the thermistor in FIG. 7 will be described. The thermistor 101 includes a laminate 102 in which ceramic layers 103 and internal electrodes 104 and 105 are alternately laminated. External electrodes 108 and 109 are formed on end faces 106 and 107 facing the left and right in the drawing of the laminate 102. Each of the internal electrodes 104 and 105 is connected to each of the external electrodes 108 and 109 individually. A part of each of the internal electrodes 104 and 105 overlaps with each other in the stacking direction (see Patent Document 1).

In the thermistor 101 having the above configuration, in order to evaluate the withstand voltage performance, a voltage is gradually applied between the external electrodes 108 and 109 of the thermistor 101. In the central part of this, destruction may occur. The phenomenon of this breakdown will be explained. When a voltage is gradually applied between the external electrodes 108 and 109 of the thermistor 101, the laminate 102 generates heat due to the application of this voltage. Accumulated in the center of 102. A heat accumulation region at the center of the laminate 102 is denoted by reference numeral 110. When the amount of heat accumulated in the heat accumulation region 110 gradually increases, thermal runaway occurs and the semiconductor ceramic constituting the ceramic layer 103 is thermally melted, and in the central portion of the laminate 102 described above. It is thought that this leads to destruction.
JP-A-5-47508

  Therefore, the present invention solves the problem of improving the withstand voltage performance as a thermistor by suppressing the above-described breakdown phenomenon due to thermal runaway when a voltage is gradually applied to the external electrode in a withstand voltage test or the like. It should be a challenge.

The thermistor according to the present invention includes a laminated body composed of a plurality of laminated ceramic layers, first and second external electrodes formed at different positions on the outer surface of the laminated body, and an inside of the laminated body. A thermistor including first and second internal electrodes made of Ni, which are connected between the plurality of ceramic layers and connected to the first and second external electrodes, respectively. A thermistor invalid portion that does not function as a thermistor is provided at the central portion of the thermistor effective portion that functions as the thermistor in the stacking direction, and the thickness of one ceramic layer of the thermistor invalid portion and the ceramic layer of the thermistor effective portion The thickness per layer is equivalent .

  Here, the thermistor effective portion is a portion that functions as a thermistor by self-heating when a predetermined voltage is applied between the first and second external electrodes. The portion does not generate heat even when a voltage is applied between the second external electrodes.

  According to the present invention, for example, when a voltage is gradually applied to both external electrodes in a withstand voltage test, the laminated body generates heat when the voltage is applied, and the heat generated by the generated heat is accumulated in the central portion of the laminated body. It will be done. In this case, since there is a thermistor invalid portion that does not self-heat even when a voltage is applied between the first and second external electrodes and does not function as a thermistor at the substantially central portion of the laminate, As a result of alleviating the exothermic action at the portion, the occurrence of thermal runaway at the central portion of the laminate is suppressed. As a result of the above, in the present invention, when a voltage is gradually applied to the external electrode in a withstand voltage test or the like, the semiconductor ceramic constituting the ceramic layer is thermally melted and the central portion of the laminate is destroyed. Therefore, it is possible to provide a thermistor with improved withstand voltage performance.

  In the above thermistor, it is preferable that the thermistor ineffective portion is constituted by a pair of equipotential electrodes opposed to each other in the laminating direction at a substantially central portion inside the laminate and a ceramic layer interposed between the equipotential electrodes. . Furthermore, a plurality of thermistor invalid portions may be provided in the substantially central portion inside the laminated body so as to face each other in the laminating direction.

  According to the present invention, the thermistor ineffective portion provided in the substantially central portion inside the laminated body can reduce the heat generation in the thermistor effective portion inside the laminated body. As a result, in the substantially central portion inside the laminated body. Therefore, it is possible to provide a thermistor with improved withstand voltage performance.

Hereinafter, the thermistor according to the best mode for carrying out the present invention will be described with reference to the drawings. FIG. 1 is a sectional view of a thermistor, and FIG. 2 is an exploded perspective view of a laminated body of the thermistors. Referring to these drawings, the thermistor 1 includes a rectangular parallelepiped laminated body 2. The laminated body 2 is usually rounded at its corners and ridges by barrel polishing. The laminate 2 has a structure in which a plurality of ceramic layers 3 having a positive resistance temperature coefficient are laminated. The ceramic layer 3 is made of, for example, a BaTiO ₃ based semiconductor ceramic.

  A plurality of first and second internal electrodes 4 and 5 are formed inside the multilayer body 2 and between the plurality of ceramic layers 3. The first and second internal electrodes 4, 5 are alternately arranged in such a state that one end sides thereof overlap each other in the stacking direction with the ceramic layer 3 interposed therebetween. The first and second internal electrodes 4 and 5 contain, for example, nickel as a conductive component. The other end sides of the first and second inner electrodes 4 and 5 are on the outer surface of the laminate 2 and are exposed to the first and second outer end surfaces 7 and 8 facing each other.

  The first and second external electrodes 9 and 10 are formed on the first and second outer end surfaces 7 and 8 of the multilayer body 2, respectively, and are exposed on the outer end surfaces 7 and 8. Each of the internal electrodes 4 and 5 is electrically connected. The first and second external electrodes 9 and 10 are respectively an ohmic electrode layer as a base layer capable of making ohmic contact with each of the first and second internal electrodes 4 and 5, and the ohmic electrode. And a plating layer made of solder or the like formed on the surface of the electrode layer. The ohmic electrode layer is formed, for example, by sputtering, and is formed on the first and second outer end surfaces 7 and 8 of the multilayer body 2; a Ni—Cu layer formed on the surface of the Cr layer; It is comprised from the Ag layer formed in the surface of this Ni-Cu layer. The plating layer may be formed by Ni plating, Sn plating, or the like in addition to the above-described solder plating, and is usually formed using electroplating. The first and second external electrodes 9 and 10 are not limited to those formed by sputtering, but may be any one that can make ohmic contact with the first and second internal electrodes 4 and 5. Further, a glass coat (not shown) may be applied to a region on the outer surface of the laminated body 2 and not covered with the first and second external electrodes 9 and 10. When the firing process for obtaining the laminate 2 is performed in a reducing atmosphere, PTC characteristics are exhibited by performing re-oxidation firing. At the same time, this re-oxidation firing process and heat treatment for forming a glass coat are performed. You may make it perform.

  The features of the present embodiment will be described. The laminate 2 includes a thermistor effective portion (heat generating portion) 20 that functions as a thermistor by self-heating when a predetermined voltage is applied between the external electrodes 9 and 10, and a thermistor effective portion. Protective portions 21 and 22 made of ceramic layers 3 are provided on the outermost layers on the upper and lower sides of the laminate 2 on the outer side in the stacking direction. The thermistor effective portion 20 is formed between the internal electrodes 4 and 5 disposed at both ends in the stacking direction, and the internal electrodes 4 and 5 are alternately disposed in the stacking direction with the ceramic layer 3 interposed therebetween. It is configured.

  In the central portion of the thermistor effective portion 20 in the stacking direction, the first and second thermistor invalid portions (non-heat generating portions) that do not self-heat even when a voltage is applied between the external electrodes 9 and 10 and do not function as a thermistor. 23 and 24 are formed.

  The first thermistor invalid portion 23 is composed of a pair of first internal electrodes 4 and 4 that are at the same potential in the stacking direction and a ceramic layer 3 interposed between the pair of first internal electrodes 4 and 4. Has been. Such a thermistor invalid portion 23 is formed by successively laminating two printing sheets on which the first internal electrodes 4 are formed.

  The second thermistor invalid portion 24 includes a pair of second internal electrodes 5 and 5 that are set to the same potential in the stacking direction and a ceramic layer 3 interposed between the pair of first internal electrodes 5 and 5. Has been. Such a second thermistor invalid portion 24 is formed by successively laminating two printing sheets on which the second internal electrodes 5 are formed.

  As described above, portions of the thermistor effective portion 20 excluding the first thermistor invalid portion 23 and the second thermistor invalid portion 24 become the heat generating portions 15, 16, and 17.

  According to the thermistor 1 configured as described above, the thermistor invalid portions 23 and 24 that do not function as the thermistor are provided in the central portion of the thermistor effective portion 20 in the stacking direction. The breakdown is suppressed, and the withstand voltage performance of the thermistor 1 is improved. The first thermistor invalid part 23 made of the first internal electrode 4 and the second thermistor invalid part 24 made of the second internal electrode 5 are provided in pairs, and the amount of diffusion of Ni is biased And the variation in PTC characteristics can be prevented.

  In the present embodiment, the first thermistor invalid portion 23 and the second thermistor invalid portion 24 are a pair of two printing sheets on which the first and second internal electrodes 4 and 5 are formed, respectively. As long as it is disposed in the central part in the stacking direction, the same effect can be obtained even if a number of pairs are stacked before and after the stacking direction.

  FIG. 3 and subsequent figures show other embodiments of the present invention.

The thermistor 30 shown in FIG. 3 is provided with one thermistor invalid portion 32 at the central portion of the thermistor effective portion 31 in the stacking direction with a pair of two print sheets on which the first internal electrodes 4 are formed. The thermistor 40 shown in FIG. 4 does not reach both ends 7 and 8 of the multilayer body 2 at the central portion in the stacking direction of the thermistor effective portion 41 and is not connected to any of the first and second external electrodes 9 and 10. One thermistor invalid part 42 is provided as a pair of two printing sheets on which the third internal electrode 11 is formed. The thermistor 50 shown in FIG. 5 is provided with two thermistor ineffective portions 52 adjacent to each other in the stacking direction in the central portion of the thermistor effective portion 51 in the stacking direction, with three print sheets on which the first internal electrodes 4 are formed as a pair. It is a thing. A thermistor 60 shown in FIG. 6 is provided with one thermistor invalid portion 62 at the central portion of the thermistor effective portion 61 in the stacking direction, with two print sheets on which the second internal electrodes 5 are formed as a pair. In addition, although the space | interval of an electrode may differ, an equal space | interval is preferable. In particular, when the internal electrode is Ni, Ni diffuses into the ceramic layer during firing. If the distance between the layers is different, the Ni concentration diffused in each layer changes. As a result, variations occur in the PTC characteristics, and equal intervals are desirable. Further, the equipotential layer may be increased or decreased within a range allowed by a desired resistance value. Furthermore, the thickness of the ceramic layer is appropriately determined depending on required performance such as element size, element resistance value, element strength, and the like.
Example 1
The thermistor 1 shown in FIGS. 1 and 2 was subjected to an evaluation test for confirming the effect.

First, BaCO ₃ , TiO ₂ , and Sm ₂ O ₃ were used as raw materials to prepare (Ba _0.9998 Sm _0.0002 ) TiO ₃ . Next, pure water was added to the obtained powder, mixed and pulverized with zirconia balls for 10 hours, dried, and calcined at 900 ° C. for 2 hours. An organic binder, a dispersant, and water were added to the calcined powder and mixed with zirconia balls for several hours, and then a green sheet 6 having a thickness of 30 μm was formed. Next, Ni electrode pastes 4 and 5 were applied onto the green sheet 6 by a method such as screen printing and dried to prepare a normal internal electrode printing sheet.

  Next, the thermistor invalid portions 23 and 24 that do not contribute to heat generation are produced by forming two pairs of printing sheets each having the Ni electrode pastes 4 and 5 in the same direction as a pair in the stacking direction. , 5 are stacked one by one so that the thermistor effective portion 20 is produced by laminating printing sheets. Further, the green sheets 6 to be the protective layers 21 and 22 were arranged above and below the thermistor effective portion 20 and pressed, and then cut into predetermined dimensions to obtain raw chip elements.

The raw chip element was degreased in air at 400 ° C. for 2 hours, and then fired at 1300 ° C. for 2 hours in a reducing atmosphere of H ₂ / N ₂ = 3%. This fired element was mixed with polishing media made of SiO _2, Al ₂ O ₃ or the like, and barrel polishing was performed to obtain a laminate 2 in which the corners of the element and the corners of the ridge line parts were rounded.

  Next, after performing re-oxidation heat treatment, electrode materials are applied to both ends 7 and 8 of the multilayer body 2 by sputtering from the ceramic body side in order so as to become a Cr layer, a Ni—Cu layer, and an Ag layer, respectively. First and second external electrodes 9 and 10 electrically connected to the first and second internal electrodes 4 and 5 were formed. Finally, a solder film is formed by sputtering, and the thickness of the ceramic layer of the thermistor effective part and the ceramic layer of the thermistor ineffective part is 30 μm, and the room temperature resistance is 0.3Ω. A chip-like thermistor 1 was obtained.

  As a comparative example, a sample in which all the printing sheets on which the first and second internal electrodes 4 and 5 were formed as shown in FIG. The manufacturing method was the same as that in the present embodiment, and a chip-type laminated positive temperature coefficient thermistor having a room temperature resistance value of 0.3Ω was obtained.

  A withstand voltage test was performed using 20 thermistors of Example 1 and the comparative example. The withstand voltage test is performed by stepping up by holding a laminated positive temperature coefficient thermistor in a terminal connected in series with a DC power supply and applying and holding every 20V to 2V for 1 minute until the laminated positive temperature coefficient thermistor breaks down. The immediately preceding voltage was taken as the withstand voltage of the thermistor.

  Table 1 shows the results of the withstand voltage test. Table 1 shows the average value, maximum value, minimum value, and standard deviation value of the withstand voltage. The standard deviation value represents the variation between the samples.

表１に示されるように、素子中央部に発熱寄与しないサーミスタ無効部２３，２４を設けた実施例１では耐電圧の平均値が４２．９Ｖとなり、比較例の耐電圧の平均値である３１．７Ｖに比べて向上した。これは、耐電圧試験において素子中央部で生じるホットスポットが緩和され、耐電圧の向上が図れたことを示している。

As shown in Table 1, in Example 1 in which thermistor invalid portions 23 and 24 that do not contribute to heat generation are provided in the center of the element, the average withstand voltage is 42.9 V, which is the average withstand voltage of the comparative example 31. Improved compared to .7V. This indicates that the hot spot generated at the center of the element in the withstand voltage test was relaxed, and the withstand voltage was improved.

Table 2 shows the results of the PTC characteristic test. Table 2 shows resistance change widths and standard deviation values. The resistance change width is represented by log (R ₂₅₀ / R ₂₅ ). That is, the maximum resistance value from room temperature (25 ° C.) to 250 ° C. is divided by the minimum resistance value, and the common logarithm is used. The standard deviation value represents the variation between the samples.

  Further, Example 1 is the thermistor 1 shown in FIGS. 1 and 2, and Example 2 has a thickness of 30 μm per ceramic layer of the thermistor effective portion and a thickness of 60 μm of the thermistor ineffective portion ceramic layer. A thermistor having a chip shape of 2.0 mm × 1.2 mm and a room temperature resistance of 0.3Ω was obtained. The size of the thermistor was adjusted by reducing the thickness of the protective layers 21 and 22 by increasing the thickness of the ineffective layer.

  And the PTC characteristic test was implemented using the data of Example 1 and Example 2 20 pieces each.

表２に示されるように、素子中央部に発熱に寄与しないサーミスタ無効部のセラミック層１層の厚みが、サーミスタ有効部のセラミック層１層あたりの厚みと同等である実施例１は、抵抗変化幅が大きく、標準偏差値も低いことが判る。これにより、サーミスタ無効部のセラミック層１層の厚みと、サーミスタ有効部のセラミック層１層あたりの厚みが同等であることが好ましいことが判る。

As shown in Table 2, Example 1 in which the thickness of one ceramic layer of the thermistor ineffective portion that does not contribute to heat generation at the center of the element is equal to the thickness per ceramic layer of the thermistor effective portion is the resistance change. It can be seen that the width is large and the standard deviation value is low. Thereby, it turns out that it is preferable that the thickness of one ceramic layer of a thermistor invalid part and the thickness per ceramic layer of a thermistor effective part are equivalent.

  The thermistor of the present invention is useful as a constant temperature heating element, a current limiting element, a temperature control element and the like.

Sectional view of the thermistor according to the best mode of the present invention 1 is an exploded perspective view of the thermistor laminate of FIG. Sectional drawing of the thermistor which concerns on the other form of this invention. Sectional drawing of the thermistor which concerns on other form of this invention. Sectional drawing of the thermistor which concerns on other form of this invention. Sectional drawing of the thermistor which concerns on other form of this invention. Sectional view of a conventional thermistor

Explanation of symbols

1, 30, 40, 50, 60 Thermistor 2 Laminated body 3 Ceramic layers 4, 5, 11 Internal electrodes 7, 8 End face 9, 10 External electrodes 20, 31, 41, 51, 61 Thermistor effective part 21, 22 Protection part 23 , 24, 32, 42, 52, 62 Thermistor invalid part

Claims (3)

A laminated body composed of a plurality of laminated ceramic layers; first and second external electrodes formed at different positions on the outer surface of the laminated body; and the plurality of ceramic layers inside the laminated body And a first and second internal electrodes made of Ni connected to the first and second external electrodes, respectively, and a laminated positive temperature coefficient thermistor,
The center portion inside the laminated body, the thermistor effective portion that functions as the thermistor is provided in the stacking direction central portion, the thermistor invalid portion that does not function as the thermistor ,
A laminated positive temperature coefficient thermistor characterized in that the thickness of one ceramic layer of the thermistor ineffective portion is equal to the thickness per ceramic layer of the thermistor effective portion .   The ineffective portion of the thermistor is composed of a pair of equipotential electrodes opposed in the laminating direction at a substantially central portion inside the laminate, and a ceramic layer interposed between the equipotential electrodes. The laminated positive temperature coefficient thermistor according to claim 1.   3. The stacked positive temperature coefficient thermistor according to claim 2, wherein a plurality of thermistor invalid portions are provided in a substantially central portion inside the stacked body so as to face each other in the stacking direction.

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