JP4488569B2 - 最短時間ｐｌｌ回路 - Google Patents

最短時間ｐｌｌ回路 Download PDF

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Publication number
JP4488569B2
JP4488569B2 JP36476899A JP36476899A JP4488569B2 JP 4488569 B2 JP4488569 B2 JP 4488569B2 JP 36476899 A JP36476899 A JP 36476899A JP 36476899 A JP36476899 A JP 36476899A JP 4488569 B2 JP4488569 B2 JP 4488569B2
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Japan
Prior art keywords
output
time scale
circuit
signal
time
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Expired - Lifetime
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JP36476899A
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English (en)
Japanese (ja)
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JP2001175302A5 (enExample
JP2001175302A (ja
Inventor
仁志 近藤
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日本テキサス・インスツルメンツ株式会社
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Priority to JP36476899A priority Critical patent/JP4488569B2/ja
Priority to US09/741,360 priority patent/US6724264B2/en
Priority to PCT/IB2000/002044 priority patent/WO2001047110A2/en
Priority to EP00992210A priority patent/EP1250756A2/en
Publication of JP2001175302A publication Critical patent/JP2001175302A/ja
Publication of JP2001175302A5 publication Critical patent/JP2001175302A5/ja
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B13/00—Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion
    • G05B13/02—Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion electric
    • G05B13/04—Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion electric involving the use of models or simulators
    • G05B13/042—Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion electric involving the use of models or simulators in which a parameter or coefficient is automatically adjusted to optimise the performance
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B5/00—Anti-hunting arrangements
    • G05B5/01—Anti-hunting arrangements electric
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/107—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Automation & Control Theory (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Vision & Pattern Recognition (AREA)
  • Medical Informatics (AREA)
  • Software Systems (AREA)
  • Evolutionary Computation (AREA)
  • Health & Medical Sciences (AREA)
  • Artificial Intelligence (AREA)
  • Feedback Control In General (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Circuits Of Receivers In General (AREA)
  • Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
  • Paper (AREA)
JP36476899A 1999-12-22 1999-12-22 最短時間ｐｌｌ回路 Expired - Lifetime JP4488569B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP36476899A JP4488569B2 (ja) 1999-12-22 1999-12-22 最短時間ｐｌｌ回路
US09/741,360 US6724264B2 (en) 1999-12-22 2000-12-19 Controller for a device with change in characteristics
PCT/IB2000/002044 WO2001047110A2 (en) 1999-12-22 2000-12-21 Method and apparatus for changing characteristics of device
EP00992210A EP1250756A2 (en) 1999-12-22 2000-12-21 Method and apparatus for changing characteristics of device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP36476899A JP4488569B2 (ja) 1999-12-22 1999-12-22 最短時間ｐｌｌ回路

Publications (3)

Publication Number Publication Date
JP2001175302A JP2001175302A (ja) 2001-06-29
JP2001175302A5 JP2001175302A5 (enExample) 2007-02-08
JP4488569B2 true JP4488569B2 (ja) 2010-06-23

Family

ID=18482621

Family Applications (1)

Application Number Title Priority Date Filing Date
JP36476899A Expired - Lifetime JP4488569B2 (ja) 1999-12-22 1999-12-22 最短時間ｐｌｌ回路

Country Status (4)

Country Link
US (1) US6724264B2 (enExample)
EP (1) EP1250756A2 (enExample)
JP (1) JP4488569B2 (enExample)
WO (1) WO2001047110A2 (enExample)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006190145A (ja) * 2005-01-07 2006-07-20 Omron Corp 店舗管理システム、店舗制御装置および店舗制御方法、管理サーバおよび管理方法、並びにプログラム
JP4207076B2 (ja) * 2006-09-29 2009-01-14 ブラザー工業株式会社 適応制御装置、画像形成装置、およびプログラム
US7869554B2 (en) * 2007-06-06 2011-01-11 Honeywell International Inc. Phase/frequency estimator-based phase locked loop
TWI416876B (zh) * 2009-07-22 2013-11-21 Realtek Semiconductor Corp 頻率相位調整裝置及其相關方法
US20110257768A1 (en) * 2010-03-26 2011-10-20 International Business Machines Corporation Control of a dynamic system cross reference to related application
US9395708B2 (en) 2013-03-11 2016-07-19 Johnson Controls Technology Company Systems and methods for adaptive sampling rate adjustment
US10324424B2 (en) 2013-03-11 2019-06-18 Johnson Controls Technology Company Control system with response time estimation and automatic operating parameter adjustment
TWI531152B (zh) * 2013-04-23 2016-04-21 廣達電腦股份有限公司 風扇控制裝置及其方法
JP6563378B2 (ja) * 2016-11-04 2019-08-21 株式会社東芝 自動電圧調整器、自動電圧調整方法、自動電圧調整プログラム、発電機励磁システムおよび発電システム
US10868857B2 (en) 2017-04-21 2020-12-15 Johnson Controls Technology Company Building management system with distributed data collection and gateway services
US10333810B2 (en) 2017-06-09 2019-06-25 Johnson Controls Technology Company Control system with asynchronous wireless data transmission
US10739028B2 (en) * 2017-06-09 2020-08-11 Johnson Controls Technology Company Thermostat with efficient wireless data transmission
CN109062208B (zh) * 2018-08-03 2021-08-10 合肥工业大学 一种不确定轮式移动机器人的自适应轨迹跟踪控制电路

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2874906A (en) 1955-03-24 1959-02-24 Honeywell Regulator Co Control apparatus with process analog
JPS5926124B2 (ja) * 1975-09-19 1984-06-25 日本電気株式会社 位相同期回路
US4349868A (en) 1980-06-23 1982-09-14 Hewlett-Packard Company Sampled control loop with dynamic gain optimization
JPS6228086Y2 (enExample) * 1980-12-08 1987-07-18
US4855683A (en) 1987-11-18 1989-08-08 Bell Communications Research, Inc. Digital phase locked loop with bounded jitter
CN1057852C (zh) 1989-03-20 2000-10-25 株式会社日立制作所 过程控制装置及调整过程控制装置中控制器的工作参数的方法
JP2712706B2 (ja) 1990-02-14 1998-02-16 国際電信電話株式会社 適応位相検出同期方法
US5036294A (en) 1990-12-03 1991-07-30 Motorola Inc. Phase locked loop having low-frequency jitter compensation
US5241285A (en) 1991-10-03 1993-08-31 Apogee Electronics Corporation Phase locked loop reference slaving circuit
US5450447A (en) 1992-09-30 1995-09-12 Rockwell International Corporation Adaptive variable-gain phase and frequency locked loop for rapid carrier acquisition
US5420545A (en) 1993-03-10 1995-05-30 National Semiconductor Corporation Phase lock loop with selectable frequency switching time
JPH088737A (ja) * 1994-06-21 1996-01-12 Sony Corp 周波数シンセサイザ
US5808573A (en) 1996-08-01 1998-09-15 Nec Electronics Incorporated Methods and structure for sampled-data timing recovery with reduced complexity and latency
JPH1124782A (ja) * 1997-07-07 1999-01-29 Matsushita Electric Ind Co Ltd マイクロプロセッサのクロック制御方法およびクロック制御型マイクロプロセッサシステム
US6041172A (en) 1997-11-26 2000-03-21 Voyan Technology Multiple scale signal processing and control system
US6473478B1 (en) * 1998-05-14 2002-10-29 Texas Instruments Incorporated Digital phase-locked loop with phase optimal frequency estimation

Also Published As

Publication number Publication date
WO2001047110A3 (en) 2002-06-06
JP2001175302A (ja) 2001-06-29
US20010038316A1 (en) 2001-11-08
US6724264B2 (en) 2004-04-20
EP1250756A2 (en) 2002-10-23
WO2001047110A2 (en) 2001-06-28

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