JP4483004B2 - Printed wiring board - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a printed wiring board used for, for example, an LED panel for displaying an image by arranging a large number of light emitting diodes (LEDs).
[0002]
[Prior art]
As an LED panel for image display, a display panel 51 and a circuit board 52 are conventionally used as shown in FIG. Each of the display board 51 and the circuit board 52 is formed by forming a wiring pattern on the surface of an insulating base material. The LED chip 53 is mounted on the display board 51, and the display board is mounted on the circuit board 52. Various circuit components 54 such as a driver IC for controlling the LED chip 53 mounted on 51 are mounted, and the wiring patterns of the display substrate 51 and the circuit substrate 52 are electrically connected via the pin header 61. In general, the LED chip 53 is electrically connected to the wiring pattern of the display substrate 51 on the one electrode side and electrically connected to the wiring pattern of the display substrate 51 on the other electrode side by bonding of the wire 53a.
[0003]
Both the display substrate 51 and the circuit substrate 52 are common in that a copper plating pattern is formed on the surface of the base material, but the display substrate 51 has a high bonding property and is oxidized for wire bonding of the LED chip 53 to be mounted. There is a need for non-Au plating. Therefore, conventionally, as shown in FIG. 3, the copper pattern 51a is formed on the surface of the display substrate 51, and the Ni plating layer 51b and the Au plating layer 51c are stacked in order to mount the LED chip 53. The Au plating layer 51c is usually formed by electrolytic plating after the Ni plating layer 51b is formed on the surface of the copper pattern 51a.
[0004]
On the other hand, the LED panel has been made thinner, and instead of the combination of two display substrates 51 and circuit boards 52, as shown in FIG. It came to be used. That is, by making the upper surface side of the main substrate 55 a display substrate surface that is a conductive mounting surface of the LED chip 53 and the lower surface side is a mounting surface of the circuit component 54, the thickness can be reduced. In order to form a wiring pattern on both the front and back surfaces of one main board 55, a through hole may be formed in advance in the base material of the main board 55, and a pattern formed on the inner periphery of this through hole. This is a connection pattern 55a for conducting the wiring patterns on both the front and back surfaces.
[0005]
[Problems to be solved by the invention]
As described above, when the LED chip 53 and the circuit component 54 are mounted on both the front and back surfaces of one main substrate 55 to form a circuit pattern, the circuit pattern becomes considerably complicated. An Au plating layer 51c needs to be applied to the surface on which the LED chip 53 is mounted because of the wire bond specification. Conventionally, the LED chip 53 is mounted only on the display substrate 51. A wiring pattern of the LED chip 53 is formed on the display substrate 51, and lead wires for electrolytic Au plating are formed on all independent patterns. In the production of the display substrate 51, the process of forming the copper pattern 51a, the Ni plating layer 51b, and the Au plating layer 51c is advanced as shown in FIG. It was possible to apply plating. In addition, since the circuit board 52 is not of a wire bond specification, it can be manufactured by a flux treatment to prevent oxidation of copper after normal copper plating.
[0006]
However, when the LED chip 53 is mounted on the front surface of one main substrate 55 and the circuit component 54 is mounted on the back surface as in today, a circuit pattern can be formed. It is physically impossible to form the lead lines in all independent patterns. When the lead wire for electrolytic Au plating is formed only on the LED surface side of the wire bond specification, while the Au plating is performed in the Au plating process at the time of manufacturing the substrate, it is used for Au plating of a circuit portion that is not related to the wiring pattern of the LED. Since the copper pattern 51a is exposed in the pattern having no lead line, the impurities on the copper surface are dissolved in the Au plating tank during the Au plating process, and the Au plating tank is soiled. Moreover, since the copper pattern of a circuit part will be oxidized with the heat | fever at the time of a process, there exists a problem that it cannot manufacture substantially.
[0007]
If reduced electroless Au plating is used for such problems, oxidation of the copper pattern and contamination of the Au plating solution can be avoided. However, reduced electroless Au plating has a much higher processing cost than electrolytic Au plating, and cannot cope with mass production. Further, it is widely known that the reduction electroless plating can protect the copper pattern, but the bonding performance of the Au plating is remarkably lowered. Therefore, even if the wire 53a of the LED chip 53 is bonded to a bonding area by Au plating, there is a problem that the degree of bonding is weak and the reliability is lacking.
[0008]
SUMMARY OF THE INVENTION An object of the present invention is to provide a printed wiring board that has a high bonding property even with a complicated circuit pattern and that can be manufactured at low cost by using existing electrolytic plating equipment and bonding equipment as they are.
[0009]
[Means for Solving the Problems]
The present invention provides a printed wiring board in which one surface side of one substrate is a mounting surface for a semiconductor light emitting element and the other surface side is a mounting surface for a circuit component, and patterns are formed on both the front and back surfaces of the substrate with copper plating layers. In addition, an Ni plating layer is laminated on the copper plating layer on each of the mounting surfaces of the semiconductor light emitting element and the circuit component, and an Au plating layer is laminated on the Ni plating layer by a substitutional electroless Au plating method. The mounting surface of the semiconductor light emitting device is characterized in that an Au plating layer for bonding is laminated on the Au plating layer by an electrolytic Au plating method.
[0010]
DETAILED DESCRIPTION OF THE INVENTION
According to the first aspect of the present invention, one surface side of one substrate is used as a mounting surface for a semiconductor light emitting element, and the other surface side is used as a mounting surface for a circuit component. A printed wiring board having a Ni plating layer laminated on the copper plating layer on each of the mounting surfaces of the semiconductor light emitting element and the circuit component so as to cover all surfaces of the copper plating layer and the Ni plating An Au plating layer was laminated on the layer by a substitutional electroless Au plating method, and an Au plating layer for bonding was laminated on the Au plating layer by an electrolytic Au plating method on the mounting surface of the semiconductor light emitting element. The printed wiring board is characterized in that the Au plating layer formed by the substitutional electroless Au plating method has an action of protecting the oxidation of the copper plating layer.
[0011]
FIG. 1 is a longitudinal sectional view showing an outline of a wiring pattern of a printed wiring board according to an embodiment of the present invention.
[0012]
In FIG. 1, an insulating substrate 1 has an upper surface as an LED chip mounting surface and a lower surface as a circuit component mounting surface, and has a wiring pattern formed by plating on both front and back surfaces.
[0013]
First, a copper pattern by the copper plating layer 2 is formed on both the front and back surfaces of the substrate 1. When the copper plating layer 2 is a substrate 1 made of, for example, a copper clad laminate having a copper foil uniformly formed on the surface thereof, a through hole is first opened in the substrate material, and then an electroless copper plating method is used. Formed by. In this step, copper plating is also applied to the inner peripheral surface of the through hole, and then a copper pattern by the copper plating layer 2 is formed through steps such as etching.
[0014]
After the formation of the copper plating layer 2, the Ni plating layer 3 and the Au plating layer 4 are formed in order. These Ni plating layer 3 and Au plating layer 4 are formed by electroless plating capable of covering all surfaces of the copper plating layer 2. The Ni plating layer 3 is formed by a conventional Ni plating method. On the other hand, the Au plating layer 4 is formed by a substitutional electroless Au plating method. This substitutional electroless Au plating method is called a so-called flash plating method, and does not require plating wiring, and the processing cost can be reduced to about 1/3 compared with the electrolytic plating method. In the substitutional electroless Au plating method, the reaction stops at the stage of the entire surface substitution, so that the thickness of the Au plating layer 4 is about 0.05 μm in a normal case.
[0015]
By forming the Ni plating layer 3 and the Au plating layer 4 in this way, all the copper patterns of the copper plating layer 2 of the substrate 1 are coated with the Au plating layer 4, and the oxidation of the copper plating layer 2 is surely prevented. At the same time, elution of copper by heating becomes difficult to occur.
[0016]
After the Au plating layer 4 is plated on both sides of the substrate 1, Au plating for wire bonding is formed on the side on which the LED is mounted. This is due to the step of applying the Au plating layer 5 for bonding by electrolytic plating after applying the Au plating layer 4, and the formed Au plating layer 5 for bonding corresponds to the wire bonding area when the LED is conductively mounted. To do. When the plating Au plating layer 5 is electrolytically plated, the substrate 1 is immersed in a plating solution and heated, but the copper plating layer 2 is covered with an Au plating layer 4 formed by substitutional electroless Au plating. Therefore, it does not contact the plating solution. For this reason, the adhering impurities on the surface of the copper plating layer 2 are not eluted into the plating solution.
[0017]
In the above configuration, since the pattern of the copper plating layer 2 formed on both surfaces of the substrate 1 is covered with the Au plating layer 4, a pattern in which the Au plating portion and the copper plating portion are not mixed as in the conventional case is obtained. Accordingly, the electrolytic Au plating on the circuit component mounting surface side where the lead wire for electrolytic Au plating cannot be formed becomes unnecessary, and the lead wire for electrolytic Au plating can be formed on the LED mounting surface side to form the bonding Au plating layer 5. .
[0018]
In addition, since the bonding Au plating layer 5 is formed by electrolytic Au plating in the final process on the surface side where the LED is mounted and mounted, the bonding property of the wire can be maintained high. And since reduction electroless type Au plating is not required, the manufacturing cost can be reduced, and the existing electrolytic plating equipment and the bonding apparatus can be used as they are, so that it is not necessary to change the manufacturing equipment.
[0019]
【The invention's effect】
In the present invention, the pattern of the copper plating layer formed on both the front and back surfaces of the substrate is covered with the Au plating layer by substitutional electroless Au plating, so there is no pattern of only the copper plating part even in a complicated circuit pattern. In addition, impurities on the copper surface do not dissolve in the electrolytic Au plating layer. Therefore, a Au plating layer for bonding in a later process can be formed by electrolytic Au plating, and a product that has high bonding properties and can maintain stable conduction of the semiconductor light emitting element can be provided.
[0020]
In addition, since the Au plating for bonding can be formed without using reduced electroless Au plating, the cost can be reduced, and the existing electrolytic plating equipment and the bonding apparatus can be used as they are, so that it is not necessary to change the equipment.
[Brief description of the drawings]
FIG. 1 is a schematic longitudinal sectional view showing a multilayer plating structure of a printed wiring board according to the present invention. FIG. 2 is a conventional substrate structure for an LED panel, showing an example of a combination of a display substrate and a circuit substrate. FIG. 3 is a schematic longitudinal sectional view showing a laminated plating structure of a display substrate in the example of FIG. 2. FIG. 4 is a diagram showing a LED mounting surface on one side of one main substrate and a circuit component mounting surface on the other side. Schematic diagram of the example
1 Substrate 2 Copper plating layer 3 Ni plating layer 4 Au plating layer 5 Au plating layer for bonding

Claims (1)

A printed wiring board in which one surface side of one substrate is a mounting surface of a semiconductor light emitting element and the other surface side is a mounting surface of a circuit component, and a pattern is formed with a copper plating layer on both front and back surfaces of the substrate, A Ni plating layer is laminated on the copper plating layer on each of the mounting surfaces of the semiconductor light emitting element and the circuit component so as to cover all surfaces of the copper plating layer, and a substitutional electroless Au is formed on the Ni plating layer. A printed wiring board, wherein an Au plating layer is laminated by a plating method, and a bonding Au plating layer is laminated on the Au plating layer by an electrolytic Au plating method on the mounting surface of the semiconductor light emitting element.

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