JP4477705B2 - 差動増幅回路 - Google Patents

差動増幅回路 Download PDF

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Publication number
JP4477705B2
JP4477705B2 JP36037198A JP36037198A JP4477705B2 JP 4477705 B2 JP4477705 B2 JP 4477705B2 JP 36037198 A JP36037198 A JP 36037198A JP 36037198 A JP36037198 A JP 36037198A JP 4477705 B2 JP4477705 B2 JP 4477705B2
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JP
Japan
Prior art keywords
current
timing
timing information
circuit
input signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP36037198A
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English (en)
Japanese (ja)
Other versions
JPH11261350A (ja
JPH11261350A5 (enExample
Inventor
ウルリッヒ・クノッホ
トルステン・クリューガー
バーバラ・ダフナー
ロニー・オウンズ
チャールズ・ムーア
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Verigy Singapore Pte Ltd
Original Assignee
Verigy Singapore Pte Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Verigy Singapore Pte Ltd filed Critical Verigy Singapore Pte Ltd
Publication of JPH11261350A publication Critical patent/JPH11261350A/ja
Publication of JPH11261350A5 publication Critical patent/JPH11261350A5/ja
Application granted granted Critical
Publication of JP4477705B2 publication Critical patent/JP4477705B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45Differential amplifiers
    • H03F3/45071Differential amplifiers with semiconductor devices only
    • H03F3/45479Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection
    • H03F3/45632Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit
    • H03F3/45744Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit by offset reduction
    • H03F3/45766Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit by offset reduction by using balancing means
    • H03F3/45771Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit by offset reduction by using balancing means using switching means
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45Differential amplifiers
    • H03F3/45071Differential amplifiers with semiconductor devices only
    • H03F3/45479Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/22Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
    • H03K5/24Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
    • H03K5/2472Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors
    • H03K5/2481Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors with at least one differential stage
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45Indexing scheme relating to differential amplifiers
    • H03F2203/45624Indexing scheme relating to differential amplifiers the LC comprising balancing means, e.g. trimming means
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45Indexing scheme relating to differential amplifiers
    • H03F2203/45646Indexing scheme relating to differential amplifiers the LC comprising an extra current source
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45Indexing scheme relating to differential amplifiers
    • H03F2203/45702Indexing scheme relating to differential amplifiers the LC comprising two resistors

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Logic Circuits (AREA)
  • Amplifiers (AREA)
  • Pulse Circuits (AREA)
JP36037198A 1997-12-22 1998-12-18 差動増幅回路 Expired - Lifetime JP4477705B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US995,886 1997-12-22
US08/995,886 US5999028A (en) 1997-12-22 1997-12-22 Differential circuits with adjustable propagation timing

Publications (3)

Publication Number Publication Date
JPH11261350A JPH11261350A (ja) 1999-09-24
JPH11261350A5 JPH11261350A5 (enExample) 2006-02-09
JP4477705B2 true JP4477705B2 (ja) 2010-06-09

Family

ID=25542318

Family Applications (1)

Application Number Title Priority Date Filing Date
JP36037198A Expired - Lifetime JP4477705B2 (ja) 1997-12-22 1998-12-18 差動増幅回路

Country Status (2)

Country Link
US (1) US5999028A (enExample)
JP (1) JP4477705B2 (enExample)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6392448B1 (en) 2000-02-03 2002-05-21 Teradyne, Inc. Common-mode detection circuit with cross-coupled compensation
US6300804B1 (en) 2000-02-09 2001-10-09 Teradyne, Inc. Differential comparator with dispersion reduction circuitry
US6384637B1 (en) * 2000-06-06 2002-05-07 Rambus Differential amplifier with selectable hysteresis and buffered filter
US6683498B2 (en) * 2000-07-03 2004-01-27 Broadcom Corporation Protection circuit for extending headroom with off-chip inductors
DE10145656A1 (de) * 2001-09-15 2003-04-03 Philips Corp Intellectual Pty Komparator
JP4235433B2 (ja) * 2002-10-31 2009-03-11 ザインエレクトロニクス株式会社 受信回路及びそれを備えた差動回路
US6937054B2 (en) * 2003-05-30 2005-08-30 International Business Machines Corporation Programmable peaking receiver and method
JP2006109105A (ja) * 2004-10-05 2006-04-20 Nec Electronics Corp 半導体集積回路及びその制御方法
WO2006053098A1 (en) * 2004-11-08 2006-05-18 Elder J Scott Method and apparatus for calibrating analog circuits using statistical techniques
KR100744069B1 (ko) * 2005-09-28 2007-07-30 주식회사 하이닉스반도체 디지털과 아날로그 제어를 이용한 전압제어지연라인의딜레이 셀
JP5264401B2 (ja) * 2008-10-10 2013-08-14 キヤノン株式会社 Pll回路
WO2014024263A1 (ja) * 2012-08-07 2014-02-13 富士通株式会社 クロック分配回路
KR102178865B1 (ko) * 2015-02-25 2020-11-18 한국전자통신연구원 고속 스위칭 성능을 갖는 캐스코드 타입의 스위치 회로
KR20220057159A (ko) * 2020-10-29 2022-05-09 에스케이하이닉스 주식회사 차동 입력 회로를 포함하는 반도체 장치 및 그의 캘리브레이션 방법
US11881969B2 (en) * 2022-04-22 2024-01-23 Samsung Display Co., Ltd. Real-time DC-balance aware AFE offset cancellation

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4464631A (en) * 1981-12-01 1984-08-07 Harris Corporation Circuit for trimming FET differential pair offset voltage without increasing the offset voltage temperature coefficient
US4717888A (en) * 1986-05-22 1988-01-05 Raytheon Company Integrated circuit offset voltage adjustment
US4827222A (en) * 1987-12-11 1989-05-02 Vtc Incorporated Input offset voltage trimming network and method
US5045806A (en) * 1988-04-17 1991-09-03 Teledyne Industries Offset compensated amplifier
US4987327A (en) * 1989-05-30 1991-01-22 Motorola, Inc. Apparatus for adjusting DC offset voltage
US5132559A (en) * 1991-05-03 1992-07-21 Motorola, Inc. Circuit for trimming input offset voltage utilizing variable resistors
US5812005A (en) * 1996-07-30 1998-09-22 Dallas Semiconductor Corp. Auto zero circuitry and associated method

Also Published As

Publication number Publication date
JPH11261350A (ja) 1999-09-24
US5999028A (en) 1999-12-07

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