JP4466276B2 - Vertical Hall element and manufacturing method thereof - Google Patents

Description

  The present invention relates to a Hall element and a method for manufacturing the same, and more specifically, in a state where a current including a component perpendicular to the surface of a semiconductor substrate (wafer) is supplied to a magnetic detection unit in the substrate, The present invention relates to a vertical Hall element that generates a Hall voltage corresponding to a magnetic field component when a magnetic field component is applied to a magnetic detection unit, and a manufacturing method thereof.

  As is well known, since the Hall element can detect the angle without contact, it is used as an angle detection sensor such as a throttle valve opening sensor of an in-vehicle internal combustion engine as a magnetic detection element. Currently, many of these Hall elements that have been put into practical use are horizontal Hall elements that detect a magnetic field component perpendicular to the substrate (wafer) surface, but in recent years, in addition to this, Vertical Hall elements that detect horizontal magnetic field components have also been studied. Since this vertical Hall element has a feature that two elements that detect different phases (angles) can be integrated on one chip, the two vertical Hall elements are arranged at an angle of “90 °”. Thus, a rotation sensor or the like that can obtain a linear output in an angle range of “0 ° to 360 °” can be realized. As such a vertical Hall element, for example, there is a Hall element described in Non-Patent Document 1. Hereinafter, the Hall element (vertical Hall element) will be described with reference to FIG. FIG. 27A is a plan view of the Hall element, and FIG. 27B is a cross-sectional view taken along line L1-L1 in FIG.

  As shown in FIGS. 27A and 27B, this Hall element is formed in a semiconductor substrate by epitaxial growth through a semiconductor layer 21 made of, for example, P-type silicon and an insulating layer 22 thereon. And an N-type semiconductor region 23 to be formed. Among these, in the semiconductor region 23, a trench T22 is formed so as to be connected to the insulating layer 22 in such a manner as to isolate the Hall element from other elements, and the insulating film IL22 is formed in the trench T22. Buried.

Further, N ⁺ diffusion layers 24a to 24d are formed on the surface of the semiconductor region 23 in such a manner that the impurity concentration (N type) in the same region is selectively increased, and these N ⁺ diffusion layers 24a to 24d and the N ⁺ diffusion layers 24a to 24d are arranged there. An ohmic contact is formed between the provided electrode (wiring). And these N ^<+> diffused layers 24a-24d and the terminals S and G, V1, and V2 are each electrically connected via each electrode (wiring) which forms the ohmic contact.

Further, in the region surrounded by the insulating film IL22, a trench T21 is formed between the region where the N ⁺ diffusion layers 24a, 24c and 24d are formed and the region where the N ⁺ diffusion layer 24b is formed. An insulating film IL21 is embedded in the trench T21. As a result, these regions are in a positional relationship with the insulating film IL21 therebetween. Furthermore, the vicinity of the bottom surface of the semiconductor region 23 is selectively narrowed by the insulating film IL21, and a current path is formed there.

In this Hall element, in the region where the N ⁺ diffusion layers 24a, 24c and 24d are formed, that is, in the region electrically separated by the insulating films IL21 and IL22, the N ⁺ diffusion layer 24c The region sandwiched between 24 and 24d is, so to speak, a magnetic detection unit (hole plate) HP. Further, N ⁺ diffusion layers 24c and 24d electrically connected to a set of wirings (terminals V1 and V2) for detecting the Hall voltage are provided in the magnetic detection unit HP from the N ⁺ diffusion layer 24a below. Alternatively, conversely, the N ⁺ diffusion layer 24a is sandwiched so as to detect the Hall voltage generated with respect to the current flowing from the lower side to the N ⁺ diffusion layer 24a.

In such a Hall element, for example, when a constant driving current is passed between the terminal S and the terminal G, the current flows from the N ⁺ diffusion layer 24a formed on the surface of the semiconductor substrate, for example, to the insulating film. As a result of being selectively narrowed by the IL 21, the current flows to the N ⁺ diffusion layer 24 b through the current path formed near the bottom surface of the semiconductor region 23, or vice versa. That is, the drive current is a current mainly including a component perpendicular to the surface of the semiconductor substrate (wafer) at least in the magnetic detection unit HP. For this reason, assuming that a magnetic field including a horizontal component on the surface of the semiconductor substrate (wafer) is applied to the magnetic detection unit HP of the Hall element in the state where the driving current is applied, the terminal V1 and the terminal are connected by the Hall effect. A Hall voltage corresponding to the magnetic field is generated between V2 and V2. In this Hall element, the Hall voltage thus generated is detected through the terminals V1 and V2, and a magnetic field to be detected is detected using a well-known calculation formula “V _H = (R _H IB / d) cos θ”. The component, that is, the magnetic field component horizontal to the surface of the semiconductor substrate (wafer) used for the Hall element is calculated. In the above formula, V _H is the Hall voltage, R _H is the Hall coefficient, I is the drive current, B is the magnetic flux density applied to the magnetic detection unit, d is the width of the magnetic detection unit, and θ is the Hall element and the magnetic field. , Q is the charge, and n is the carrier concentration. As can be seen from this calculation formula, the Hall voltage V _H changes according to the angle θ formed by the Hall element and the magnetic field, so that the angle can be detected by using this.
Ichisuke Maenaka, 3 others, "Integrated 3D magnetic sensor", IEEJ Transactions C, 1989, Vol. 109, No. 7, p483-490

As described above, according to the vertical Hall element as illustrated in FIG. 27, it is certainly possible to detect a magnetic field component horizontal to the surface of the semiconductor substrate (wafer) used for the Hall element. However, in this Hall element, the contact between the set of wirings for detecting the Hall voltage and the magnetic detection part HP is formed on the surface of the semiconductor substrate, more specifically on the surfaces of the N ⁺ diffusion layers 24c and 24d. Will be. For this reason, as shown in FIG. 28, the equivalent circuit of the resistance component in the magnetic detection unit HP is a circuit in which resistors R1 to R4 are connected to form sides of an inverted triangle. In this circuit, since the current flowing direction (angle) is different between the resistors R1 and R2 and the resistors R3 and R4, the direction of the Hall voltage generated with respect to the current flowing through these resistance components also varies. Therefore, it is difficult to specify the magnetic (magnetic field) intensity based on the Hall voltage. As described above, in the case of the conventional vertical Hall element, the offset voltage is likely to be shifted, and it is difficult to specify the strength of the magnetic (magnetic field) applied to the magnetic detection unit HP. As a result, a decrease in sensitivity is inevitable.

  The present invention has been made in view of the above circumstances, and improves the symmetry of the resistance component in the magnetic detection unit to suppress the occurrence of offset voltage deviation, and the magnetic (magnetic field) intensity applied to the magnetic detection unit Another object of the present invention is to provide a vertical Hall element capable of detecting this with higher accuracy and a method for manufacturing the same.

In order to achieve such an object, according to the first aspect of the present invention, a magnetic field horizontal to the surface of the substrate is supplied in a state in which a current containing a component perpendicular to the surface of the semiconductor substrate is supplied to the magnetic detection unit in the substrate. When a component is applied to the magnetic detection unit, the magnetic detection unit electrically partitioned by an insulating film in the semiconductor substrate as a vertical Hall element that generates a Hall voltage corresponding to the magnetic field component and the magnetic detection unit A contact with a set of wirings for detecting the Hall voltage is formed in a part of the insulating film that is selectively removed inside the semiconductor substrate and facing the central part of the magnetic detection unit. An etch stopper film having a higher etching resistance than that of the semiconductor substrate, which is formed in an embedded manner, and is also formed inside the semiconductor substrate so as to lead each wiring of the wiring set to the contact. A structure that remains.

According to such a structure, a contact between the set of wirings for detecting the Hall voltage and the magnetic detection unit is formed inside the semiconductor substrate. As a result, the symmetry of the resistance component in the magnetic detection unit is further enhanced, and the occurrence of offset voltage deviation is suppressed, and as a result, the magnetic (magnetic field) intensity applied to the magnetic detection unit is also higher. It becomes possible to detect with accuracy.
Further, as described above, the magnetic detection unit is configured such that the contact between the set of wirings for detecting the Hall voltage and the magnetic detection unit is opposed to the central part of the magnetic detection unit. The resistance component in is arranged so as to form a Whitstone bridge as its equivalent circuit. In other words, the symmetry is extremely excellent, so there is no offset voltage.
The occurrence of this is further suppressed, and the sensitivity as a magnetic detection element can be further increased.
Further, as in the above configuration, when the magnetic detection unit is electrically partitioned by an insulating film in the semiconductor substrate, a contact between the set of wirings for detecting the Hall voltage and the magnetic detection unit If the wiring material is embedded in the selectively removed part of the insulating film that partitions the magnetic detection portion, the above structure can be realized more easily. Thus, higher sensitivity as a magnetic detecting element can be achieved in a more realistic form.
Moreover, according to the above configuration, the semiconductor substrate is etched higher than the semiconductor substrate in such a manner that each wiring of the wiring set for detecting the Hall voltage is led to a contact with the magnetic detection unit. By adopting a structure in which an etch stopper film having resistance is left, a vertical Hall element having high detection accuracy can be more easily manufactured by using a known semiconductor manufacturing process by guiding the etching path to the etch stopper film. Will be able to.

According to the vertical Hall element of the first aspect of the present invention, as in the second aspect of the present invention, there is a contact between the magnetic detection unit and a set of wirings for supplying the current to the magnetic detection unit. By adopting a structure in which the semiconductor substrate is disposed so as to face the front surface side and the back surface side, the symmetry of the resistance component in the magnetic detection unit is further enhanced and the occurrence of offset voltage deviation is further suppressed. As a result, the sensitivity as a magnetic detection element can be further increased.

Further, when the semiconductor substrate is made of silicon, as described in claim 3, by using one made of silicon oxide as the etching stopper film, the etching resistance of the etching stopper film is sufficiently high with respect to the semiconductor substrate Thus, the vertical Hall element can be manufactured more easily through the etch stopper function. Moreover, according to the above structure, the etch stopper film itself can be easily formed by oxidizing the semiconductor substrate.

And, as a manufacturing method of such a vertical Hall element, as in the invention according to claim 4 , in a state where a current containing a component perpendicular to the surface of the semiconductor substrate is supplied to the magnetic detection unit in the substrate, A method of manufacturing a vertical Hall element that generates a Hall voltage corresponding to a magnetic field component when a magnetic field component horizontal to the surface of the substrate is applied to the magnetic detection unit. Electrically insulating the region and forming an insulating film having the region as the magnetic detection portion, and forming an etch stopper film having higher etching resistance than the semiconductor substrate in the semiconductor substrate, The insulating film is formed so as to face the central portion of the magnetic detection portion by etching from the surface of the semiconductor substrate by guiding the etching path to the formed etch stopper film. A step of selectively etching and removing a portion, and a step of burying a wiring material in a trench formed by etching from the surface of the semiconductor substrate to form a set of wirings for detecting the Hall voltage. The manufacturing method is effective.

According to such a manufacturing method, the contact between the set of wires for detecting the Hall voltage and the magnetic detection unit is selectively removed from the insulating film that partitions the magnetic detection unit. It will be formed in the form of being buried. As a result, as a structure of the vertical Hall element formed by the manufacturing method, the symmetry of the resistance component in the magnetic detection unit is further enhanced, and the occurrence of offset voltage deviation is further suppressed, and consequently the magnetic detection The magnetic (magnetic field) intensity applied to the part can be detected with higher accuracy.
Further, as in the above manufacturing method, an etch stopper film having higher etching resistance than the semiconductor substrate is formed in the semiconductor substrate prior to the step of removing a part of the insulating film by etching from the surface of the semiconductor substrate. It is effective to remove the insulating film by etching from the surface of the semiconductor substrate in such a manner that the etching path is guided by the formed etch stopper film.
Accordingly, when the insulating film is removed from the surface of the semiconductor substrate by etching, the etching stopper film is guided by the etching stopper film, and a part of the insulating film at a desired location can be accurately removed by etching. become able to. For this reason, the above-described structure can be realized more easily and appropriately.
In addition, in the above manufacturing method, a part of the insulating film that is selectively removed by etching from the surface of the semiconductor substrate is formed so as to face the central portion of the magnetic detection unit. . By doing so, the contact between the set of wirings for detecting the Hall voltage and the magnetic detection unit is formed so as to face the central part of the magnetic detection unit. As a result, the symmetry of the resistance component in the magnetic detection unit is further increased, and the occurrence of offset voltage deviation is further suppressed, and as a result, the sensitivity as a magnetic detection element can be further increased. Become.

In this case, the etch stopper film is formed through ion implantation into the semiconductor substrate as described in claim 5 so that the etch stopper film is formed at a desired location. It can be formed more easily.

Furthermore, when the semiconductor substrate is made of silicon, the etch stopper film is formed by ion implantation of oxygen (O 2) into the semiconductor substrate, as described in claim 6. By oxidizing the semiconductor substrate, the etch stopper film can be formed there as a silicon oxide film having a sufficiently high etching resistance to the semiconductor substrate. Note that such an oxygen ion implantation method is a SIMOX (Silicon) method for forming an SOI (Silicon On Insulator) substrate.
(IM planted OXide) method and the like.

According to a fourth aspect of the present invention, there is provided a method of manufacturing the vertical Hall element, wherein the etch stopper film is formed by forming a trench in the semiconductor substrate as described in the seventh aspect. Even if the etching stopper film is formed on the inner wall surface of the trench and then the semiconductor film is buried again in the trench, the etching stopper film can be formed more appropriately.

(First embodiment)
A first embodiment of a vertical Hall element and a method for manufacturing the same according to the present invention will be described below.

  Similarly to the vertical Hall element illustrated in FIG. 27, the vertical Hall element according to this embodiment detects a magnetic field component horizontal on the substrate (wafer) surface, and detects a different phase (angle). The two Hall elements can be integrated on one chip. However, in the vertical Hall element according to this embodiment, the structure as shown in FIG. 1 is used to increase the symmetry of the resistance component in the magnetic detection unit and suppress the occurrence of offset voltage deviation, thereby reducing the magnetic detection unit. The magnetic (magnetic field) intensity applied to is also detected with higher accuracy.

  First, the structure of the vertical Hall element according to this embodiment will be described in detail with reference to FIG. 1A is a plan view of the Hall element, FIG. 1B is a cross-sectional view taken along line L1-L1 in FIG. 1A, and FIG. 1C is FIG. It is sectional drawing along the L2-L2 line of (a).

  As shown in FIGS. 1 (a) to 1 (c), the Hall element is formed in a semiconductor substrate via a semiconductor layer 11 made of, for example, P-type silicon, and an insulating layer 12 made of silicon oxide or the like thereon. And a semiconductor region 13 made of, for example, N-type silicon, formed by epitaxial growth, for example. Among these, in the semiconductor region 13, a trench T3 is formed so as to be connected to the insulating layer 12 in such a manner as to isolate the Hall element from other elements, and the insulating film IL3 is formed in the trench T3. Buried.

In addition, on the surface of the semiconductor region 13, the impurity concentration of the region (N-type) is N ⁺ diffusion layers 14a and 14b are formed in a manner to be selectively increased, distribution therein and these N ⁺ diffusion layers 14a and 14b An ohmic contact is formed between the provided electrode (wiring). The N ⁺ diffusion layers 14a and 14b and the terminals S and G are electrically connected to each other through the respective electrodes (wirings) forming the ohmic contact. Further, conductor films W1a and W1b made of, for example, aluminum or the like reaching the inside of the substrate are further formed on the surface of the semiconductor region 13. These conductor films W1a and W1b are electrically connected to terminals V1 and V2, respectively, as a set of wirings for detecting the Hall voltage.

Further, trenches T2a and T2b are formed between the region where the conductor films W1a and W1b are formed and the region where the N ⁺ diffusion layer 14a is formed in the region surrounded by the insulating film IL3. Insulating films IL2a and IL2b are buried in these trenches T2a and T2b. A trench T1 is formed between a region where the N ⁺ diffusion layer 14a is formed and a region where the N ⁺ diffusion layer 14b is formed, and an insulating film IL1 is buried in the trench T1. As a result, the region where the N ⁺ diffusion layer 14a is formed and the region where the N ⁺ diffusion layer 14b is formed are in a positional relationship with the insulating film IL1 therebetween. Furthermore, the vicinity of the bottom surface of the semiconductor region 13 is selectively narrowed by the insulating film IL1, and a current path is formed there.

In this Hall element, the region where the N ⁺ diffusion layer 14a is formed, that is, the region electrically partitioned by the insulating films IL2a and IL2b, and the insulating films IL1 and IL3 is, so to speak, a magnetic detector (hole plate). ) HP. In addition, the conductor films W1a and W1b, which form a wiring for detecting the Hall voltage, pass through the magnetic detection part HP from the N ⁺ diffusion layer 14a downward, or conversely from the lower part to the N ⁺ diffusion layer 14a. Are formed so as to sandwich the N ⁺ diffusion layer 14a so that the Hall voltage generated for the flowing current can be detected.

  In addition, the conductor films W1a and W1b are in contact with the magnetic detection part HP within the semiconductor substrate. Here, the contacts CTa and CTb are formed in such a manner that an appropriate wiring material is embedded in a selectively removed part of the insulating films IL2a and IL2b that partition the magnetic detection unit HP, and the magnetic field The arrangement is such that it faces the center of the detector HP. For this reason, the resistance component in the magnetic detection unit HP is arranged to form a Whitstone bridge as an equivalent circuit thereof. In other words, the direction (angle) of the current flowing here is the same for each resistance, and the variation in the direction in which the Hall voltage is generated is suppressed, and as a result, further enhancement of sensitivity as a magnetic detection element is achieved. Become.

  Further, in the semiconductor substrate, an etch stopper film ESa made of, for example, silicon oxide having higher etching resistance than the semiconductor region 13 in such a manner that the conductor films W1a and W1b are led to the contacts CTa and CTb, respectively. And ESb remain. Thereby, it becomes possible to manufacture the Hall element more easily.

In such a Hall element, for example, when a constant driving current is passed between the terminal S and the terminal G, the current flows from the N ⁺ diffusion layer 14a formed on the surface of the semiconductor substrate, for example, to the insulating film. It flows to the N ⁺ diffusion layer 14b or vice versa through a current path formed in the vicinity of the bottom surface of the semiconductor region 13 while being selectively narrowed by IL1. That is, the drive current is a current mainly including a component perpendicular to the surface of the semiconductor substrate (wafer) at least in the magnetic detection unit HP. For this reason, assuming that a magnetic field including a horizontal component on the surface of the semiconductor substrate (wafer) is applied to the magnetic detection unit HP of the Hall element in the state where the driving current is applied, the terminal V1 and the terminal are connected by the Hall effect. A Hall voltage corresponding to the magnetic field is generated between V2 and V2. Also in this Hall element, the Hall voltage thus generated is detected through the terminals V1 and V2, and the detection is performed using the well-known calculation formula “V _H = (R _H IB / d) cos θ” shown above. A target magnetic field component, that is, a magnetic field component horizontal to the surface of a semiconductor substrate (wafer) used for the Hall element is calculated.

  Next, a method for manufacturing the vertical Hall element will be described in detail with reference to FIGS. These cross-sectional views correspond to the cross-sectional view of FIG. 1 (c), and the same elements as those shown in FIG. 1 (c) are denoted by the same reference numerals. I will not repeat the explanation of these elements.

  In this manufacturing, first, as shown in FIG. 2A, a semiconductor layer 11 made of, for example, P-type silicon, an insulating layer 12 made of, for example, silicon oxide, and a semiconductor region 13 made of, for example, N-type silicon, First, an SOI (Silicon On Insulator) substrate is prepared. Then, as shown in FIG. 2B, the trenches T2a, T2b, and T3 are formed by RIE (reactive ion etching) using a mask patterned through photolithography, for example, and an appropriate oxidation is performed thereon. The insulating films IL2a, IL2b, and IL3 are formed by performing processing and planarization processing. At this time, a CVD (chemical vapor deposition) method or the like may be used instead of the oxidation treatment. Further, as the planarization treatment, for example, a method such as CMP (Chemical Mechanical Polishing) or etch back can be employed.

Next, as shown in FIG. 2C, an appropriate mask material MK11 made of, for example, a resist is formed, and this is patterned by, for example, photolithography, and the patterned mask material MK11 is used as a mask. Ion implantation of oxygen (O ₂ ) into the semiconductor substrate (SOI substrate) is performed. Then, an appropriate heat treatment is performed to form the etch stopper films ESa and ESb as shown in FIG.

  Next, as shown in FIG. 3B, an appropriate mask material MK12 made of, for example, a resist is formed and patterned by, for example, photolithography. Then, as shown in FIG. 3C, trenches A11a and A11b are formed by etching (for example, wet etching) from the substrate surface using the patterned mask material MK12 as a mask. At this time, since the etch stopper films ESa and ESb have higher etching resistance than the semiconductor region 13, the etching is performed in a horizontal direction in the figure along the etch stopper films ESa and ESb by a so-called notch effect. Then, it eventually reaches the insulating films IL2a and IL2b that partition the magnetic detection unit HP. Further, as this etching progresses, as shown in FIG. 4A, a part of the insulating films IL2a and IL2b facing the central portion of the magnetic detection part HP is selectively etched away. Become. Thus, the etching proceeds in such a manner that the etching path is guided by the etch stopper films ESa and ESb. For this reason, a part of the insulating films IL2a and IL2b at desired locations is accurately removed by etching. Note that the etch stopper films ESa and ESb are desirably formed sufficiently thick so as not to be etched away even after the etching.

  Next, for example, a wiring material made of aluminum or the like is formed by sputtering or the like, and a planarization process such as CMP or etch back is performed on the wiring material, thereby forming the trenches A11a and A11b in the trenches A11a and A11b as shown in FIG. The conductor films W1a and W1b are embedded. Thus, the vertical Hall element as illustrated in FIG. 1 is completed.

As described above, according to the vertical Hall element and the manufacturing method thereof according to this embodiment, the following excellent effects can be obtained.
(1) The structure is such that the conductor films W1a and W1b formed of wiring for detecting the Hall voltage are formed in such a manner as to take the contacts CTa and CTb with the magnetic detection part HP inside the semiconductor substrate. As a result, the symmetry of the resistance component in the magnetic detection unit is further enhanced, and the occurrence of offset voltage deviation is suppressed, and as a result, the magnetic (magnetic field) intensity applied to the magnetic detection unit is also higher. It becomes possible to detect with accuracy.

  (2) The contacts CTa and CTb between the conductor films W1a and W1b and the magnetic detection part HP, which are wiring lines for detecting the Hall voltage, are arranged so as to face the central part of the magnetic detection part HP. . Accordingly, the resistance component in the magnetic detection unit HP is arranged to form a Whitstone bridge as an equivalent circuit thereof. For this reason, the direction (angle) of the current flowing here is the same for each resistance, and the variation in the direction in which the Hall voltage is generated is suppressed, and as a result, the sensitivity of the magnetic detection element can be further increased. become.

  (3) The contacts CTa and CTb between the conductor films W1a and W1b and the magnetic detection part HP, which form a wiring for detecting the Hall voltage, are selectively removed from the insulating films IL2a and IL2b that partition the magnetic detection part HP. In addition, the wiring material is embedded in a part of it. As a result, the above structure can be realized more easily, and higher sensitivity as a magnetic detection element can be achieved in a more realistic manner.

  (4) Inside the semiconductor substrate, each wiring (conductor films W1a and W1b) of the wiring set for detecting the Hall voltage is led from the semiconductor region 13 to the contacts CTa and CTb with the magnetic detection unit HP. In this structure, the etch stopper films ESa and ESb having high etching resistance are left. As a result, a vertical Hall element having high detection accuracy can be more easily manufactured using a known semiconductor manufacturing process.

  (5) The semiconductor region 13 is made of silicon, and the etch stopper films ESa and ESb are made of silicon oxide. Thus, the etching resistance of the etch stopper films ESa and ESb is sufficiently high with respect to the semiconductor region 13, and the vertical Hall element can be more easily manufactured through the etch stopper function. In addition, according to such a structure, the etch stopper films ESa and ESb themselves can be easily formed by oxidizing the semiconductor region 13 or the like.

  (6) Further, in the manufacture thereof, a part of the region in the semiconductor substrate is electrically partitioned to form the insulating films IL2a and IL2b having the region as the magnetic detection part HP, and from the surface of the semiconductor substrate A part of the insulating films IL2a and IL2b is selectively removed by etching. Then, a wiring material is embedded in trenches A11a and A11b formed by etching from the surface of the semiconductor substrate to form conductor films W1a and W1b in which wiring for detecting the Hall voltage is formed. Thus, the contact between the set of wirings (conductor films W1a and W1b) for detecting the Hall voltage and the magnetic detection unit HP is selectively removed from the insulating films IL2a and IL2b that partition the magnetic detection unit HP. The wiring material is embedded in the part that is formed. For this reason, as a structure of the vertical Hall element formed by the manufacturing method, the symmetry of the resistance component in the magnetic detection unit HP is further increased and the occurrence of the offset voltage deviation is suppressed, and consequently the magnetic detection unit The magnetic (magnetic field) intensity applied to can be detected with higher accuracy.

  (7) Further, prior to removing part of the insulating films IL2a and IL2b, etch stopper films ESa and ESb having higher etching resistance than the semiconductor region 13 are formed in the semiconductor substrate. Then, a part of the insulating films IL2a and IL2b is selectively removed by etching in such a way that the etch stopper films ESa and ESb guide the etching path. By doing this, when removing a part of the insulating films IL2a and IL2b, the etching stopper films ESa and ESb guide the etching path, and a part of the insulating films IL2a and IL2b at a desired location is etched accurately. Can be removed. For this reason, the above-described structure can be realized more easily and appropriately.

(8) At this time, the etch stopper films ESa and ESb are formed by ion implantation of oxygen (O ₂ ) into the semiconductor substrate. By so doing, the semiconductor region 13 is oxidized, and the etch stopper films ESa and ESb can be formed there as a silicon oxide film having sufficiently high etching resistance with respect to the semiconductor region 13 made of silicon. . That is, the etch stopper films ESa and ESb can be easily and accurately formed at desired locations.

  (9) By etching from the surface of the semiconductor substrate, a part of the insulating films IL2a and IL2b opposed to the central part of the magnetic detection part HP is selectively etched away. Thus, the contact CTa and CTb between the set of wirings (conductor films W1a and W1b) for detecting the Hall voltage and the magnetic detection unit HP are formed so as to face the central part of the magnetic detection unit HP. Will be. As a result, the symmetry of the resistance component in the magnetic detection unit HP is further increased, and the occurrence of offset voltage deviation is suppressed. As a result, the sensitivity as the magnetic detection element can be further increased. .

(Second Embodiment)
The second embodiment of the vertical Hall element and the manufacturing method thereof according to the present invention will be described below.

  First, the structure of the vertical Hall element according to this embodiment will be described with reference to FIG. 5, focusing on the differences from the first embodiment. The cross-sectional view of FIG. 5 corresponds to the cross-sectional view of FIG. 1 (c), and the same elements as those shown in FIG. 1 (c) are denoted by the same reference numerals. The overlapping explanation about these elements is omitted.

  As shown in FIG. 5, this vertical Hall element basically has the same structure as the Hall element of the first embodiment illustrated in FIG. The aspect is also as described above. However, in this embodiment, film materials TFa and TFb made of, for example, silicon oxide are employed instead of the previous insulating films IL2a and IL2b and etch stopper films ESa and ESb (FIG. 1). Here, these film materials TFa and TFb electrically partition the magnetic detection part (hole plate) HP inside the substrate, and have higher etching resistance than the semiconductor region 13, so that it functions as an etch stopper. It has become. Also in this embodiment, the conductor films W2a and W2b, which are the wirings for detecting the Hall voltage, have the contacts CTa and CTb with the magnetic detection part HP inside the substrate. The contacts CTa and CTb are formed in such a manner that a wiring material is embedded in a part of the film materials TFa and TFb that are selectively removed, and the contacts CTa and CTb are opposed to the central portion of the magnetic detection unit HP. The arrangement is taken. The film materials TFa and TFb remain in such a manner that the conductor films W2a and W2b are led to the contacts CTa and CTb, respectively.

  Next, with reference to FIGS. 6-8, the manufacturing method of the said vertical Hall element is explained in full detail. These cross-sectional views correspond to the cross-sectional view of FIG. 5 described above, and the same elements as those shown in FIG. 5 are denoted by the same reference numerals and overlapped with each other. I will omit the explanation.

  In this manufacturing, first, as shown in FIG. 6A, a semiconductor layer 11 made of, for example, P-type silicon, an insulating layer 12 made of, for example, silicon oxide, and a semiconductor region 13 made of, for example, N-type silicon, Are prepared in order. Then, as shown in FIG. 6B, the trench T3 is formed by RIE using a mask patterned through photolithography, for example, and an appropriate oxidation treatment and planarization treatment are performed on the trench T3, so that the insulation is performed. A film IL3 is formed. At this time, a CVD method or the like may be used instead of the oxidation treatment. As the planarization process, for example, a method such as CMP or etch back can be employed.

  Next, as shown in FIG. 6C, an appropriate mask material MK21 made of, for example, a resist is formed, and this is patterned by, for example, photolithography. Using the patterned mask material MK21 as a mask, for example, The semiconductor substrate (SOI substrate) is etched by KOH or the like. Then, as shown in FIG. 7A, the inner wall surfaces of the trenches A21a and A21b formed there are appropriately oxidized to form the film materials TFa and TFb. As shown, semiconductor films 13a and 13b made of, for example, silicon are buried in the trenches A21a and A21b again (buried epi).

  Next, after performing an appropriate planarization process, as shown in FIG. 7C, an appropriate mask material MK22 made of, for example, a resist is formed and patterned by, for example, photolithography. Then, as shown in FIG. 8A, trenches A22a and A22b are formed by etching (for example, wet etching) from the substrate surface using the patterned mask material MK22 as a mask. At this time, since the film materials TFa and TFb have higher etching resistance than the semiconductor region 13, the etching proceeds in the horizontal direction in the figure along the film materials TFa and TFb by a so-called notch effect. It will be. Further, when this etching proceeds, as shown in FIG. 8B, a part of the film materials TFa and TFb facing the central part of the magnetic detection part HP is selectively etched away. Become. Thus, also in this embodiment, the etching proceeds in such a way that the etching path is guided by the film materials TFa and TFb.

  Next, for example, a wiring material made of aluminum or the like is formed by sputtering or the like, and a planarization process such as CMP or etch back is performed on the wiring material, so that the trenches A22a and A22b are formed in the trenches A22a and A22b as shown in FIG. The conductor films W2a and W2b are embedded. Thus, the vertical Hall element as illustrated in FIG. 5 is completed.

  As described above, the effects of the above (1) to (7) and (9) according to the first embodiment are also achieved by the vertical Hall element and the manufacturing method thereof according to the second embodiment. Similar or equivalent effects can be obtained, and in addition to this, the following effects can be newly obtained.

  (10) Etch stopper films (film materials TFa and TFb) are formed by forming trenches A21a and A21b in the semiconductor substrate and depositing the etch stopper film on the inner wall surfaces of the trenches A21a and A21b. The semiconductor films 13a and 13b are buried in the trenches A21a and A21b. By doing so, the etch stopper film can be appropriately formed.

(Third embodiment)
Hereinafter, a third embodiment of the vertical Hall element and the manufacturing method thereof according to the present invention will be described.

  First, the structure of the vertical Hall element according to this embodiment will be described with reference to FIG. 9, focusing on the differences from the first embodiment. The cross-sectional view of FIG. 9 corresponds to the cross-sectional view of FIG. 1 (c), and the same elements as those shown in FIG. 1 (c) are denoted by the same reference numerals. The overlapping explanation about these elements is omitted.

  As shown in FIG. 9, this vertical Hall element also basically has the same structure as that of the Hall element of the first embodiment illustrated in FIG. The aspect is also as described above. However, in the present embodiment, the structure shown in FIG. 9 is used instead of the conductor films W1a and W1b (FIG. 1), while the previous etch stopper films ESa and ESb (FIG. 1) are omitted. The conductor films W3a and W3b are employed. That is, also in this embodiment, the conductor films W3a and W3b, which form a wiring for detecting the Hall voltage, have contacts CTa and CTb with the magnetic detection part HP inside the substrate. The contacts CTa and CTb are formed in such a manner that appropriate wiring materials are embedded in selectively removed portions of the insulating films IL2a and IL2b that partition the magnetic detection unit HP, and the magnetic detection It is arranged in a form facing the central part of the part HP. However, in this embodiment, the conductor films W3a and W3b are structured to extend obliquely from the substrate surface toward the contacts CTa and CTb.

  Next, a method for manufacturing the vertical Hall element will be described in detail with reference to FIGS. These cross-sectional views correspond to the cross-sectional view of FIG. 9 described above, and the same elements as those shown in FIG. 9 are denoted by the same reference numerals and overlapped with each other. I will omit the explanation.

  In this manufacturing, first, as shown in FIG. 10A, a semiconductor layer 11 made of, for example, P-type silicon, an insulating layer 12 made of, for example, silicon oxide, and a semiconductor region 13 made of, for example, N-type silicon, Are prepared in order. Then, as shown in FIG. 10B, the trenches T2a, T2b, and T3 are formed by RIE using a mask patterned through photolithography, for example, and appropriate oxidation treatment and planarization treatment are performed thereon. Then, the insulating films IL2a, IL2b, and IL3 are formed. At this time, a CVD method or the like may be used instead of the oxidation treatment. As the planarization process, for example, a method such as CMP or etch back can be employed.

  Next, as shown in FIG. 11A, an appropriate mask material MK31 made of, for example, a resist is formed, and is patterned by, for example, photolithography, and the patterning is performed as shown in FIG. 11B. Etching in an oblique direction by anisotropic etching is performed using the mask material MK31 thus formed as a mask. Then, by further proceeding with this etching, a part of the insulating films IL2a and IL2b facing the central part of the magnetic detection part HP is selectively removed by etching, and a trench as shown in FIG. A31a and A31b will be formed.

  Next, for example, a wiring material made of aluminum or the like is formed by sputtering or the like, and a planarization process such as CMP or etchback is performed on the wiring material. As shown in FIG. 12, the conductor film is formed in the trenches A31a and A31b. W3a and W3b are buried. Thereafter, by removing the mask material MK31, a vertical Hall element as illustrated in FIG. 9 is completed.

  As described above, the above-described (1) to (3), (6) and (9) according to the first embodiment are also obtained by the vertical Hall element and the manufacturing method thereof according to the third embodiment. In addition to this, the following effects can be newly obtained.

  (11) The conductor films W3a and W3b, each of which forms a wiring for detecting the Hall voltage, are configured to extend obliquely from the surface of the semiconductor substrate toward the contacts CTa and CTb with the magnetic detection unit HP. Accordingly, the Hall element can be more easily manufactured by, for example, etching in an oblique direction by anisotropic etching.

  (12) Further, during the production, etching in an oblique direction by anisotropic etching is performed from the surface of the semiconductor substrate. By doing so, the above structure can be realized more easily and appropriately.

(Fourth embodiment)
Next, FIGS. 13 and 14 show a fourth embodiment of the vertical Hall element according to the present invention.

First, with reference to FIG. 13, the structure of the vertical Hall element according to this embodiment will be described focusing on the differences from the first embodiment. FIG. 13 corresponds to a cross-sectional view taken along a line in which the line L2-L2 in the plan view of FIG. 1A is translated upward to pass over the N ⁺ diffusion layer 14a. The same elements as those shown in FIG. 1C are denoted by the same reference numerals, and redundant description of these elements is omitted.

As shown in FIG. 13, this vertical Hall element basically has the same structure as that of the Hall element of the first embodiment illustrated in FIG. The aspect is also as described above. However, in this embodiment, for example, the insulating films IL4a and IL4b made of, for example, silicon oxide are formed on the sidewalls of the trench formed by etching from the back surface of the substrate with, for example, KOH, and the conductor film W1c is formed in the trench. I am trying to bury it. That is, the contacts CTc and CTd with the magnetic detection unit HP and a set of wirings (terminal S and terminal G) for supplying current to the magnetic detection unit HP are arranged so as to face the front surface side and the back surface side of the substrate. Will be. As a result, the symmetry of the resistance component in the magnetic detection unit HP is further enhanced. As shown in FIG. 14, the resistance component in the magnetic detection unit HP is a Whitstone bridge (four resistors R1 to R4) as an equivalent circuit. Are arranged so as to form a bridge circuit connected in the form of each side of the rhombus. For this reason, it is difficult for the offset voltage to shift, and the sensitivity as the magnetic detection element can be further increased. Further, since the formation of the N ⁺ diffusion layer 14b and the like shown in FIG. 1 can be omitted, the structure as a vertical Hall element can be simplified.

  As described above, the vertical Hall element according to the fourth embodiment also obtains the same or similar effects as the effects (1) to (5) of the previous first embodiment. In addition to this, the following effects can be newly obtained.

  (13) Contact CTc and CTd between the magnetic detection unit HP and a set of wirings (terminal S and terminal G) for supplying current to the magnetic detection unit HP are opposed to the front surface side and the back surface side of the semiconductor substrate. It was set as the structure arrange | positioned by. As a result, the sensitivity as a magnetic detection element can be further increased.

(14) Further, the structure as the vertical Hall element can be simplified.
(Fifth embodiment)
15 and 16 show a fifth embodiment of the vertical Hall element according to the present invention.

First, with reference to FIG. 15, the structure of the vertical Hall element according to this embodiment will be described with a focus on differences from the second embodiment. FIG. 15 also corresponds to a cross-sectional view taken along a line in which the line L2-L2 in the plan view of FIG. 1A is translated upward to pass over the N ⁺ diffusion layer 14a. It is. In FIG. 15, the same elements as those shown in FIG. 5 are denoted by the same reference numerals, and redundant description of these elements is omitted.

As shown in FIG. 15, this vertical Hall element also basically has the same structure as that of the Hall element of the second embodiment illustrated in FIG. The aspect is also as described above. However, in this embodiment, a semiconductor substrate 11a made of a single conductivity type (for example, N type) is employed instead of the previous SOI substrate. Then, on the back surface side of the semiconductor substrate 11a, the impurity concentration (N type) of the substrate 11a is selectively increased so as to face the N ⁺ diffusion layer 14a formed on the front surface side of the substrate 11a. ^{A +} diffusion layer 14c is formed. That is, the contact CTc and CTd with the magnetic detection unit HP and a set of wirings (terminal S and terminal G) for supplying current to the magnetic detection unit HP are opposed to the front surface side and the back surface side of the semiconductor substrate 11a. Will be placed. Thereby, the symmetry of the resistance component in the magnetic detection unit HP is further enhanced. As shown in FIG. 16, the resistance component in the magnetic detection unit HP is a Whitstone bridge (four resistors R1 to R4) as an equivalent circuit. Are arranged so as to form a bridge circuit connected in the form of each side of the rhombus. For this reason, it is difficult for the offset voltage to shift, and the sensitivity as the magnetic detection element can be further increased. Further, since the formation of the N ⁺ diffusion layer 14b and the like shown in FIG. 1 can be omitted, the structure as a vertical Hall element can be simplified. Here, since a semiconductor substrate having a single conductivity type is employed instead of the SOI substrate, the element isolation insulating film IL3 is connected to the film materials TFa and TFb as shown in FIG. It will be formed in the mode.

  As described above, also by the vertical Hall element according to the fifth embodiment, the above (1) to (5), (13) and (14) according to the first or fourth embodiment. An effect similar to or equivalent to the effect of can be obtained.

(Other embodiments)
In addition, each said embodiment can also be implemented with the following aspects.
In the method of manufacturing the vertical Hall element according to the second embodiment, the etch stopper film is formed by forming a trench in the semiconductor substrate and forming the etch stopper film on the inner wall surface of the trench. Again, the semiconductor film was buried in the trench. Such a method of forming the etch stopper film can also be applied to the method for manufacturing the vertical Hall element according to the first embodiment. That is, instead of the steps shown in FIGS. 2B to 3A, steps as shown in FIGS. 17A to 18B may be adopted. Hereinafter, the process will be described with reference to FIGS. 17 (a) to 18 (b). The cross-sectional views of these figures correspond to the cross-sectional view of FIG. 1 (c), and the same elements as those shown in FIG. 1 (c) are denoted by the same reference numerals. The overlapping explanation about these elements is omitted.

  As shown in FIG. 17A, here, the description starts from the state shown in FIG. That is, an appropriate mask material MK13 made of, for example, a resist is formed on such a substrate, and is patterned by, for example, photolithography. Then, as shown in FIG. 17B, using the patterned mask material MK13 as a mask, the semiconductor substrate (SOI substrate) is etched using, for example, KOH. Next, as shown in FIG. 17C, the bottom surfaces (inner wall surfaces) of the trenches A12a and A12b formed therein are subjected to appropriate oxidation treatment, or the etch stopper films ESa and ESb are formed by using the CVD method. Form a film. Further, as shown in FIG. 18A, after the semiconductor films 13a and 13b made of, for example, silicon are again embedded (embedded epi) in the trenches A12a and A12b, an appropriate planarization process is performed, whereby FIG. As shown in b), a substrate having a structure according to the structure shown in FIG. 3A is produced.

  In the method for manufacturing the vertical Hall element according to the second embodiment, the film materials TFa and TFb are formed by oxidation treatment. However, the film material TFa and TFa are not limited to this. The film formation method of TFb is arbitrary. For example, when this is formed by the CVD method, the steps shown in FIGS. 6C to 7B are performed as shown in FIGS. 19A to 20C, for example. Process. Hereinafter, the process will be described with reference to FIGS. 19 (a) to 20 (c). The cross-sectional views in these figures correspond to the cross-sectional view in FIG. 5, and the same elements as those shown in FIG. Duplicate explanations are omitted.

  As shown in FIG. 19A, the description starts here from the state shown in FIG. Note that the mask material MK23 in FIG. 19A corresponds to the mask material MK21 shown in FIG. That is, as shown in FIG. 19B, using such a mask material MK23 as a mask, the semiconductor substrate (SOI substrate) is etched using, for example, KOH, and then the mask material MK23 is removed to remove the mask material MK23. The structure is as shown in (c). Next, as shown in FIG. 20A, a film material TF made of, for example, silicon oxide or the like is formed on the entire surface of the substrate including the inner wall surfaces of the trenches A23a and A23b formed by the above-described etching by a CVD method using an appropriate raw material. Is deposited. Then, as shown in FIG. 20B, after the semiconductor films 13a and 13b made of, for example, silicon are again embedded (embedded epi) in the trenches A23a and A23b, an appropriate planarization process is performed, whereby FIG. As shown in c), a substrate having a structure similar to the structure shown in FIG. 7B is produced.

  In the vertical Hall element illustrated in FIG. 13 of the fourth embodiment, the insulating films IL4a and IL4b are formed between the conductor film W1c and the substrate. However, as shown in FIG. The structure may be omitted.

In the above first to fourth embodiments, the impurity concentration (N-type) at the interface (near the bottom surface of the semiconductor region 13) of the insulating layer 12 of the SOI substrate is selectively increased, and here also the N ⁺ diffusion layer (Embedded layer) may be formed. In such a structure, since the buried layer serves as a current path for the drive current, a change in characteristics as a Hall element is suppressed, and thus stable magnetic detection is possible. In addition, in its manufacture,
(A) Conductive impurities are doped before bonding SOI.
(B) After high acceleration implantation (ion implantation), diffusion treatment such as thermal diffusion is performed.
Forming a ^- (epitaxial film N) as the semiconductor region 13 (c) forming the N ⁺ diffusion layer (buried layer) at the interface of the insulating layer 12, a lower semiconductor layer an impurity concentration higher than that on its To do.
Etc. can be used.

  In the first to fourth embodiments, the SOI substrate is used. However, the present invention is not limited to this, and any substrate can be used. For example, in the vertical Hall element illustrated in FIG. 5 of the second embodiment, when the insulating layer 12 is omitted, the structure shown in FIG. 22 is obtained. The present invention can be similarly applied to a Hall element having such a structure. The cross-sectional view of FIG. 22 corresponds to the cross-sectional view of FIG. In FIG. 22, the same elements as those shown in FIG. 5 are denoted by the same reference numerals.

  In the vertical Hall element according to each of the above embodiments, the insulating film IL3 is used to isolate the Hall element. However, the present invention is not limited to this, and the element is not limited to this, for example, through a potential barrier by a diffusion layer. You may make it isolate | separate. FIG. 23 shows a structure when the diffusion layer DF is used in place of the insulating film IL3 in the vertical Hall element exemplified in FIG. 5 of the second embodiment. FIGS. 24 to 26 show an example of the manufacturing process of the Hall element having such a structure. The cross-sectional views in these figures correspond to the cross-sectional view in FIG. 5, and the same elements as those shown in FIG. Duplicate explanations are omitted.

  As shown in FIG. 24A, in this manufacturing, first, a semiconductor layer 11 made of, for example, P-type silicon, an insulating layer 12 made of, for example, silicon oxide, and a semiconductor region 13 made of, for example, N-type silicon, Are prepared in order. Then, as shown in FIG. 24B, for example, a P-type impurity such as boron (B) is ion-implanted into the substrate using a mask patterned through photolithography, for example. The diffusion layer DF is formed by diffusing the implanted impurities. Then, as shown in FIG. 24C, an appropriate mask material MK24 made of, for example, a resist is formed and patterned by, for example, photolithography. Next, using the patterned mask material MK24 as a mask, the semiconductor substrate (SOI substrate) is etched using, for example, KOH, and trenches A24a and A24b formed therein are formed as shown in FIG. A film material TFa and TFb are formed by subjecting the inner wall surface to appropriate oxidation treatment. Then, as shown in FIG. 25B, semiconductor films 13a and 13b made of, for example, silicon are buried in the trenches A24a and A24b (buried epi). Further, after performing an appropriate planarization process thereon, as shown in FIG. 25C, an appropriate mask material MK25 made of, for example, a resist or the like is formed and patterned by, for example, photolithography. Thereafter, through a process according to the process shown in FIGS. 8A to 8C as shown in FIGS. 26A to 26C, the vertical Hall element as illustrated in FIG. 23 is obtained. It will be completed.

  In the vertical Hall element according to each of the above embodiments, the silicon oxide film is used for partitioning the magnetic detection unit HP in the semiconductor substrate. However, the present invention is not limited to this. A film may be used. Further, the magnetic detection unit HP may be partitioned in the semiconductor substrate through a potential barrier formed by a diffusion layer, for example, without being limited to the insulating film.

  In each of the above embodiments, silicon is used as the material for the semiconductor substrate. However, other materials may be appropriately employed depending on the manufacturing process, structural conditions, and the like. For example, a compound semiconductor material such as GaAs, InSb, InAs, and SiC or a semiconductor material such as Ge (germanium) can be used. In particular, GaAs and InAs are materials having excellent temperature characteristics, and are effective in increasing the sensitivity of the Hall element. In general, a semiconductor material such as silicon has a higher carrier mobility in an N-type semiconductor than in a P-type semiconductor. Therefore, in order to achieve high sensitivity as a magnetic detection element, It is desirable to use an N-type semiconductor material as the material.

  In the first, second, fourth and fifth embodiments, silicon oxide is used as the material of the etch stopper film (etch stopper films ESa and ESb and film materials TFa and TFb). However, the present invention is not limited to this, and silicon nitride or the like can be used as appropriate. In particular, silicon nitride is effective in etching silicon oxide because it has high resistance to a general etchant of silicon oxide. Even if the semiconductor substrate (semiconductor region 13) is made of a material other than silicon, an appropriate material can be selected according to the material. In short, any film material can be used as the etch stopper film as long as it has higher etching resistance than the semiconductor substrate. If the etch stopper film is formed through ion implantation into the semiconductor substrate, at least the effect according to the effect (8) according to the first embodiment can be obtained. Note that the material of the etch stopper film does not have to be the same material as the film material that partitions the magnetic detection unit HP in the semiconductor substrate.

  The manner of forming such an etch stopper film is not limited to that illustrated in the first, second, fourth, or fifth embodiment, and each of the sets of wirings for detecting the Hall voltage It is sufficient if the wiring is formed so as to lead to the contacts CTa and CTb with the magnetic detection unit HP.

  In each of the above embodiments, for example, aluminum is used as the material of the wiring set (conductor film) for detecting the Hall voltage. However, the present invention is not limited to this, and any wiring material is used. Can do. For example, other metal materials such as copper may be used.

The N ⁺ diffusion layer 14a in each of the above embodiments is formed over the entire region surrounded by the insulating film on which the N ⁺ diffusion layer 14a is formed, so that characteristic changes caused by misalignment of electrodes (wiring) are also suitable. Will be suppressed.

In each of the above embodiments, the N ⁺ diffusion layers 14a to 14c are formed in order to realize ohmic contact with the wiring, but this is not essential. That is, a structure in which such an N ⁺ diffusion layer is omitted can be used.

  In each of the above embodiments, the contact CTa and CTb between the wiring set for detecting the Hall voltage and the magnetic detection unit HP are arranged so as to face the central part of the magnetic detection unit HP. But this is not an essential structure. That is, by arranging the contact CTa and CTb between the set of wirings for detecting the Hall voltage and the magnetic detection unit HP so that the resistance component in the magnetic detection unit HP forms a Whitstone bridge as an equivalent circuit, The effect according to the effect (2) of the first embodiment can be obtained.

  Further, even such a structure is not essential, and the wiring set for detecting the Hall voltage is formed in such a manner that the contact CTa and CTb with the magnetic detection part HP are formed inside the semiconductor substrate. An effect similar to or equivalent to the effect (1) of the first embodiment can be obtained.

In the first embodiment of the vertical Hall element according to the present invention, (a) is a plan view schematically showing the planar structure of the Hall element, and (b) is taken along line L1-L1 in (a). Sectional drawing, (c) is a sectional view along line L2-L2 in (a). (A)-(c) is sectional drawing which shows the manufacturing process about the manufacturing method of the vertical Hall element based on the said 1st Embodiment. (A)-(c) is sectional drawing which shows the manufacturing process about the manufacturing method of the vertical Hall element based on the said 1st Embodiment. (A) And (b) is sectional drawing which shows the manufacturing process about the manufacturing method of the vertical Hall element based on the said 1st Embodiment. Sectional drawing which shows typically the cross-section of the Hall element about 2nd Embodiment of the vertical Hall element which concerns on this invention. (A)-(c) is sectional drawing which shows the manufacturing process about the manufacturing method of the vertical Hall element based on the said 2nd Embodiment. (A)-(c) is sectional drawing which shows the manufacturing process about the manufacturing method of the vertical Hall element based on the said 1st Embodiment. (A)-(c) is sectional drawing which shows the manufacturing process about the manufacturing method of the vertical Hall element based on the said 1st Embodiment. Sectional drawing which shows typically the cross-section of the Hall element about 3rd Embodiment of the vertical Hall element which concerns on this invention. (A) And (b) is sectional drawing which shows the manufacturing process about the manufacturing method of the vertical Hall element based on the said 3rd Embodiment. (A)-(c) is sectional drawing which shows the manufacturing process about the manufacturing method of the vertical Hall element based on the said 3rd Embodiment. Sectional drawing which shows the manufacturing process about the manufacturing method of the vertical Hall element based on the said 3rd Embodiment. Sectional drawing which shows typically the cross-section of the Hall element about 4th Embodiment of the vertical Hall element which concerns on this invention. The circuit diagram which shows the equivalent circuit of the resistance component in the magnetic detection part of the vertical Hall element based on the said 4th Embodiment. Sectional drawing which shows typically the cross-section of the Hall element about 5th Embodiment of the vertical Hall element which concerns on this invention. The circuit diagram which shows the equivalent circuit of the resistance component in the magnetic detection part of the vertical Hall element based on the said 5th Embodiment. (A)-(c) is sectional drawing which shows the manufacturing process about the modification of the manufacturing method of the vertical Hall element based on the said 1st Embodiment. (A) And (b) is sectional drawing which shows the manufacturing process about the modification of the manufacturing method of the vertical Hall element based on the said 1st Embodiment. (A)-(c) is sectional drawing which shows the manufacturing process about the modification of the manufacturing method of the vertical Hall element based on the said 2nd Embodiment. (A)-(c) is sectional drawing which shows the manufacturing process about the modification of the manufacturing method of the vertical Hall element based on the said 2nd Embodiment. Sectional drawing which shows typically the cross-section of the Hall element about the modification of the vertical Hall element which concerns on the said 4th Embodiment. Sectional drawing which shows typically the cross-section of the Hall element about the modification of the vertical Hall element which concerns on the said 2nd Embodiment. Sectional drawing which shows typically the cross-section of the Hall element about another modification of the vertical Hall element which concerns on the said 2nd Embodiment. (A)-(c) is sectional drawing which shows the manufacturing process about the manufacturing method of the vertical Hall element of the modification. (A)-(c) is sectional drawing which shows the manufacturing process about the manufacturing method of the vertical Hall element of the modification. (A)-(c) is sectional drawing which shows the manufacturing process about the manufacturing method of the vertical Hall element of the modification. (A) is a top view which shows typically the planar structure of the Hall element about an example of the conventional vertical Hall element, (b) is sectional drawing along the L1-L1 line of (a). The circuit diagram which shows the equivalent circuit of the resistance component in the magnetic detection part of the conventional vertical Hall element.

Explanation of symbols

DESCRIPTION OF SYMBOLS 11 ... Semiconductor layer, 11a ... Semiconductor substrate, 12 ... Insulating layer, 13 ... Semiconductor region, 13a, 13b ... Semiconductor film, 14a-14c ... N ⁺ diffusion layer, CTa-CTd ... Contact, DF ... Diffusion layer, ESa, ESb ... Etch stopper film, HP ... Magnetic detector (hole plate), IL1, IL2a, IL2b, IL3, IL4a, IL4b ... Insulating film, TF, TFa, TFb ... Film material, W1a to W3a, W1b to W3b, W1c ... Conductor film.

Claims (7)

When a magnetic field component horizontal to the surface of the semiconductor substrate is applied to the magnetic detection unit in a state where a current including a component perpendicular to the surface of the semiconductor substrate is supplied to the magnetic detection unit in the substrate, the magnetic field component A vertical Hall element that generates a corresponding Hall voltage,
A contact between the magnetic detection unit electrically partitioned by an insulating film in the semiconductor substrate and a set of wirings for detecting the Hall voltage is inside the semiconductor substrate and at the center of the magnetic detection unit A wiring material is embedded in a part of the insulating film selectively removed so as to face the portion. Similarly, each wiring of the wiring set is connected to the contact inside the semiconductor substrate. A vertical Hall element characterized in that an etch stopper film having higher etching resistance than the semiconductor substrate remains. The contact of the said magnetic detection part and the group of wiring for supplying the said electric current to this magnetic detection part is arrange | positioned in the form facing the surface side and back surface side of the said semiconductor substrate. Vertical Hall element. The semiconductor substrate is made of silicon, the vertical Hall element of the etch stopper film according to claim 1 or 2 made of silicon oxide. When a current including a current component perpendicular to the surface of the semiconductor substrate is supplied to the magnetic detection unit in the substrate and a magnetic field component horizontal to the surface of the substrate is applied to the magnetic detection unit, the magnetic field component A method of manufacturing a vertical Hall element that generates a Hall voltage corresponding to
A step of electrically partitioning a partial region in the semiconductor substrate and forming an insulating film using the region as the magnetic detection part; and an etch stopper having higher etching resistance than the semiconductor substrate in the semiconductor substrate. A step of forming a film, and a part of the insulating film is formed so as to face the central portion of the magnetic detection unit by etching from the surface of the semiconductor substrate by guiding an etching path to the formed etch stopper film. A step of selectively etching and a step of embedding a wiring material in a trench formed by etching from the surface of the semiconductor substrate to form a set of wirings for detecting the Hall voltage. A method for manufacturing a vertical Hall element. The etch stopper film is formed through ion implantation into the semiconductor substrate.
The manufacturing method of the vertical Hall element of Claim 4 . The method for manufacturing a vertical Hall element according to claim 4, wherein the semiconductor substrate is made of silicon, and the etch stopper film is formed by implanting oxygen ions into the semiconductor substrate. The step of forming the etch stopper film is performed by forming a trench in the semiconductor substrate, forming the etch stopper film on the inner wall surface of the trench, and then embedding the semiconductor film in the trench again. Item 5. A method for producing a vertical Hall element according to Item 4 .

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