JP4449786B2 - 高周波モジュールとその製造方法 - Google Patents
高周波モジュールとその製造方法 Download PDFInfo
- Publication number
- JP4449786B2 JP4449786B2 JP2005057241A JP2005057241A JP4449786B2 JP 4449786 B2 JP4449786 B2 JP 4449786B2 JP 2005057241 A JP2005057241 A JP 2005057241A JP 2005057241 A JP2005057241 A JP 2005057241A JP 4449786 B2 JP4449786 B2 JP 4449786B2
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- resin sheet
- electronic component
- hole
- substrate
- resin
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01075—Rhenium [Re]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Combinations Of Printed Boards (AREA)
Description
図1は本発明の実施の形態1における高周波モジュールの断面図である。図1において、21は熱硬化性の樹脂基板であり多層に形成されている。そして、この内層はインナービア22で各層の上面と下面が接続されている。また、各層の上面には銅箔パターン23が敷設されている。
図2は、実施の形態2で製造される高周波モジュールを構成する積層基板の平面図である。図2において、40はワークシート状の大親基板である。この大親基板40は4個に分割されて、中親基板41となる。またこの中親基板41は、図3に示すように、更に30個(5×6個)の子基板42の集合体であり、この子基板42が分割されて基板21になる。この子基板42の単位で以降説明する。
次に、加熱圧着について説明する。図13は、加熱圧着前の要部断面図である。図13において、シート48は簡略化している。また、復調回路も集積回路29で代表して簡略化している。
24 ランドパターン
25 集積回路
26 抵抗
27 半田
29 集積回路
30 抵抗
31 半田
32 シート
33 シート
53 樹脂流動埋設部
61 樹脂
Claims (2)
- 基板の表面に設けられた第1のランドと、この第1のランドと第1の電子部品とが第1の接続固定材により接続固定されて第1の高周波回路を形成するとともに、前記基板の裏面に設けられた第2のランドと、この第2のランドに第2の接続固定材でパターン線路の長さを一定にするための定位置に接続固定された第2の電子部品とで第2の高周波回路を形成し、前記第1の高周波回路を覆うシールドを有した高周波モジュールであって、前記第2の電子部品側に積層されるとともにその外周に樹脂流動埋設部を有する第1の樹脂シートと、第1の樹脂シートの上に設けられた開口部のない第2の樹脂シートと、この第2の樹脂シートの上に設けられた電極とを設け、前記第1の樹脂シートと前記基板とが一体化された高周波モジュールにおいて、前記基板には前記電極と前記第1あるいは前記第2の高周波回路との間を接続するスルーホールを設け、前記シールドは前記スルーホールと接続されるとともに前記シールドと前記スルーホールとの間に半田を充填するための隙間を形成する手段を有した高周波モジュール。
- 複数個の子基板の集合体で形成された親基板の裏面に第2の高周波回路が形成される第2の電子部品をリフローにて定位置に装着する第1の工程と、この第1の工程の後で前記第2の電子部品外周に樹脂流動埋設部を有する第1の樹脂シートとこの第1の樹脂シートの上方に開口の無い第2の樹脂シートと銅箔とがこの順に積層される第2の工程と、この第2の工程の後で、前記第1の樹脂シートと前記第2の樹脂シートと前記銅箔と前記親基板とを加熱圧着して一体化する第3の工程と、この第3の工程の後で前記親基板の表面に第1の高周波回路を形成する第1の電子部品を装着する第4の工程とを有し、前記第1の樹脂シートには、前記第2の電子部品と対応する部分に、この第2の電子部品の外周との間に隙間を有する開口が設けられた織布或いは不織布と、この織布或いは不織布に含浸された樹脂とを有する板状体を用いるとともに、前記樹脂には熱流動性を有する樹脂を用いた高周波モジュールの製造方法において、前記第3と第4の工程の間には、隣接する子基板の間に孔を形成し、前記銅箔に電極を形成するとともに、この電極と前記親基板に設けられた前記第1や第2の電子回路とを接続するスルーホールを形成する工程を設け、前記第4の工程の後には、前記孔を分割してそれぞれの子基板の単位に分離する第5の工程を設け、前記第4と第5の工程の間には、前記スルーホールとの間に半田を充填するための隙間を形成する手段を有するシールドで第1の高周波回路を覆うとともに前記シールドと前記スルーホールを接続する工程を設けた高周波モジュールの製造方法。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005057241A JP4449786B2 (ja) | 2005-03-02 | 2005-03-02 | 高周波モジュールとその製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005057241A JP4449786B2 (ja) | 2005-03-02 | 2005-03-02 | 高周波モジュールとその製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2006245192A JP2006245192A (ja) | 2006-09-14 |
JP4449786B2 true JP4449786B2 (ja) | 2010-04-14 |
Family
ID=37051316
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2005057241A Expired - Fee Related JP4449786B2 (ja) | 2005-03-02 | 2005-03-02 | 高周波モジュールとその製造方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4449786B2 (ja) |
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2005
- 2005-03-02 JP JP2005057241A patent/JP4449786B2/ja not_active Expired - Fee Related
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Publication number | Publication date |
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JP2006245192A (ja) | 2006-09-14 |
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