JP2006245192A - 高周波モジュールとその製造方法 - Google Patents
高周波モジュールとその製造方法 Download PDFInfo
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- JP2006245192A JP2006245192A JP2005057241A JP2005057241A JP2006245192A JP 2006245192 A JP2006245192 A JP 2006245192A JP 2005057241 A JP2005057241 A JP 2005057241A JP 2005057241 A JP2005057241 A JP 2005057241A JP 2006245192 A JP2006245192 A JP 2006245192A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01075—Rhenium [Re]
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- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H01—ELECTRIC ELEMENTS
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- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
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- Production Of Multi-Layered Print Wiring Board (AREA)
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Abstract
【解決手段】本発明は、基板21の表面に集積回路25や抵抗26で形成された第1の高周波回路を形成するとともに、基板21の裏面に集積回路29や抵抗30で形成された第2の高周波回路を形成したものであり、基板の上下両面に分けて第1の電子部品と第2の電子部品を形成しているので、小型化された高周波モジュールを得ることができる。これにより、初期の目的を達成することができる。
【選択図】図1
Description
図1は本発明の実施の形態1における高周波モジュールの断面図である。図1において、21は熱硬化性の樹脂基板であり多層に形成されている。そして、この内層はインナービア22で各層の上面と下面が接続されている。また、各層の上面には銅箔パターン23が敷設されている。
図2は、実施の形態2で製造される高周波モジュールを構成する積層基板の平面図である。図2において、40はワークシート状の大親基板である。この大親基板40は4個に分割されて、中親基板41となる。またこの中親基板41は、図3に示すように、更に30個(5×6個)の子基板42の集合体であり、この子基板42が分割されて基板21になる。この子基板42の単位で以降説明する。
次に、加熱圧着について説明する。図13は、加熱圧着前の要部断面図である。図13において、シート48は簡略化している。また、復調回路も集積回路29で代表して簡略化している。
24 ランドパターン
25 集積回路
26 抵抗
27 半田
29 集積回路
30 抵抗
31 半田
32 シート
33 シート
53 樹脂流動埋設部
61 樹脂
Claims (7)
- 基板の表面に設けられた第1のランドと、この第1のランドと第1の電子部品とが第1の接続固定材により接続固定されて第1の高周波回路を形成するとともに、前記基板の裏面に設けられた第2のランドと、この第2のランドに第2の接続固定材で接続固定された第2の電子部品とで第2の高周波回路を形成する高周波モジュールであって、前記第2の電子部品側に積層されるとともにその外周に樹脂流動埋設部を有する第1のシートを設け、前記第1のシートは、前記第2の電子部品に対応する部分に、この第2の電子部品の外周との間に隙間を有する開口が設けられた織布或いは不織布と、この織布或いは不織布に含浸された樹脂とを有する板状体を用いるとともに、前記樹脂には熱流動性を有する樹脂を用い、前記第1のシートと前記基板を加熱圧着して一体化した高周波モジュール。
- 調整部品は基板の表面側に設けられた請求項1に記載の高周波モジュール。
- 第1のシートと基板との接着は、第2の接続固定材の温度が前記第2の接続固定材が溶融しない程度に低い温度で前記第1のシートと前記基板を加熱圧着した請求項1に記載の高周波モジュール。
- 第1のシートには熱硬化性の樹脂が用いられた請求項1に記載の高周波モジュール。
- 第1のシートの上面に第2のシートを設け、この第2のシートの上面全面に銅箔が設けられた請求項1に記載の高周波モジュール。
- 第1のシートの上面に第2のシートを設け、この第2のシートの上面に設けられた電極へ第1の高周波回路と第2の高周波回路の信号が導出された請求項1に記載の高周波モジュール。
- 基板の裏面に第2の高周波回路が形成される第2の電子部品を装着する第1の工程と、この第1の工程の後で前記第2の電子部品外周に樹脂流動埋設部を有する第1のシートとを積層する第2の工程と、この第2の工程の後で、前記第1のシートと前記基板を加熱圧着して一体化する第3の工程と、この第3の工程の後で前記基板の表面に第1の高周波回路を形成する第1の電子部品を装着する第4の工程とを有し、前記第1のシートは、前記第2の電子部品と対応する部分に、この第2の電子部品の外周との間に隙間を有する開口が設けられた織布或いは不織布と、この織布或いは不織布に含浸された樹脂とを有する板状体を用いるとともに、前記樹脂には熱流動性を有する樹脂を用いた高周波モジュールの製造方法。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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JP2005057241A JP4449786B2 (ja) | 2005-03-02 | 2005-03-02 | 高周波モジュールとその製造方法 |
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JP2005057241A JP4449786B2 (ja) | 2005-03-02 | 2005-03-02 | 高周波モジュールとその製造方法 |
Publications (2)
Publication Number | Publication Date |
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JP2006245192A true JP2006245192A (ja) | 2006-09-14 |
JP4449786B2 JP4449786B2 (ja) | 2010-04-14 |
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JP2005057241A Expired - Fee Related JP4449786B2 (ja) | 2005-03-02 | 2005-03-02 | 高周波モジュールとその製造方法 |
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