JP4431340B2 - ナノ・スケールの半導体接合を形成する方法 - Google Patents
ナノ・スケールの半導体接合を形成する方法 Download PDFInfo
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- JP4431340B2 JP4431340B2 JP2003293392A JP2003293392A JP4431340B2 JP 4431340 B2 JP4431340 B2 JP 4431340B2 JP 2003293392 A JP2003293392 A JP 2003293392A JP 2003293392 A JP2003293392 A JP 2003293392A JP 4431340 B2 JP4431340 B2 JP 4431340B2
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- 239000004065 semiconductor Substances 0.000 title claims description 279
- 238000000034 method Methods 0.000 title claims description 103
- 239000002019 doping agent Substances 0.000 claims description 73
- 239000000758 substrate Substances 0.000 claims description 52
- 230000004888 barrier function Effects 0.000 claims description 15
- 238000005530 etching Methods 0.000 claims description 14
- 238000009792 diffusion process Methods 0.000 claims description 9
- 238000007373 indentation Methods 0.000 claims description 4
- 238000003825 pressing Methods 0.000 claims description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 2
- 238000010438 heat treatment Methods 0.000 claims 1
- 238000001540 jet deposition Methods 0.000 claims 1
- 229920005591 polysilicon Polymers 0.000 claims 1
- 239000000463 material Substances 0.000 description 48
- 239000010409 thin film Substances 0.000 description 18
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 11
- 229920003229 poly(methyl methacrylate) Polymers 0.000 description 11
- 239000004926 polymethyl methacrylate Substances 0.000 description 11
- 229910052710 silicon Inorganic materials 0.000 description 11
- 239000010703 silicon Substances 0.000 description 11
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 9
- 238000010586 diagram Methods 0.000 description 8
- 239000011521 glass Substances 0.000 description 7
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 6
- YMWUJEATGCHHMB-UHFFFAOYSA-N Dichloromethane Chemical compound ClCCl YMWUJEATGCHHMB-UHFFFAOYSA-N 0.000 description 6
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 6
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical compound [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 description 6
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 6
- 230000000295 complement effect Effects 0.000 description 6
- 229910052732 germanium Inorganic materials 0.000 description 6
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 6
- 229910052751 metal Inorganic materials 0.000 description 6
- 239000002184 metal Substances 0.000 description 5
- 229910052594 sapphire Inorganic materials 0.000 description 5
- 239000010980 sapphire Substances 0.000 description 5
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 description 4
- WYURNTSHIVDZCO-UHFFFAOYSA-N Tetrahydrofuran Chemical compound C1CCOC1 WYURNTSHIVDZCO-UHFFFAOYSA-N 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 4
- 238000001312 dry etching Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 239000000377 silicon dioxide Substances 0.000 description 4
- 235000012239 silicon dioxide Nutrition 0.000 description 4
- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Chemical compound [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 description 4
- 238000001039 wet etching Methods 0.000 description 4
- ZWEHNKRNPOVVGH-UHFFFAOYSA-N 2-Butanone Chemical compound CCC(C)=O ZWEHNKRNPOVVGH-UHFFFAOYSA-N 0.000 description 3
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 3
- 238000003486 chemical etching Methods 0.000 description 3
- 239000004020 conductor Substances 0.000 description 3
- 239000007943 implant Substances 0.000 description 3
- 239000012212 insulator Substances 0.000 description 3
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 2
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 2
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- YCIMNLLNPGFGHC-UHFFFAOYSA-N catechol Chemical compound OC1=CC=CC=C1O YCIMNLLNPGFGHC-UHFFFAOYSA-N 0.000 description 2
- 239000003989 dielectric material Substances 0.000 description 2
- 238000011066 ex-situ storage Methods 0.000 description 2
- 230000009477 glass transition Effects 0.000 description 2
- 238000010297 mechanical methods and process Methods 0.000 description 2
- 230000005226 mechanical processes and functions Effects 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 239000002070 nanowire Substances 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 229920000642 polymer Polymers 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- YLQBMQCUIZJEEH-UHFFFAOYSA-N tetrahydrofuran Natural products C=1C=COC=1 YLQBMQCUIZJEEH-UHFFFAOYSA-N 0.000 description 2
- BLIQUJLAJXRXSG-UHFFFAOYSA-N 1-benzyl-3-(trifluoromethyl)pyrrolidin-1-ium-3-carboxylate Chemical compound C1C(C(=O)O)(C(F)(F)F)CCN1CC1=CC=CC=C1 BLIQUJLAJXRXSG-UHFFFAOYSA-N 0.000 description 1
- 239000004215 Carbon black (E152) Substances 0.000 description 1
- PIICEJLVQHRZGT-UHFFFAOYSA-N Ethylenediamine Chemical compound NCCN PIICEJLVQHRZGT-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 229910018503 SF6 Inorganic materials 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 238000013019 agitation Methods 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- UMIVXZPTRXBADB-UHFFFAOYSA-N benzocyclobutene Chemical compound C1=CC=C2CCC2=C1 UMIVXZPTRXBADB-UHFFFAOYSA-N 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229930195733 hydrocarbon Natural products 0.000 description 1
- 150000002430 hydrocarbons Chemical class 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 229910001092 metal group alloy Inorganic materials 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000000523 sample Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
- 238000000992 sputter etching Methods 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- SFZCNBIFKDRMGX-UHFFFAOYSA-N sulfur hexafluoride Chemical compound FS(F)(F)(F)(F)F SFZCNBIFKDRMGX-UHFFFAOYSA-N 0.000 description 1
- 229960000909 sulfur hexafluoride Drugs 0.000 description 1
- 238000004506 ultrasonic cleaning Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y40/00—Manufacture or treatment of nanostructures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
- H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/3086—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8222—Bipolar technology
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/082—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/102—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including bipolar components
- H01L27/1021—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including bipolar components including diodes only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
- H01L29/0665—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body the shape of the body defining a nanostructure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
- H01L29/0665—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body the shape of the body defining a nanostructure
- H01L29/0669—Nanowires or nanotubes
- H01L29/0673—Nanowires or nanotubes oriented parallel to a substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66272—Silicon vertical transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/732—Vertical transistors
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/0002—Lithographic processes using patterning methods other than those involving the exposure to radiation, e.g. by stamping
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/07—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
- H01L27/0744—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common without components of the field effect type
- H01L27/075—Bipolar transistors in combination with diodes, or capacitors, or resistors, e.g. lateral bipolar transistor, and vertical bipolar transistor and resistor
- H01L27/0755—Vertical bipolar transistor in combination with diodes, or capacitors, or resistors
- H01L27/0761—Vertical bipolar transistor in combination with diodes only
- H01L27/0766—Vertical bipolar transistor in combination with diodes only with Schottky diodes only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/961—Ion beam source and generation
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/962—Quantum dots and lines
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S977/00—Nanotechnology
- Y10S977/84—Manufacture, treatment, or detection of nanostructure
- Y10S977/887—Nanoimprint lithography, i.e. nanostamp
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49126—Assembling bases
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49128—Assembling formed circuit to base
Description
214 ショットキー障壁
216 導電層
220 基板
226 誘電体層
232 第1の半導体層
242 ベース・エピタキシャル半導体層242
234 第1の接合
244 第2の接合
246 第2の半導体層
248 幅
249 長さ
Claims (8)
- ナノ・スケールの半導体接合を形成する方法であって、
第2の極性のドーパントを持つ基板上に、第1の極性のドーパントを持つエピタキシャル半導体層を形成することにより、第1の半導体接合を前記エピタキシャル半導体層と前記基板との間に形成するステップと、
前記エピタキシャル半導体層上に刷込み層を形成するステップと、
ナノ・インプリンタを前記刷込み層に対して押し付けることにより、前記刷込み層に第1のへこみ部分と第1の隆起部分を形成するステップと、
前記第1のへこみ部分を除去して前記エピタキシャル半導体層を露出させるステップと、
前記露出されたエピタキシャル半導体層及び前記第1の隆起部分にエッチングマスクを形成するステップと、
前記第1の隆起部分を除去することにより前記エピタキシャル半導体層の選択部分を露出するステップと、
前記エピタキシャル半導体層の選択部分を除去して、互いに平行な複数の第1のエピタキシャル半導体ラインを形成するステップと、
前記第1のエピタキシャル半導体ラインと同じ厚さに、平坦化用誘電体層を形成するステップと、
前記エピタキシャル半導体層および平坦化用誘電体層の上に、第2の極性のドーパントを含む第2の半導体層を形成することにより、第2の半導体接合を前記第2の半導体層と前記エピタキシャル半導体ラインとの間に形成するステップと、
前記第2の半導体層上に、第2の刷込み層を形成するステップと、
ナノ・インプリンタを、前記第2の刷込み層に対して押し付けるけることにより、前記第2の刷込み層に第2のへこみ部分と第2の隆起部分を形成するステップと、
前記第2のへこみ部分を除去して前記第2の半導体層を露出させるステップと、
前記露出された第2の半導体層及び前記第2の隆起部分にエッチングマスクを形成するステップと、
前記第2の隆起部分を除去することにより前記第2の半導体層の選択部分を露出するステップと、
前記第2の半導体層の選択部分を除去して、前記複数の第1のエピタキシャル半導体ラインに対して20度から90度の角度を有する、互いに平行な複数の第2の半導体ラインを形成するステップと、を含む方法。 - 前記第2の半導体接合が、少なくとも1つの横寸法が75ナノメートルよりも小さいエリアを有する、請求項1に記載の方法。
- 前記第2の半導体層を形成することは、ドープポリシリコン層を形成することを含む請求項1に記載の方法。
- 前記露出されたエピタキシャル半導体層及び前記第1の隆起部分にエッチングマスクを形成するステップは、
前記露出されたエピタキシャル半導体層及び前記第1の隆起部分に、拡散バリヤを形成するステップと、
前記拡散バリヤの上に、導電層を形成するステップと、を含む、請求項1記載の方法。 - 前記露出されたエピタキシャル半導体層及び前記第2の隆起部分にエッチングマスクを形成するステップは、
前記露出されたエピタキシャル半導体層及び前記第2の隆起部分に、拡散バリヤを形成するステップと、
前記拡散バリヤの上に、導電層を形成するステップと、を含む、請求項1記載の方法。 - 前記拡散バリヤおよび前記導電層を用いて、前記エピタキシャル半導体層に対して電気コンタクトを形成するステップをさらに含む、請求項4または5に記載の方法。
- 前記ナノ・インプリンタを押し付けるステップは、前記刷込み層を加熱するステップをさらに含む請求項1記載の方法。
- 前記刷り込み層を形成するステップは、インクジェット付着を用いて、前記刷り込み層を付着するステップを含む請求項1に記載の方法。
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US10/256,984 US6762094B2 (en) | 2002-09-27 | 2002-09-27 | Nanometer-scale semiconductor devices and method of making |
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JP2004119962A JP2004119962A (ja) | 2004-04-15 |
JP4431340B2 true JP4431340B2 (ja) | 2010-03-10 |
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US (2) | US6762094B2 (ja) |
EP (1) | EP1403928B1 (ja) |
JP (1) | JP4431340B2 (ja) |
TW (1) | TWI318453B (ja) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6872645B2 (en) * | 2002-04-02 | 2005-03-29 | Nanosys, Inc. | Methods of positioning and/or orienting nanostructures |
GB0229191D0 (en) * | 2002-12-14 | 2003-01-22 | Plastic Logic Ltd | Embossing of polymer devices |
US6791338B1 (en) * | 2003-01-31 | 2004-09-14 | Hewlett-Packard Development Company, L.P. | Gated nanoscale switch having channel of molecular wires |
US7034332B2 (en) * | 2004-01-27 | 2006-04-25 | Hewlett-Packard Development Company, L.P. | Nanometer-scale memory device utilizing self-aligned rectifying elements and method of making |
WO2005109519A1 (en) * | 2004-05-01 | 2005-11-17 | Cristopher Croft Jones | Charge carrier flow apparatus and methods |
SG147419A1 (en) | 2004-09-21 | 2008-11-28 | Molecular Imprints Inc | Method of forming an in-situ recessed structure |
US20090115094A1 (en) * | 2007-05-29 | 2009-05-07 | Chou Stephen Y | Methods for making continuous nanochannels |
WO2009079780A1 (en) * | 2007-12-21 | 2009-07-02 | The Royal Institution For The Advancement Of Learning/Mcgill University | Low temperature ceramic microelectromechanical structures |
Family Cites Families (40)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1347688A (en) * | 1970-05-22 | 1974-02-27 | Marconi Co Ltd | Semiconductor memory arrays |
DE2903665C2 (de) * | 1979-01-31 | 1984-09-27 | Siemens AG, 1000 Berlin und 8000 München | Über die Hohlleiterbreitseite geknicktes Rechteckhohlleiter-Winkelstück |
JPS55154760A (en) * | 1979-05-22 | 1980-12-02 | Nec Corp | Semiconductor device |
DE2926785C2 (de) * | 1979-07-03 | 1985-12-12 | HIGRATHERM electric GmbH, 7100 Heilbronn | Bipolarer Transistor und Verfahren zu seiner Herstellung |
USH157H (en) * | 1985-10-25 | 1986-11-04 | The United States Of America As Represented By The Secretary Of The Army | Work rest support assembly |
US5138408A (en) * | 1988-04-15 | 1992-08-11 | Nec Corporation | Resonant tunneling hot carrier transistor |
US5164813A (en) * | 1988-06-24 | 1992-11-17 | Unitrode Corporation | New diode structure |
KR940001425B1 (ko) * | 1990-11-06 | 1994-02-23 | 재단법인 한국전자통신연구소 | 수직구조를 갖는 바이폴라형 다이내믹 램을 제조하는 방법 및 그 다이내믹 램의 구조 |
JP2701633B2 (ja) * | 1991-12-09 | 1998-01-21 | 日本電気株式会社 | 半導体装置 |
US5475341A (en) * | 1992-06-01 | 1995-12-12 | Yale University | Sub-nanoscale electronic systems and devices |
USH1570H (en) * | 1993-03-31 | 1996-08-06 | The United States Of America As Represented By The Secretary Of The Army | Variable lateral quantum confinement transistor |
US5962863A (en) * | 1993-09-09 | 1999-10-05 | The United States Of America As Represented By The Secretary Of The Navy | Laterally disposed nanostructures of silicon on an insulating substrate |
US5990516A (en) * | 1994-09-13 | 1999-11-23 | Kabushiki Kaisha Toshiba | MOSFET with a thin gate insulating film |
US5714766A (en) * | 1995-09-29 | 1998-02-03 | International Business Machines Corporation | Nano-structure memory device |
US5772905A (en) | 1995-11-15 | 1998-06-30 | Regents Of The University Of Minnesota | Nanoimprint lithography |
US6518189B1 (en) * | 1995-11-15 | 2003-02-11 | Regents Of The University Of Minnesota | Method and apparatus for high density nanostructures |
US6261938B1 (en) * | 1997-02-12 | 2001-07-17 | Quantiscript, Inc. | Fabrication of sub-micron etch-resistant metal/semiconductor structures using resistless electron beam lithography |
US6069380A (en) | 1997-07-25 | 2000-05-30 | Regents Of The University Of Minnesota | Single-electron floating-gate MOS memory |
JP3727449B2 (ja) * | 1997-09-30 | 2005-12-14 | シャープ株式会社 | 半導体ナノ結晶の製造方法 |
US6319566B1 (en) * | 1997-11-12 | 2001-11-20 | John C. Polanyi | Method of molecular-scale pattern imprinting at surfaces |
US6297531B2 (en) | 1998-01-05 | 2001-10-02 | International Business Machines Corporation | High performance, low power vertical integrated CMOS devices |
US6128216A (en) * | 1998-05-13 | 2000-10-03 | Micron Technology Inc. | High density planar SRAM cell with merged transistors |
KR100308072B1 (ko) * | 1998-08-27 | 2001-10-19 | 박종섭 | 반도체소자의 제조방법 |
US6141260A (en) * | 1998-08-27 | 2000-10-31 | Micron Technology, Inc. | Single electron resistor memory device and method for use thereof |
US6197641B1 (en) | 1998-08-28 | 2001-03-06 | Lucent Technologies Inc. | Process for fabricating vertical transistors |
EP1003078A3 (en) | 1998-11-17 | 2001-11-07 | Corning Incorporated | Replicating a nanoscale pattern |
US6518156B1 (en) * | 1999-03-29 | 2003-02-11 | Hewlett-Packard Company | Configurable nanoscale crossbar electronic circuits made by electrochemical reaction |
US6256767B1 (en) * | 1999-03-29 | 2001-07-03 | Hewlett-Packard Company | Demultiplexer for a molecular wire crossbar network (MWCN DEMUX) |
DE19927029A1 (de) * | 1999-06-04 | 2001-02-08 | Siemens Ag | Verfahren zum Betrieb eines elektronischen Überstromauslösers eines Leistungsschalters |
US6190929B1 (en) | 1999-07-23 | 2001-02-20 | Micron Technology, Inc. | Methods of forming semiconductor devices and methods of forming field emission displays |
US6153534A (en) * | 1999-07-27 | 2000-11-28 | Advanced Micro Devices, Inc. | Method for fabricating a dual material gate of a short channel field effect transistor |
US6150670A (en) | 1999-11-30 | 2000-11-21 | International Business Machines Corporation | Process for fabricating a uniform gate oxide of a vertical transistor |
US6165911A (en) | 1999-12-29 | 2000-12-26 | Calveley; Peter Braden | Method of patterning a metal layer |
US6248674B1 (en) | 2000-02-02 | 2001-06-19 | Hewlett-Packard Company | Method of aligning nanowires |
US6294450B1 (en) * | 2000-03-01 | 2001-09-25 | Hewlett-Packard Company | Nanoscale patterning for the formation of extensive wires |
US6534414B1 (en) * | 2000-06-14 | 2003-03-18 | Integrated Device Technology, Inc. | Dual-mask etch of dual-poly gate in CMOS processing |
US7301199B2 (en) * | 2000-08-22 | 2007-11-27 | President And Fellows Of Harvard College | Nanoscale wires and related devices |
US6664143B2 (en) | 2000-11-22 | 2003-12-16 | North Carolina State University | Methods of fabricating vertical field effect transistors by conformal channel layer deposition on sidewalls |
US6552409B2 (en) * | 2001-06-05 | 2003-04-22 | Hewlett-Packard Development Company, Lp | Techniques for addressing cross-point diode memory arrays |
US6847047B2 (en) * | 2002-11-04 | 2005-01-25 | Advanced Micro Devices, Inc. | Methods that facilitate control of memory arrays utilizing zener diode-like devices |
-
2002
- 2002-09-27 US US10/256,984 patent/US6762094B2/en not_active Expired - Lifetime
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2003
- 2003-08-14 JP JP2003293392A patent/JP4431340B2/ja not_active Expired - Lifetime
- 2003-08-28 EP EP03255355.4A patent/EP1403928B1/en not_active Expired - Lifetime
- 2003-08-28 TW TW092123806A patent/TWI318453B/zh not_active IP Right Cessation
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US20040063282A1 (en) | 2004-04-01 |
TW200408122A (en) | 2004-05-16 |
US6762094B2 (en) | 2004-07-13 |
JP2004119962A (ja) | 2004-04-15 |
US20040061151A1 (en) | 2004-04-01 |
TWI318453B (en) | 2009-12-11 |
EP1403928A3 (en) | 2006-11-22 |
EP1403928B1 (en) | 2018-09-19 |
EP1403928A2 (en) | 2004-03-31 |
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