JP4401500B2 - 静電放電における寄生バイポーラ効果を低減する半導体装置および方法 - Google Patents
静電放電における寄生バイポーラ効果を低減する半導体装置および方法 Download PDFInfo
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- JP4401500B2 JP4401500B2 JP33849799A JP33849799A JP4401500B2 JP 4401500 B2 JP4401500 B2 JP 4401500B2 JP 33849799 A JP33849799 A JP 33849799A JP 33849799 A JP33849799 A JP 33849799A JP 4401500 B2 JP4401500 B2 JP 4401500B2
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- current
- coupled
- transistor
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- esd
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- 239000004065 semiconductor Substances 0.000 title claims description 11
- 238000000034 method Methods 0.000 title claims description 10
- 230000003071 parasitic effect Effects 0.000 title description 18
- 230000000694 effects Effects 0.000 title description 5
- 239000000758 substrate Substances 0.000 claims description 27
- 230000008878 coupling Effects 0.000 claims 3
- 238000010168 coupling process Methods 0.000 claims 3
- 238000005859 coupling reaction Methods 0.000 claims 3
- 238000001514 detection method Methods 0.000 claims 2
- 235000003434 Sesamum indicum Nutrition 0.000 claims 1
- 244000000231 Sesamum indicum Species 0.000 claims 1
- 238000002347 injection Methods 0.000 description 28
- 239000007924 injection Substances 0.000 description 28
- 238000009792 diffusion process Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 230000009471 action Effects 0.000 description 4
- 230000015556 catabolic process Effects 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000006378 damage Effects 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 230000007246 mechanism Effects 0.000 description 2
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- 230000008901 benefit Effects 0.000 description 1
- 230000001066 destructive effect Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000008450 motivation Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0266—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
- H01L27/027—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements specially adapted to provide an electrical current path other than the field effect induced current path
- H01L27/0277—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements specially adapted to provide an electrical current path other than the field effect induced current path involving a parasitic bipolar transistor triggered by the local electrical biasing of the layer acting as base of said parasitic bipolar transistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/201,392 US6329692B1 (en) | 1998-11-30 | 1998-11-30 | Circuit and method for reducing parasitic bipolar effects during eletrostatic discharges |
US201392 | 1998-11-30 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2000174133A JP2000174133A (ja) | 2000-06-23 |
JP4401500B2 true JP4401500B2 (ja) | 2010-01-20 |
Family
ID=22745641
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP33849799A Expired - Fee Related JP4401500B2 (ja) | 1998-11-30 | 1999-11-29 | 静電放電における寄生バイポーラ効果を低減する半導体装置および方法 |
Country Status (5)
Country | Link |
---|---|
US (3) | US6329692B1 (ko) |
JP (1) | JP4401500B2 (ko) |
KR (1) | KR100717973B1 (ko) |
CN (1) | CN1167132C (ko) |
TW (1) | TW454306B (ko) |
Families Citing this family (38)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6809348B1 (en) * | 1999-10-08 | 2004-10-26 | Denso Corporation | Semiconductor device and method for manufacturing the same |
JP3217336B2 (ja) * | 1999-11-18 | 2001-10-09 | 株式会社 沖マイクロデザイン | 半導体装置 |
JP2002083931A (ja) * | 2000-09-08 | 2002-03-22 | Nec Corp | 半導体集積回路装置 |
JP2002305254A (ja) * | 2001-04-05 | 2002-10-18 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
US6650103B2 (en) * | 2001-05-31 | 2003-11-18 | Analog Devices, Inc. | Magnetic snapback sensor circuit and electrostatic discharge circuit using same |
JP2003031669A (ja) * | 2001-07-13 | 2003-01-31 | Ricoh Co Ltd | 半導体装置 |
DE10201056B4 (de) * | 2002-01-14 | 2007-06-21 | Infineon Technologies Ag | Halbleitereinrichtung mit einem bipolaren Schutztransistor |
US7042689B2 (en) * | 2003-01-21 | 2006-05-09 | Taiwan Semiconductor Manufacturing Co., Ltd. | High voltage tolerant ESD design for analog and RF applications in deep submicron CMOS technologies |
US7075763B2 (en) * | 2002-10-31 | 2006-07-11 | Micron Technology, Inc. | Methods, circuits, and applications using a resistor and a Schottky diode |
US6900970B2 (en) * | 2003-01-22 | 2005-05-31 | Freescale Semiconductor, Inc. | Electrostatic discharge circuit and method therefor |
US6879476B2 (en) * | 2003-01-22 | 2005-04-12 | Freescale Semiconductor, Inc. | Electrostatic discharge circuit and method therefor |
US6844597B2 (en) * | 2003-02-10 | 2005-01-18 | Freescale Semiconductor, Inc. | Low voltage NMOS-based electrostatic discharge clamp |
US8000067B1 (en) | 2003-05-15 | 2011-08-16 | Marvell International Ltd. | Method and apparatus for improving supply noise rejection |
US7196887B2 (en) * | 2003-05-28 | 2007-03-27 | Texas Instruments Incorporated | PMOS electrostatic discharge (ESD) protection device |
JP2005093696A (ja) * | 2003-09-17 | 2005-04-07 | Matsushita Electric Ind Co Ltd | 横型mosトランジスタ |
US6996786B2 (en) * | 2003-09-30 | 2006-02-07 | International Business Machines Corporation | Latch-up analysis and parameter modification |
US7089520B2 (en) * | 2003-11-19 | 2006-08-08 | International Business Machines Corporation | Methodology for placement based on circuit function and latchup sensitivity |
US7819079B2 (en) | 2004-12-22 | 2010-10-26 | Applied Materials, Inc. | Cartesian cluster tool configuration for lithography type processes |
US7798764B2 (en) | 2005-12-22 | 2010-09-21 | Applied Materials, Inc. | Substrate processing sequence in a cartesian robot cluster tool |
US7371022B2 (en) | 2004-12-22 | 2008-05-13 | Sokudo Co., Ltd. | Developer endpoint detection in a track lithography system |
US7651306B2 (en) | 2004-12-22 | 2010-01-26 | Applied Materials, Inc. | Cartesian robot cluster tool architecture |
TW200739872A (en) * | 2006-04-04 | 2007-10-16 | Univ Nat Chiao Tung | Power line electrostatic discharge protection circuit featuring triple voltage tolerance |
TW200816878A (en) * | 2006-09-27 | 2008-04-01 | Silicon Motion Inc | Electrostatic discharge (ESD) protection device |
US7672101B2 (en) | 2007-09-10 | 2010-03-02 | Taiwan Semiconductor Manufacturing Co., Ltd. | ESD protection circuit and method |
CN101533830B (zh) * | 2008-03-11 | 2012-05-09 | 义隆电子股份有限公司 | 高压垫的静电放电保护装置 |
WO2010038101A1 (en) * | 2008-10-03 | 2010-04-08 | Freescale Semiconductor, Inc. | Semiconductor device and electronic device |
US8693149B2 (en) * | 2009-05-20 | 2014-04-08 | Semiconductor Components Industries, Llc. | Transient suppression device and method therefor |
US8193585B2 (en) * | 2009-10-29 | 2012-06-05 | Freescale Semiconductor, Inc. | Semiconductor device with increased snapback voltage |
US20110102046A1 (en) * | 2009-10-31 | 2011-05-05 | Pankaj Kumar | Interfacing between differing voltage level requirements in an integrated circuit system |
US8344472B2 (en) | 2010-03-30 | 2013-01-01 | Freescale Semiconductor, Inc. | Semiconductor device and method |
US8338872B2 (en) | 2010-03-30 | 2012-12-25 | Freescale Semiconductor, Inc. | Electronic device with capcitively coupled floating buried layer |
US8927391B2 (en) * | 2011-05-27 | 2015-01-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package-on-package process for applying molding compound |
CN102332403A (zh) * | 2011-09-20 | 2012-01-25 | 中国科学院微电子研究所 | 一种半导体结构及其制造方法 |
US10553633B2 (en) * | 2014-05-30 | 2020-02-04 | Klaus Y.J. Hsu | Phototransistor with body-strapped base |
TWI521824B (zh) * | 2014-08-08 | 2016-02-11 | 朋程科技股份有限公司 | 靜電放電防護電路及具有此電路的電壓調節器晶片 |
US10332871B2 (en) * | 2016-03-18 | 2019-06-25 | Intel IP Corporation | Area-efficient and robust electrostatic discharge circuit |
US10840907B1 (en) | 2019-11-19 | 2020-11-17 | Honeywell International Inc. | Source-coupled logic with reference controlled inputs |
US11329481B2 (en) | 2020-05-18 | 2022-05-10 | Littelfuse, Inc. | Current limiting circuit arrangement |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5019888A (en) | 1987-07-23 | 1991-05-28 | Texas Instruments Incorporated | Circuit to improve electrostatic discharge protection |
US5157573A (en) | 1989-05-12 | 1992-10-20 | Western Digital Corporation | ESD protection circuit with segmented buffer transistor |
US5465189A (en) | 1990-03-05 | 1995-11-07 | Texas Instruments Incorporated | Low voltage triggering semiconductor controlled rectifiers |
US5021853A (en) | 1990-04-27 | 1991-06-04 | Digital Equipment Corporation | N-channel clamp for ESD protection in self-aligned silicided CMOS process |
US5153529A (en) * | 1991-08-30 | 1992-10-06 | Motorola, Inc. | Rail-to-rail input stage of an operational amplifier |
US5225702A (en) | 1991-12-05 | 1993-07-06 | Texas Instruments Incorporated | Silicon controlled rectifier structure for electrostatic discharge protection |
US5440162A (en) | 1994-07-26 | 1995-08-08 | Rockwell International Corporation | ESD protection for submicron CMOS circuits |
US5528193A (en) * | 1994-11-21 | 1996-06-18 | National Semiconductor Corporation | Circuit for generating accurate voltage levels below substrate voltage |
US5534792A (en) * | 1995-02-15 | 1996-07-09 | Burr-Brown Corporation | Low capacitance electronically controlled active bus terminator circuit and method |
US5798658A (en) * | 1995-06-15 | 1998-08-25 | Werking; Paul M. | Source-coupled logic with reference controlled inputs |
KR100223923B1 (ko) * | 1996-11-19 | 1999-10-15 | 구본준 | 정전기 방지장치 |
US5903419A (en) | 1997-09-29 | 1999-05-11 | Motorola, Inc. | Circuit for electrostatic discharge (ESD) protection |
US6204715B1 (en) * | 1999-02-26 | 2001-03-20 | General Motors Corporation | Signal amplifying circuit |
-
1998
- 1998-11-30 US US09/201,392 patent/US6329692B1/en not_active Expired - Lifetime
-
1999
- 1999-11-04 TW TW088119225A patent/TW454306B/zh not_active IP Right Cessation
- 1999-11-29 CN CNB99120977XA patent/CN1167132C/zh not_active Expired - Lifetime
- 1999-11-29 JP JP33849799A patent/JP4401500B2/ja not_active Expired - Fee Related
- 1999-11-30 KR KR1019990053752A patent/KR100717973B1/ko active IP Right Grant
-
2000
- 2000-04-27 US US09/559,354 patent/US6373104B1/en not_active Expired - Lifetime
- 2000-04-27 US US09/560,501 patent/US6284616B1/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
KR20000035771A (ko) | 2000-06-26 |
JP2000174133A (ja) | 2000-06-23 |
US6284616B1 (en) | 2001-09-04 |
US6373104B1 (en) | 2002-04-16 |
US6329692B1 (en) | 2001-12-11 |
KR100717973B1 (ko) | 2007-05-16 |
TW454306B (en) | 2001-09-11 |
CN1167132C (zh) | 2004-09-15 |
CN1256516A (zh) | 2000-06-14 |
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