JP4353362B2 - ビデオ信号処理システムおよびディジタル・ビデオ・システムにおいてデータを処理する方法 - Google Patents

ビデオ信号処理システムおよびディジタル・ビデオ・システムにおいてデータを処理する方法 Download PDF

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Publication number
JP4353362B2
JP4353362B2 JP2003550497A JP2003550497A JP4353362B2 JP 4353362 B2 JP4353362 B2 JP 4353362B2 JP 2003550497 A JP2003550497 A JP 2003550497A JP 2003550497 A JP2003550497 A JP 2003550497A JP 4353362 B2 JP4353362 B2 JP 4353362B2
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JP
Japan
Prior art keywords
sample rate
signal
pixel region
rate converter
video
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
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JP2003550497A
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English (en)
Japanese (ja)
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JP2005512414A5 (enExample
JP2005512414A (ja
Inventor
マーク ハツチンソン,ダニエル
フランシス ラムレイク,マーク
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Thomson Licensing SAS
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Thomson Licensing SAS
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Publication of JP2005512414A5 publication Critical patent/JP2005512414A5/ja
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Publication of JP4353362B2 publication Critical patent/JP4353362B2/ja
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00Television systems
    • H04N7/01Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00Television systems
    • H04N7/01Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • H04N7/0102Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level involving the resampling of the incoming video signal
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/44Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/445Receiver circuitry for the reception of television signals according to analogue transmission standards for displaying additional information
    • H04N5/45Picture in picture, e.g. displaying simultaneously another television channel in a region of the screen

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Picture Signal Circuits (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)
  • Television Systems (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
JP2003550497A 2001-12-03 2002-11-25 ビデオ信号処理システムおよびディジタル・ビデオ・システムにおいてデータを処理する方法 Expired - Lifetime JP4353362B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US33665001P 2001-12-03 2001-12-03
US10/190,185 US6894725B2 (en) 2001-12-03 2002-07-05 Sample rate converter system
PCT/US2002/037630 WO2003049436A1 (en) 2001-12-03 2002-11-25 Sample rate converter system

Publications (3)

Publication Number Publication Date
JP2005512414A JP2005512414A (ja) 2005-04-28
JP2005512414A5 JP2005512414A5 (enExample) 2006-01-05
JP4353362B2 true JP4353362B2 (ja) 2009-10-28

Family

ID=26885850

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003550497A Expired - Lifetime JP4353362B2 (ja) 2001-12-03 2002-11-25 ビデオ信号処理システムおよびディジタル・ビデオ・システムにおいてデータを処理する方法

Country Status (8)

Country Link
US (1) US6894725B2 (enExample)
EP (1) EP1486066B1 (enExample)
JP (1) JP4353362B2 (enExample)
KR (1) KR100966189B1 (enExample)
CN (1) CN100380955C (enExample)
AU (1) AU2002365832A1 (enExample)
MX (1) MXPA04005117A (enExample)
WO (1) WO2003049436A1 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ATE452385T1 (de) * 2001-10-10 2010-01-15 Texas Instruments Inc Einrichtung und verfahren zur bildskalierung
US7409056B2 (en) * 2002-12-16 2008-08-05 Broadcom Corporation Switchboard for dual-rate single-band communication system
US20080062312A1 (en) * 2006-09-13 2008-03-13 Jiliang Song Methods and Devices of Using a 26 MHz Clock to Encode Videos
US20080062311A1 (en) * 2006-09-13 2008-03-13 Jiliang Song Methods and Devices to Use Two Different Clocks in a Television Digital Encoder
US8502920B2 (en) * 2007-03-14 2013-08-06 Vyacheslav Shyshkin Method and apparatus for extracting a desired television signal from a wideband IF input
US8902365B2 (en) * 2007-03-14 2014-12-02 Lance Greggain Interference avoidance in a television receiver

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5420643A (en) * 1990-06-01 1995-05-30 Thomson Consumer Electronics, Inc. Chrominance processing system for compressing and expanding video data
US5335074A (en) * 1993-02-08 1994-08-02 Panasonic Technologies, Inc. Phase locked loop synchronizer for a resampling system having incompatible input and output sample rates
JP3312074B2 (ja) * 1994-01-24 2002-08-05 シャープ株式会社 映像信号のディジタル記録及び再生装置
DE4423226C1 (de) * 1994-07-01 1995-08-24 Harris Corp Digitaler Dekoder für Videosignale und Verfahren zur digitalen Dekodierung von Videosignalen
KR0165512B1 (ko) * 1996-01-29 1999-03-20 김광호 면적영향 상관방법 및 이를 이용한 디지탈 영상신호에 대한 클럭레이트 변환방법 및 장치

Also Published As

Publication number Publication date
EP1486066B1 (en) 2013-05-01
US20030103163A1 (en) 2003-06-05
KR100966189B1 (ko) 2010-06-25
WO2003049436A1 (en) 2003-06-12
JP2005512414A (ja) 2005-04-28
EP1486066A4 (en) 2006-01-04
MXPA04005117A (es) 2004-08-11
EP1486066A1 (en) 2004-12-15
CN100380955C (zh) 2008-04-09
US6894725B2 (en) 2005-05-17
KR20050058261A (ko) 2005-06-16
CN1600028A (zh) 2005-03-23
AU2002365832A1 (en) 2003-06-17

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