MXPA04005117A - Sistema convertidor de velocidad de muestra. - Google Patents

Sistema convertidor de velocidad de muestra.

Info

Publication number
MXPA04005117A
MXPA04005117A MXPA04005117A MXPA04005117A MXPA04005117A MX PA04005117 A MXPA04005117 A MX PA04005117A MX PA04005117 A MXPA04005117 A MX PA04005117A MX PA04005117 A MXPA04005117 A MX PA04005117A MX PA04005117 A MXPA04005117 A MX PA04005117A
Authority
MX
Mexico
Prior art keywords
sample rate
pixel domain
rate convertor
orthogonal
converter system
Prior art date
Application number
MXPA04005117A
Other languages
English (en)
Spanish (es)
Inventor
Mark Hutchinson Daniel
Original Assignee
Thomson Licensing Sa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson Licensing Sa filed Critical Thomson Licensing Sa
Publication of MXPA04005117A publication Critical patent/MXPA04005117A/es

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • H04N7/0102—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level involving the resampling of the incoming video signal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/445—Receiver circuitry for the reception of television signals according to analogue transmission standards for displaying additional information
    • H04N5/45—Picture in picture, e.g. displaying simultaneously another television channel in a region of the screen

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Picture Signal Circuits (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)
  • Television Systems (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
MXPA04005117A 2001-12-03 2002-11-25 Sistema convertidor de velocidad de muestra. MXPA04005117A (es)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US33665001P 2001-12-03 2001-12-03
US10/190,185 US6894725B2 (en) 2001-12-03 2002-07-05 Sample rate converter system
PCT/US2002/037630 WO2003049436A1 (en) 2001-12-03 2002-11-25 Sample rate converter system

Publications (1)

Publication Number Publication Date
MXPA04005117A true MXPA04005117A (es) 2004-08-11

Family

ID=26885850

Family Applications (1)

Application Number Title Priority Date Filing Date
MXPA04005117A MXPA04005117A (es) 2001-12-03 2002-11-25 Sistema convertidor de velocidad de muestra.

Country Status (8)

Country Link
US (1) US6894725B2 (enExample)
EP (1) EP1486066B1 (enExample)
JP (1) JP4353362B2 (enExample)
KR (1) KR100966189B1 (enExample)
CN (1) CN100380955C (enExample)
AU (1) AU2002365832A1 (enExample)
MX (1) MXPA04005117A (enExample)
WO (1) WO2003049436A1 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ATE452385T1 (de) * 2001-10-10 2010-01-15 Texas Instruments Inc Einrichtung und verfahren zur bildskalierung
US7409056B2 (en) * 2002-12-16 2008-08-05 Broadcom Corporation Switchboard for dual-rate single-band communication system
US20080062312A1 (en) * 2006-09-13 2008-03-13 Jiliang Song Methods and Devices of Using a 26 MHz Clock to Encode Videos
US20080062311A1 (en) * 2006-09-13 2008-03-13 Jiliang Song Methods and Devices to Use Two Different Clocks in a Television Digital Encoder
US8502920B2 (en) * 2007-03-14 2013-08-06 Vyacheslav Shyshkin Method and apparatus for extracting a desired television signal from a wideband IF input
US8902365B2 (en) * 2007-03-14 2014-12-02 Lance Greggain Interference avoidance in a television receiver

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5420643A (en) * 1990-06-01 1995-05-30 Thomson Consumer Electronics, Inc. Chrominance processing system for compressing and expanding video data
US5335074A (en) * 1993-02-08 1994-08-02 Panasonic Technologies, Inc. Phase locked loop synchronizer for a resampling system having incompatible input and output sample rates
JP3312074B2 (ja) * 1994-01-24 2002-08-05 シャープ株式会社 映像信号のディジタル記録及び再生装置
DE4423226C1 (de) * 1994-07-01 1995-08-24 Harris Corp Digitaler Dekoder für Videosignale und Verfahren zur digitalen Dekodierung von Videosignalen
KR0165512B1 (ko) * 1996-01-29 1999-03-20 김광호 면적영향 상관방법 및 이를 이용한 디지탈 영상신호에 대한 클럭레이트 변환방법 및 장치

Also Published As

Publication number Publication date
EP1486066B1 (en) 2013-05-01
US20030103163A1 (en) 2003-06-05
KR100966189B1 (ko) 2010-06-25
WO2003049436A1 (en) 2003-06-12
JP2005512414A (ja) 2005-04-28
EP1486066A4 (en) 2006-01-04
EP1486066A1 (en) 2004-12-15
JP4353362B2 (ja) 2009-10-28
CN100380955C (zh) 2008-04-09
US6894725B2 (en) 2005-05-17
KR20050058261A (ko) 2005-06-16
CN1600028A (zh) 2005-03-23
AU2002365832A1 (en) 2003-06-17

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Legal Events

Date Code Title Description
FG Grant or registration