JP4190606B2 - 集積回路における経路配線 - Google Patents

集積回路における経路配線 Download PDF

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Publication number
JP4190606B2
JP4190606B2 JP33961297A JP33961297A JP4190606B2 JP 4190606 B2 JP4190606 B2 JP 4190606B2 JP 33961297 A JP33961297 A JP 33961297A JP 33961297 A JP33961297 A JP 33961297A JP 4190606 B2 JP4190606 B2 JP 4190606B2
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JP
Japan
Prior art keywords
line
logic block
routing
layer
ground
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP33961297A
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English (en)
Japanese (ja)
Other versions
JPH10178101A (ja
JPH10178101A5 (enExample
Inventor
ニコラス・エス・フィダシア
リチャード・エム・マッククロスキー
デビッド・エヌ・ゴールドバーグ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HP Inc
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Publication of JPH10178101A publication Critical patent/JPH10178101A/ja
Publication of JPH10178101A5 publication Critical patent/JPH10178101A5/ja
Application granted granted Critical
Publication of JP4190606B2 publication Critical patent/JP4190606B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/394—Routing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
JP33961297A 1996-12-11 1997-12-10 集積回路における経路配線 Expired - Fee Related JP4190606B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US763,501 1996-12-11
US08/763,501 US5894142A (en) 1996-12-11 1996-12-11 Routing for integrated circuits

Publications (3)

Publication Number Publication Date
JPH10178101A JPH10178101A (ja) 1998-06-30
JPH10178101A5 JPH10178101A5 (enExample) 2005-07-21
JP4190606B2 true JP4190606B2 (ja) 2008-12-03

Family

ID=25068003

Family Applications (1)

Application Number Title Priority Date Filing Date
JP33961297A Expired - Fee Related JP4190606B2 (ja) 1996-12-11 1997-12-10 集積回路における経路配線

Country Status (2)

Country Link
US (1) US5894142A (enExample)
JP (1) JP4190606B2 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW400650B (en) * 1996-11-26 2000-08-01 Hitachi Ltd Semiconductor integrated circuit device
JPH1140736A (ja) * 1997-07-16 1999-02-12 Nec Ic Microcomput Syst Ltd 半導体装置
JP2000077609A (ja) 1998-08-28 2000-03-14 Hitachi Ltd 半導体集積回路装置
JP5296963B2 (ja) * 2005-12-21 2013-09-25 エルピーダメモリ株式会社 多層配線半導体集積回路、半導体装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01270330A (ja) * 1988-04-22 1989-10-27 Seiko Epson Corp マスター・スライス方式集積回路装置
JPH0727968B2 (ja) * 1988-12-20 1995-03-29 株式会社東芝 半導体集積回路装置
JPH0329342A (ja) * 1989-06-26 1991-02-07 Toshiba Corp 半導体装置
US5742099A (en) * 1994-09-29 1998-04-21 Intel Corporation Power bus for an integrated circuit including end-to-end arranged segments providing power and ground

Also Published As

Publication number Publication date
US5894142A (en) 1999-04-13
JPH10178101A (ja) 1998-06-30

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