JP4175980B2 - 高周波用電力半導体装置 - Google Patents
高周波用電力半導体装置 Download PDFInfo
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- JP4175980B2 JP4175980B2 JP2003299994A JP2003299994A JP4175980B2 JP 4175980 B2 JP4175980 B2 JP 4175980B2 JP 2003299994 A JP2003299994 A JP 2003299994A JP 2003299994 A JP2003299994 A JP 2003299994A JP 4175980 B2 JP4175980 B2 JP 4175980B2
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- Prior art keywords
- power semiconductor
- main terminal
- semiconductor device
- terminal portion
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- Prior art date
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
- H01L2224/48139—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate with an intermediate bond, e.g. continuous wire daisy chain
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
Landscapes
- Wire Bonding (AREA)
Description
電力用半導体素子を囲鐃する樹脂製のケースで前記電力用半導体素子の主電流を流す複数の主端子を支持し、
該主端子が、内側端部に前記電力用半導体素子と接続するボンディングワイヤの一端をボンディングする領域をなす大幅主端子部と、該大幅主端子部から延在しその延在端が前記ケースより突出し外部接続部をなす小幅主端子部とで形成された電力用半導体装置において、
前記小幅主端子部は、前記ケースと同一材質の絶縁層を介して複数の導電材を対向して配設された積層電極を含み、このことにより主端子の表面積を増大すると共に、
隣接する前記大幅主端子部は、夫々間に絶縁材を挟むようにして、配設され、
複数の前記主端子は前記電力用半導体装置への設定において個々に独立していることを特徴とする。
図1は、本発明の実施の形態1に係る電力用半導体装置の平面図である。ベース板2上にセラミックス基板6が設定され、更に該セラミックス基板6上に、半導体素子8やダイオード10が設置される。結線のためにワイヤ12が利用されている。半導体装置全体はケース4により覆われる。
Claims (2)
- 電力用半導体素子を囲鐃する樹脂製のケースで前記電力用半導体素子の主電流を流す複数の主端子を支持し、
該主端子が、内側端部に前記電力用半導体素子と接続するボンディングワイヤの一端をボンディングする領域をなす大幅主端子部と、該大幅主端子部から延在しその延在端が前記ケースより突出し外部接続部をなす小幅主端子部とで形成された電力用半導体装置において、
前記小幅主端子部は、前記ケースと同一材質の絶縁層を介して複数の導電材を対向して配設された積層電極を含み、このことにより主端子の表面積を増大すると共に、
隣接する前記大幅主端子部は、夫々間に絶縁材を挟むようにして、配設され、
複数の前記主端子は前記電力用半導体装置への設定において個々に独立していることを特徴とする電力用半導体装置。 - 延在端を折り曲げ、その先端を大幅主端子部まで折り返し、該折り返しの先端部を前記大幅主端子部表面に固定させたことを特徴とする請求項1に記載の電力用半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003299994A JP4175980B2 (ja) | 2003-08-25 | 2003-08-25 | 高周波用電力半導体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003299994A JP4175980B2 (ja) | 2003-08-25 | 2003-08-25 | 高周波用電力半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2005072250A JP2005072250A (ja) | 2005-03-17 |
JP4175980B2 true JP4175980B2 (ja) | 2008-11-05 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2003299994A Expired - Fee Related JP4175980B2 (ja) | 2003-08-25 | 2003-08-25 | 高周波用電力半導体装置 |
Country Status (1)
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JP (1) | JP4175980B2 (ja) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
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US7817374B2 (en) | 2007-05-01 | 2010-10-19 | Tdk Corporation | Thin film device with lead conductor film of increased surface area |
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2003
- 2003-08-25 JP JP2003299994A patent/JP4175980B2/ja not_active Expired - Fee Related
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