JP4173693B2 - 多重個別信号を送受信する方法および装置 - Google Patents

多重個別信号を送受信する方法および装置 Download PDF

Info

Publication number
JP4173693B2
JP4173693B2 JP2002174533A JP2002174533A JP4173693B2 JP 4173693 B2 JP4173693 B2 JP 4173693B2 JP 2002174533 A JP2002174533 A JP 2002174533A JP 2002174533 A JP2002174533 A JP 2002174533A JP 4173693 B2 JP4173693 B2 JP 4173693B2
Authority
JP
Japan
Prior art keywords
signal
individual
phase difference
composite signal
phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2002174533A
Other languages
English (en)
Japanese (ja)
Other versions
JP2003046466A (ja
JP2003046466A5 (enExample
Inventor
マーカス ケー ブレイスケイナー ベルント
ロブレロ ミゲル
シュティッヒ コンラート
ステファン アーバンスカイ ラルフ
Original Assignee
ルーセント テクノロジーズ インコーポレーテッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ルーセント テクノロジーズ インコーポレーテッド filed Critical ルーセント テクノロジーズ インコーポレーテッド
Publication of JP2003046466A publication Critical patent/JP2003046466A/ja
Publication of JP2003046466A5 publication Critical patent/JP2003046466A5/ja
Application granted granted Critical
Publication of JP4173693B2 publication Critical patent/JP4173693B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/07—Synchronising arrangements using pulse stuffing for systems with different or fluctuating information rates or bit rates
    • H04J3/076—Bit and byte stuffing, e.g. SDH/PDH desynchronisers, bit-leaking
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0685—Clock or time synchronisation in a node; Intranode synchronisation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP2002174533A 2001-06-15 2002-06-14 多重個別信号を送受信する方法および装置 Expired - Fee Related JP4173693B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP01305212.1 2001-06-15
EP01305212A EP1267507B1 (en) 2001-06-15 2001-06-15 A method and apparatus for transmitting and receiving multiplex tributary signals

Publications (3)

Publication Number Publication Date
JP2003046466A JP2003046466A (ja) 2003-02-14
JP2003046466A5 JP2003046466A5 (enExample) 2005-10-13
JP4173693B2 true JP4173693B2 (ja) 2008-10-29

Family

ID=8182031

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002174533A Expired - Fee Related JP4173693B2 (ja) 2001-06-15 2002-06-14 多重個別信号を送受信する方法および装置

Country Status (5)

Country Link
US (1) US7254207B2 (enExample)
EP (1) EP1267507B1 (enExample)
JP (1) JP4173693B2 (enExample)
CA (1) CA2381834A1 (enExample)
DE (1) DE60108728T2 (enExample)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU2002251700A1 (en) * 2000-12-20 2002-07-30 Primarion, Inc. Pll/dll dual loop data synchronization
AU2002235260A1 (en) * 2000-12-20 2002-07-01 Primarion, Inc. Pll/dll dual loop data synchronization utilizing a granular fifo fill level indicator
DE60313812T3 (de) * 2003-04-02 2019-04-11 Christopher Julian Travis Methode zur erzeugung eines oszillator-taktsignales
JP4731806B2 (ja) * 2003-12-01 2011-07-27 パナソニック株式会社 冷凍サイクル装置およびその制御方法
US7519064B1 (en) 2003-12-05 2009-04-14 Mahi Networks, Inc. Virtual tributary processing using shared resources
US7715443B1 (en) * 2003-12-05 2010-05-11 Meriton Networks Us Inc. Boundary processing between a synchronous network and a plesiochronous network
US7646836B1 (en) * 2005-03-01 2010-01-12 Network Equipment Technologies, Inc. Dynamic clock rate matching across an asynchronous network
US7839885B2 (en) * 2005-04-25 2010-11-23 Lsi Corporation Connection memory for tributary time-space switches
US20070220184A1 (en) * 2006-03-17 2007-09-20 International Business Machines Corporation Latency-locked loop (LLL) circuit, buffer including the circuit, and method of adjusting a data rate
JP4927033B2 (ja) * 2008-05-30 2012-05-09 Ｎｔｔエレクトロニクス株式会社 クロック再生用信号生成方法及びクロック再生回路
US9294263B2 (en) * 2014-01-02 2016-03-22 Advanced Micro Devices, Inc. Methods and systems of synchronizer selection

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL8501737A (nl) * 1985-06-17 1987-01-16 At & T & Philips Telecomm Hogere orde digitaal transmissiesysteem voorzien van een multiplexer en een demultiplexer.
CA1262173A (en) * 1986-05-29 1989-10-03 James Angus Mceachern Synchronization of asynchronous data signals
US4755987A (en) * 1987-06-05 1988-07-05 Bell Communications Research, Inc. High speed scrambling at lower clock speeds
US5313502A (en) * 1990-05-09 1994-05-17 Ant Nachrichtentechnik Gmbh Arrangement for imaging a useful signal from the frame of a first digital signal at a first bite rate into the frame of a second digital signal at a second bite rate
US5796796A (en) * 1996-01-11 1998-08-18 Industrial Technology Research Institute Pointer adjustment jitter cancellation processor utilizing phase hopping and phase leaking techniques
US6229863B1 (en) * 1998-11-02 2001-05-08 Adc Telecommunications, Inc. Reducing waiting time jitter
JP3862884B2 (ja) * 1999-03-04 2006-12-27 三菱電機株式会社 トリビュタリ信号の多重送信システムおよび多重送信方法
US7002986B1 (en) * 1999-07-08 2006-02-21 Nortel Networks Limited Mapping arbitrary signals into SONET
JP2001168827A (ja) * 1999-12-14 2001-06-22 Mitsubishi Electric Corp データ送受信システム、データ受信装置およびデータ送信装置

Also Published As

Publication number Publication date
EP1267507B1 (en) 2005-02-02
DE60108728T2 (de) 2006-05-11
CA2381834A1 (en) 2002-12-15
US7254207B2 (en) 2007-08-07
JP2003046466A (ja) 2003-02-14
DE60108728D1 (de) 2005-03-10
US20020191724A1 (en) 2002-12-19
EP1267507A1 (en) 2002-12-18

Similar Documents

Publication Publication Date Title
EP1585243B1 (en) Method of and apparatus for demultiplexing digital signal streams
US6493832B1 (en) Communication apparatus which handles a time stamp
JP4173693B2 (ja) 多重個別信号を送受信する方法および装置
US8855148B2 (en) Multiplexing transmission system, receiver apparatus and module, transmitter apparatus for multiplexing transmission
EP3599736B1 (en) Zero offset clock distribution
US6714548B2 (en) Digital clock recovery
JP3398593B2 (ja) ペイロード相対位置変更要求装置及びそれを含む伝送装置
US8369354B2 (en) Method for synchronizing a transmission of applications data frames, corresponding sender and receiver devices and storage means
JP3869431B2 (ja) 時分割多重化された映像信号の使用者クロックコードを用いたクロック復元方法及びその方法に使用される送／受信装置
US5825778A (en) VSB modulator input interfrace using simple standard
JP3123511B2 (ja) 位相制御装置
JP2952935B2 (ja) 非同期データ伝送システム
KR930007133B1 (ko) 동기식 다중장치의 대기시간지터 감소회로
KR100474766B1 (ko) 동기 디지털 망에서의 지터 제거장치
JPH05244113A (ja) データ伝送装置
JPH053463A (ja) スタツフ多重通信受信回路
JP4476266B2 (ja) デマッピング方法および回路
JP3439428B2 (ja) Ｓｄｈ伝送装置
JP2002247002A (ja) 非同期信号伝送装置
JP2020088626A (ja) 光伝送システム、光伝送装置、及び伝送方法
JPH0468684A (ja) 映像信号伝送システム
JPH0870289A (ja) データ伝送システムとそれに用いられるスタッフ多重送信装置および受信装置
JPH06132944A (ja) 伝送路無瞬断切替方法
US20120331176A1 (en) Method for transport and recovery of client clocking across asynchronous server networks
JPH0338931A (ja) スタッフ同期方式によるデータ伝送装置

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20050610

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20050610

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20070525

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20070530

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20070830

A602 Written permission of extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A602

Effective date: 20070904

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20071130

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20080723

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20080814

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110822

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120822

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130822

Year of fee payment: 5

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees