JP4122871B2 - Method for producing boron phosphide layer and boron phosphide-based semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention can be effectively used to block leakage of operating current when configuring a field effect transistor (FET), or a current blocking layer or the like when configuring a light emitting element such as a light emitting diode (LED). The present invention relates to a novel technique for producing a high-resistance boron phosphide layer that can be suitably used as a gas phase growth means.
[0002]
[Prior art]
Conventionally, a high-resistance, high-resistance III-V compound semiconductor layer that exhibits electrical insulation is used as, for example, a buffer layer of a Schottky junction field effect transistor (MESFET). (See J. Crystal Growth, 55 (1981), pages 255-262). For example, in a gallium nitride (GaN) -based MESFET, a monomer boron phosphide (BP) that has been consciously added with oxygen (O) belonging to a group VI element having an element periodicity to increase resistance. There is an example of technology that uses as a buffer layer. Further, in a blue band light-emitting diode (LED), oxygen is doped (not referred to as JP-A-10-242569), not from a pn junction composed of n-type and p-type boron phosphide layers. There is an example in which a current confinement layer is simply formed from the obtained high resistance boron phosphide layer.
[0003]
High resistance boron phosphide layers doped with Group VI oxygen have traditionally been boron compounds containing oxygen atoms, such as triethoxyborane ((C ₂ H _Five O) _Three B)) is used as a boron raw material and is formed by vapor phase growth means. Alternatively, it is formed by a metal organic chemical vapor deposition (MOCVD) means in a gas phase atmosphere mixed with a trace amount of oxygen. The resistivity (specific resistance) at room temperature of the boron phosphide layer doped with oxygen obtained by these conventional vapor phase growth techniques is 1 × 10 ^Four It remains below ohm-centimeter (unit Ω-cm).
[0004]
In addition to means for forming a high-resistance semiconductor layer by adding an impurity capable of forming a deep level in a III-V compound semiconductor such as oxygen or chromium (Cr), a shallow level ( There may be a means for forming a high level layer by adding an impurity imparting conductivity and forming an electrical compensation effect. For example, a p-type impurity imparting p-type conductivity is added to an n-type III-V compound semiconductor layer, and a residual donor is electrically compensated depending on an acceptor. This is a means for obtaining a high resistance layer. On the contrary, it is possible to consider a means for forming a high resistance layer by adding an n-type impurity to the p-type III-V group compound semiconductor layer and compensating the remaining acceptor with a donor. In addition, after vapor-phase growth of the group III-V compound semiconductor layer, there may be a means for injecting ions of impurities having a conductivity type opposite to that of the layer to increase the resistance.
[0005]
[Problems to be solved by the invention]
In the conventional technical means for obtaining a high resistance boron phosphide layer by adding oxygen, the obtained resistivity is 1 × 10 5 as described above. ^Four Ω · cm or less. The operating current leakage is further suppressed, and the high transconductance (g) is achieved. _m In order to construct the FET), it is necessary to use a boron phosphide layer having a higher resistance. Further, in the FET, impurities forming deep impurity levels such as oxygen act as trap centers and cause the drain current to drift over time. . That is, the means for increasing the resistance by adding oxygen does not sufficiently suppress the leakage of drain current, and has excellent pinch-off characteristics. _m High resistance boron phosphide layers that provide sufficiently stable FETs have not been achieved.
[0006]
In addition, a technique of adding an impurity imparting conductivity can be considered as a means for forming a high-resistance boron phosphide layer. However, vapor grown boron phosphide already contains 10% in the undoped state. ²⁰ cm ^-3 There is a large amount of vacancies to a degree or more. For example, an undoped boron phosphide layer grown at a high temperature exceeding 1000 ° C. has a large amount of phosphorus vacancies, and boron occupies these vacancies. It becomes the low resistance layer which exhibits. It is actually difficult to electrically compensate the acceptor involved in the phosphorus vacancies present in such a high concentration by adding an n-type impurity to form a high resistance layer. 10 ²⁰ -10 ^{twenty one} cm ^-3 In order to generate a high concentration of donor, it is necessary to add at least more n-type impurities, which only leads to messy crystals. A so-called counter-doping method in which a large amount of n-type impurity is added to the p-type conductive layer and vice versa is added to the n-type conductive layer. In the case of specific boron phosphide, whose pores dominate the conductivity type, it cannot be a sufficiently effective technical means for forming a high resistance boron phosphide layer.
[0007]
The present invention solves the problems of the prior art in view of the peculiar properties of boron phosphide semiconductors, which contain boron and phosphorus, both of which easily generate volatile substances at high temperatures, and is a field effect transistor. It is an object of the present invention to provide a method for producing a high resistance boron phosphide layer on a crystal substrate that can be used for (FET), a light emitting element, and the like.
[0008]
[Means for Solving the Problems]
That is, the present invention
(1) In a method of manufacturing a boron phosphide layer in which a boron phosphide (BP) layer is directly formed on a crystal substrate by vapor phase growth means, the temperature of the crystal substrate is maintained in a range of 1000 ° C. or more and 1200 ° C. or less. A boron phosphide layer having a high resistance is formed by adding magnesium (Mg) to a boron phosphide layer exhibiting p-type conductivity in an undoped state. Production method.
(2) In a method for manufacturing a boron phosphide layer formed by bonding a boron phosphide layer to an amorphous underlayer formed on a crystal substrate by vapor phase growth means, the temperature of the crystal substrate is set to 750 ° C. or higher. In addition, high resistance phosphation is achieved by adding magnesium (Mg) to a boron phosphide layer that exhibits p-type conductivity in an undoped state while maintaining the amorphous underlayer at a temperature lower than the vapor phase growth temperature. A method for producing a boron phosphide layer, comprising forming a boron layer.
(3) An amorphous underlayer containing boron (B) and phosphorus (P) grown directly on a crystal substrate at a temperature of 750 ° C. or more and 1200 ° C. or less and having a layer thickness of 2 nanometers ( nm) or more and 50 nm or less, and the method for producing a boron phosphide layer according to (2) above.
(4) The boron phosphide layer according to (2) or (3) above, wherein the high resistance boron phosphide layer and the amorphous underlayer are formed by the same vapor phase growth means. Method.
(5) A boron phosphide-based semiconductor element comprising a high-resistance boron phosphide layer formed by the method described in any one of (1) to (4) above.
(6) The phosphorus phosphide described in (5) above, wherein the boron phosphide-based semiconductor element is a field effect transistor (FET) in which an active layer is provided above a high resistance boron phosphide layer. Boron-based semiconductor element.
(7) The boron phosphide-based semiconductor element is a Schottky junction field effect transistor having a Schottky junction metal gate electrode bonded to a high resistance boron phosphide layer. The boron phosphide-based semiconductor element according to (5) or (6) above.
(8) The boron phosphide-based semiconductor element is a light-emitting element in which an ohmic electrode made of an ohmic contact metal material is provided above a high-resistance boron phosphide layer. A boron phosphide-based semiconductor device according to 5).
(9) A boron phosphide-based semiconductor element includes a high-resistance boron phosphide layer as a current confinement layer for constricting a flow path of an element operating current supplied from an ohmic contact electrode to a light emitting layer. The boron phosphide-based semiconductor element according to (8) above, which is a laser diode.
(10) The boron phosphide-based semiconductor element is a light-emitting diode provided with a high-resistance boron phosphide layer as a current blocking layer for blocking forward current from flowing to the projected region of the ohmic contact electrode. The boron phosphide-based semiconductor device according to (8) above, wherein
It is.
[0009]
DETAILED DESCRIPTION OF THE INVENTION
The boron phosphide layer of the present invention is vapor-phase grown on a substrate made of conductive or insulating crystals having heat resistance at high temperatures. For boron phosphide-based light-emitting elements such as LEDs and LDs, conductive crystals such as silicon (Si) single crystals, silicon carbide (SiC), and gallium nitride (GaN) are suitable as substrates because of the ease of arrangement of ohmic electrodes. Available to: Insulating sapphire (α-Al ₂ O _Three Single crystal) and other oxide single crystals can be used as crystal substrates for FET applications. Examples of means for vapor-depositing a boron phosphide layer on these crystal substrates include a halogen method, a hydride method, a molecular beam epitaxial (MBE) method, and an MOCVD method. Triethylboron ((C ₂ H _Five ) _Three The MOCVD method using an organic boron compound such as B) as a boron source is a convenient means because an amorphous boron phosphide layer can be vapor-phase grown at a relatively low temperature.
[0010]
The temperature at which the boron phosphide layer is directly vapor-deposited on the crystal substrate as described above is in the range of 1000 ° C. to 1200 ° C. The present invention is based on vapor phase growth of a boron phosphide layer having p-type conductivity in an undoped state where impurities are not added intentionally. At high temperatures above 1200 ° C, B ₁₃ P ₂ Multimeric boron phosphide (see J. Am. Ceramic Soc., 47 (1) (1964), pages 44 to 46), which is inconvenient for obtaining monomeric boron phosphide. The main vapor growth conditions of the vapor growth temperature and the V / III ratio are 1 × 10 3 in the undoped state. ¹⁹ cm ^-3 ~ 1x10 ²⁰ cm ^-3 It is preferable to set so as to obtain a carrier (hole) concentration in the above range. The higher the vapor phase growth temperature, the higher the carrier (hole) concentration obtained. The V / III ratio is the concentration ratio of the phosphorus raw material to the boron raw material during vapor phase growth. The carrier concentration can be measured by a normal Hall effect.
[0011]
In the present invention, the high resistance boron phosphide layer is vapor-phase grown by intentionally doping magnesium (Mg) under the condition that the p-type boron phosphide layer can be vapor-phase grown in an undoped state. Magnesium is a typical p-type impurity for III-V group compound semiconductors (see “III-V Group Compound Semiconductors” (May 20, 1994, published by Baifukan Co., Ltd.), pages 73-77) . The present invention is completely different from the method of forming a high-resistance semiconductor layer by counter-doping magnesium (Mg) in an n-type III-V group compound semiconductor layer. Originally, in a p-type boron phosphide semiconductor layer, A high resistance boron phosphide layer is vapor-phase grown by doping magnesium (Mg) which is a p-type impurity. As a source for adding magnesium (Mg) to the p-type boron phosphide layer, bis-cyclopentadienyl magnesium (bis- (C _Five H _Five ) ₂ Mg) can be exemplified. Bis- (C to boron phosphide layer _Five H _Five ) ₂ In doping using Mg, the concentration of Mg atoms in the boron phosphide layer increases substantially linearly as shown in FIG. 1 in accordance with the supply amount of the magnesium (Mg) source. In order to form a high-resistance boron phosphide layer, the Mg atom concentration in the boron phosphide layer is 1 × 10 ¹⁹ Atom / cm ^-3 ~ 1x10 ²⁰ Atom / cm ^-3 Thus, it is preferable to dope Mg. 10 ¹⁸ Atom cm ^-3 In the case of doping with magnesium (Mg) at a low concentration of about /, even if Mg acts as an acceptor, only a p-type boron phosphide layer that is not sufficiently high in resistance is left. The atomic concentration of Mg in the boron phosphide layer can be quantified by general secondary ion mass spectrometry (SIMS), Auger spectroscopy, or the like.
[0012]
Of the Group II elements that are p-type impurities for III-V compound semiconductors, magnesium (Mg) is most effective in providing a high resistance boron phosphide layer. Magnesium (Mg) is boron and chemical formula: MgB ₂ Or chemical formula: MgB ₆ This is because a volatile magnesium boride compound represented by the above formula is easily formed ("Data Book Handbook of High-melting-point Compounds" (December 20, 1977, published by So-Soshinsha), page 122 reference). For this reason, by adding magnesium (Mg) simultaneously with the vapor phase growth of the boron phosphide layer, Mg combines with boron constituting the boron phosphide layer and volatilizes together with boron. As a result, a large amount of boron Voids can be created in the boron phosphide layer. Then, a large amount of donors are generated due to the phosphorus atoms occupying the generated boron vacancies, and these donors include an acceptor present in the boron phosphide layer in an undoped state and an acceptor generated due to the addition of Mg. Electrically compensates to contribute to a high resistance boron phosphide layer. According to the means for doping magnesium (Mg) according to the present invention, the specific resistance (= resistivity) at room temperature is 1 × 10 ^Four A high-resistance boron phosphide layer having a resistance of Ω · cm or more can be vapor-phase grown.
[0013]
As another method for manufacturing a boron phosphide layer on a crystal substrate, a p-type boron phosphide layer for forming a high resistance layer is formed by placing an amorphous layer containing boron and phosphorus formed on a crystal substrate. The base layer can be formed by bonding to the amorphous layer. The amorphous layer eliminates the lattice mismatch between the crystal substrate and the p-type boron phosphide layer, and has a good crystalline p-type boron phosphide with less crystal defect density such as misfit dislocations. Has the effect of providing a layer. Further, boron and phosphorus constituting the amorphous layer are “growth nuclei” when vapor-phase-growing the p-type boron phosphide layer (Akira Nishinaga, “Basics of Crystal Growth” (Baifukan Co., Ltd., 1997) June 23, first edition), see Chapter 2), and can contribute to providing a continuous p-type boron phosphide layer without gaps. In particular, an amorphous layer containing boron in a stoichiometrically richer amount compared to phosphorus is particularly suitable for vapor-phase growth of a p-type boron phosphide layer. The amorphous layer rich in boron contains a large amount of phosphorus vacancies that can act as an acceptor because it has a chemical equivalent of phosphorus. For this reason, the amorphous layer rich in boron can sufficiently exhibit the effect of relaxing the lattice mismatch with the crystal substrate, and continuously brings an excess of phosphorus vacancies to the upper boron phosphide layer, This is effective in reliably providing a p-type boron phosphide layer in an undoped state. The amorphous layer containing excessive boron can be formed particularly stably at a temperature of 750 ° C. to 1200 ° C. The thickness of the amorphous layer is preferably 2 nm or more and 50 nm or less. The concentration of phosphorus vacancies in excess compared to boron vacancies involved in donor generation is measured, for example, as the p-type carrier (hole) concentration in Hall effect measurement. The amorphous layer containing boron and phosphorus includes boron phosphide, boron phosphide / gallium (B _X Ga _1-X P: 0 <X <1), boron phosphide / aluminum / indium (B _X Al _Y In _1-XY P: 0 <X <1, 0 ≦ Y <1, 0 <X + Y ≦ 1).
[0014]
If the high resistance boron phosphide layer is formed by the same vapor phase growth means following the vapor phase growth of the amorphous layer on the crystal substrate, it is convenient to obtain the high resistance boron phosphide layer. . For example, triethyl boron ((C ₂ H _Five ) _Three B) as a boron source and phosphine (PH _Three The amorphous layer and the boron phosphide layer are continuously vapor-phase grown by the atmospheric pressure (substantially atmospheric pressure) or the low pressure MOCVD method using a phosphorous source. In particular, after the amorphous layer containing boron and phosphorus is vapor-grown by the MOCVD method, the amorphous layer containing the amorphous layer is subsequently vapor-grown using the same MOCVD vapor-phase growth apparatus. A technique for vapor phase growth of the boron phosphide layer is convenient. If the high-resistance boron phosphide layer is formed at a temperature of 750 ° C. or higher and lower than the temperature at which the amorphous underlayer is vapor-phase grown, the single-crystal boron phosphide layer is vapor-grown. Will be convenient. When the temperature is lower than 750 ° C., a polycrystalline boron phosphide layer tends to be easily obtained. Further, according to the method of vapor-depositing the high-resistance boron phosphide layer below the temperature at which the amorphous layer is vapor-grown, the amorphous layer can be prevented from being damaged due to thermal damage, Therefore, there is an advantage that a high-resistance boron phosphide layer having excellent crystallinity can be vapor-phase grown.
[0015]
The high resistance boron phosphide layer of the present invention can be used to construct various semiconductor devices. For example, a high-resistance boron phosphide layer provided on an insulating crystal substrate can be used as a high-resistance buffer layer for suppressing leakage of drain current when configuring a MESFET. Further, when configuring a field effect transistor (TEGFET) using a two-dimensional electron gas, it can be used as a gate electrode forming layer for forming a Schottky gate electrode in addition to a buffer layer. Since the high resistance boron phosphide layer according to the present invention uses magnesium (Mg) which forms a relatively shallow level, the conventional III-V group in which a high resistance is obtained by adding deep impurities. Unlike a compound semiconductor layer, it is possible to provide a high resistance layer that is superior in suppressing a change with time (drift) of a drain current or the like.
[0016]
Further, the high resistance boron phosphide layer of the present invention can be utilized as a high resistance layer forming a current confinement layer of an LD in a light emitting device. In the LED, it can be suitably used as a current blocking layer for preventing short circuiting of the element operating current to the light emitting portion and diffusing the current over substantially the entire surface of the light emitting portion. For example, a gallium nitride (GaN) layer that forms the upper cladding layer is vapor-phase grown while doping magnesium (Mg), and then a high-resistance boron phosphide layer is formed while doping Mg. Next, processing is performed so that the high resistance boron phosphide layer remains only in the region where the ohmic electrode is to be disposed. Next, the exposed surface of the upper cladding layer and the surface of the remaining high resistance boron phosphide layer are covered with a highly conductive transparent conductive film such as an indium / tin composite oxide (ITO) film. Next, an ohmic electrode is provided in contact with the transparent conductive film above the remaining high-resistance boron phosphide layer. With such a configuration, the operating current supplied from the electrode is prevented from flowing in the vertical direction to the light emitting portion below by the high resistance boron phosphide layer, and preferentially flows in the horizontal direction through the transparent conductive film. Is done. For this reason, an operating current can be diffused over a wide range of the light emitting section, and an LED with high emission intensity can be provided.
[0017]
The boron phosphide layer doped with magnesium (Mg) according to the present invention has a high resistance when, for example, forming a stripe structure type LD (written by Ryoichi Ito and Michiharu Nakamura, “Semiconductor Laser”). (See Baifukan Co., Ltd., first edition 6th edition, published on October 30, 1997), pages 118 to 121), and can be used effectively as a current constriction layer. For example, an LD including a high-resistance boron phosphide layer doped with magnesium as a current confinement layer is formed by the following procedure. First, the boron phosphide layer is vapor-phase grown while doping magnesium on the surface of the upper cladding layer on the light emitting layer made of single or multiple quantum wells (QW) or the like. The vapor-grown high-resistance boron phosphide layer is removed in the form of a band only in a region where an electrode in ohmic contact with the upper cladding layer is to be formed. In general, the area to be removed in a band shape has a width of 3 × 10. ^-Four cm-3 × 10 ^-3 This is a striped region having a length substantially equal to the resonator length. Next, an LD is formed by covering the surface of the high resistance boron phosphide layer including the region opened in a stripe shape with an ohmic electrode. The element operating current for driving the LD supplied from the ohmic electrode is confined in the region where the high resistance boron phosphide layer allows the current to flow and is concentrated only in the region opened in a stripe shape. A current having a density is injected into the light emitting layer through the upper cladding layer. In particular, in the present invention, the lattice spacing substantially equal to the a-axis lattice constant (≈0.319 nm) of gallium nitride (GaN) (the spacing of {110} crystal planes of boron phosphide is approximately equal to approximately 0.321 nm). The current confinement layer is made up of the boron phosphide layer having (.), So that the current confinement layer with few crystal defects such as misfit dislocations can be formed on the upper clad layer made of aluminum nitride and gallium. In addition, it is possible to provide an LD with little breakdown voltage failure involving dislocations in the layer.
[0018]
[Action]
In the means for vapor-phase-growing a high-resistance boron phosphide layer while adding magnesium (Mg) according to the present invention, Mg added to the boron phosphide layer is contained in the undoped p-type boron phosphide layer. It has the effect of generating boron vacancies that can electrically compensate for acceptors involving phosphorus vacancies.
[0019]
【Example】
(First embodiment)
The contents of the present invention will be specifically described by taking as an example a case where a laminated structure for gallium nitride (GaN) -based MESFET is formed using a high-resistance boron phosphide layer doped with magnesium (Mg) as a buffer layer. explain.
[0020]
FIG. 2 schematically shows a cross-sectional structure of a laminated structure 1A that can be used to configure a GaN-based MESFET. The crystal substrate 101 was an undoped silicon (Si) single crystal having a high resistance {111} plane with a resistivity of 10 Ω · cm or more. On the surface of the substrate 101, triethylboron ((C ₂ H _Five ) _Three B) / phosphine (PH _Three ) / Hydrogen (H ₂ ) An amorphous layer 102 containing boron and phosphorus was formed at 1025 ° C. using a reaction system normal pressure (substantially atmospheric pressure) MOCVD growth means. V / III ratio (= PH at the time of vapor phase growth of the amorphous layer 102 _Three / (C ₂ H _Five ) _Three B supply concentration ratio) was 16. The layer thickness of the amorphous layer 102 was about 10 nm. The supply of triethylboron as a boron source to the vapor phase growth region was once stopped, and the vapor phase growth of the amorphous layer 102 was completed.
[0021]
Meanwhile, while continuing to supply the phosphorus source to the vapor phase growth region, phosphine (PH _Three ) And hydrogen (H ₂ The temperature of the Si single crystal substrate 101 was lowered from 1025 ° C. to 850 ° C. After that, the boron source was supplied again to the vapor phase growth region, and the vapor phase growth of the high resistance boron phosphide layer 103 serving as a buffer layer was started by bonding to the amorphous layer 102. During vapor phase growth of the boron phosphide layer 103, it is about 2.0 × 10 × in the undoped state. ¹⁹ cm ^-3 The V / III ratio was set to 1296 so as to obtain a p-type conductive layer having a carrier (hole) concentration of 1. In order to obtain a high resistance layer under the vapor phase growth condition, magnesium (Mg) was doped. Mg doping sources include biscyclopentadienyl magnesium (bis- (C _Five H _Five ) ₂ Mg) was used. Due to the generation of volatile compounds with boron, the concentration of Mg atoms in the boron phosphide layer is about 1 × 10 6 in order to generate a high concentration of donors involving boron vacancies. ²⁰ Atom / cm ^Three Then, magnesium was added. Thus, the resistivity at room temperature is about 2 × 10 ^Four A high resistance boron phosphide layer 103 of Ω · cm was obtained. The thickness of the high resistance boron phosphide layer 103 was about 100 nm. The supply of the boron source, phosphorus source, and magnesium source to the vapor phase growth region was stopped, and the vapor phase growth of the high resistance boron phosphide layer was completed. Hydrogen gas was continuously distributed to the vapor phase growth region.
[0022]
Next, while maintaining the temperature of the Si single crystal substrate 101 at 850 ° C., the amorphous layer 102 and the high resistance boron phosphide layer 103 are undoped in the same MOCVD vapor phase growth apparatus as in the vapor phase growth. An n-type gallium nitride (GaN) layer 104 was vapor-phase grown. The gallium nitride layer 104 includes trimethyl gallium ((CH _Three ) _Three Ga) / Ammonia (NH _Three ) / H ₂ Vapor phase growth was performed by a reaction system atmospheric pressure MOCVD method. The lattice spacing (≈0.321 nm) of the {110} -crystal plane of boron phosphide intersecting the {111} -crystal plane forming the surface of the high-resistance boron phosphide layer 103 and the wurtzite crystal type (Wurtzite) Since the a-axis lattice constant (≈0.319 nm) of GaN substantially matched, the gallium nitride layer 104 became a crystal layer composed of {0001} -crystal planes. Considering the use of the MESFET as an active layer, the V / III ratio is about 1.2 × 10 6 in order to obtain an n-type gallium nitride layer 104 having a low carrier (electron) concentration. ^Four Set to. The carrier concentration of the undoped n-type gallium nitride layer 104 is about 2 × 10 ¹⁶ cm ^-3 The layer thickness was about 50 nm. Also, due to the good lattice spacing matching with the high resistance boron phosphide layer 103 doped with magnesium (Mg) in the buffer layer, the electron mobility at room temperature of the gallium nitride layer 104 is about 660 cm. ² / V · s.
[0023]
The supply of trimethylgallium to the vapor phase growth region was stopped, and the vapor phase growth of the gallium nitride layer 104 was completed. Thereafter, a high resistance boron phosphide layer 105 doped with magnesium (Mg) was formed again at 850 ° C. using the same MOCVD vapor phase growth apparatus. The vapor growth conditions for the high resistance boron phosphide layer 105 were the same as those for the high resistance boron phosphide layer 103 used as the buffer layer. In order to obtain approximately the same resistivity as the high resistance boron phosphide layer 103, the atomic concentration of magnesium (Mg) in the layer is about 1 × 10 × 10. ²⁰ Atom / cm ^Three It was. However, the layer thickness was 50 nm. Thereafter, the supply of the boron source to the vapor phase growth region was stopped, and the vapor phase growth of the high resistance boron phosphide layer 105 was completed. The phosphine continued to flow until the temperature of the Si single crystal substrate 101 dropped to about 600 ° C., and the volatilization of phosphorus from the surface of the high resistance boron phosphide layer 105 was suppressed. The supply of phosphine was stopped at about 600 ° C., and the mixture was naturally cooled to a temperature near room temperature in an atmosphere of hydrogen gas. Thus, the high resistance boron phosphide layer 103 doped with magnesium is used as a buffer layer, the n-type gallium nitride layer 104 is used as an active layer, and the high resistance boron phosphide layer 105 is used as a gate of a Schottky junction field effect transistor. A laminated structure 1A used as an electrode forming layer was formed.
[0024]
The boron phosphide layer 103 that forms a high-resistance buffer layer has no gap because the amorphous layer 102 containing boron and phosphorus is used as a base layer and is vapor-phase grown at a lower temperature than the amorphous layer 102. It became a continuous layer with a flat surface. Reflecting the continuity and surface flatness of the boron phosphide layer 103, the gallium nitride layer 104 has a void ("Lattice Mismatched Thin Films" (The Minerals, Metals & Materials Society, 1999) (ISBN No. 0-). 87339-444-5) and 177 to 182)). Further, since the vapor phase growth is performed through the gallium nitride layer 104 having a good surface state, the smoothness of the surface of the boron phosphide layer 105 is rms (root mean square); the square value of the height difference from the virtual horizontal plane. The average value (square root value) was as good as about 0.5 nm.
[0025]
(Second embodiment)
In the second embodiment, the contents of the present invention will be specifically described by taking as an example a case where a MESFET is formed from a laminated structure having a high resistance boron phosphide layer as a buffer layer.
[0026]
FIG. 3 schematically shows a cross-sectional structure of the MESFET described in the second embodiment. The same components as those already shown in FIG. 2 are denoted by the same reference numerals in FIG.
[0027]
After the laminated structure 1A produced in the first embodiment is taken out from the MOCVD vapor phase growth apparatus, the high-resistance boron phosphide layer 105 forming the surface is processed by using a general photolithography technique, and a gate ( gate) The electrode 107 was left only in the region where it was to be formed. Next, the laminated structure 1A subjected to this processing is again placed in the MOCVD vapor deposition apparatus, and an undoped n-type boron phosphide layer 106 is deposited as an ohmic contact layer for forming an ohmic electrode. did. The n-type boron phosphide layer 106 has the above-mentioned (C ₂ H _Five ) _Three B / PH _Three / H ₂ Vapor phase growth was performed at 850 ° C. using the reaction system MOCVD method. The carrier (electron) concentration of the n-type boron phosphide layer 106 is about 1 × 10 ¹⁹ cm ^-3 The layer thickness was about 150 nm. After the supply of the boron source to the vapor phase growth region is stopped and the growth of the n-type boron phosphide layer 106 is completed, it is cooled to room temperature in the same manner as in the case of the high resistance boron phosphide layer 105, A laminated structure 1B for MESFET10 was formed.
[0028]
After cooling, the n-type boron phosphide layer 106 that covers the remaining high resistance boron phosphide layer 105 is applied to the laminated structure 1B taken out from the MOCVD vapor phase growth apparatus by using a general photolithography technique. The recess 108 was formed by exposing the surface of the boron phosphide layer 105 having a high resistance. The height difference (step) between the high resistance boron phosphide layer 105 doped with magnesium (Mg) for forming the gate electrode on the bottom surface of the recess portion 108 and the n-type boron phosphide layer 106 was about 150 nm. The width of the recess 108 is about 1 × 10. ^-3 cm.
[0029]
A common Schottky contact gate electrode 107 is lifted off from the center of the surface of the high resistance boron phosphide layer 105 on the bottom surface of the recess portion 108 and slightly closer to the source electrode 109 by a general patterning technique and lift-off. Formed by technique. The gate electrode 107 has a three-layer structure of Ti / platinum (Pt) / gold (Au) in which titanium (Ti) is in contact with the surface of the high resistance boron phosphide layer 105. The gate length is about 1.5 × 10 ^-Four cm. Further, on the surface of the n-type boron phosphide layer 106 left facing each other in the region excluding the recess portion 108, a gold / germanium (Au · Ge) alloy film is formed on the side in contact with the n-type boron phosphide layer 106. An ohmic contact source electrode 109 and a drain electrode 110 each having a three-layered structure of Au.Ge/nickel (Ni) / Au in which are arranged. In this way, a MESFET was constructed. The horizontal distance between the source electrode 109 and the drain electrode 110 is approximately 1 × 10 10 that is substantially equal to the lateral width of the recess 108. ^-3 cm.
[0030]
In the MESFET manufactured in the second embodiment as described above, the active layer composed of the n-type gallium nitride layer 104 is provided on the boron phosphide layer 103 doped with magnesium (Mg) to have a high resistance. Therefore, leakage of drain current to the buffer layer was suppressed. For this reason, the saturation source-drain current (so-called I _dss No significant increase is observed, and the gate pinch-off voltage is about 12.4 volts (V) (however, the source-drain current (so-called I _ds ) 5 × 10 ^-6 A). Further, since the high resistance boron phosphide layer 103 added with magnesium (Mg), which is considered to form a relatively “shallow” acceptor level in a III-V compound semiconductor, is used as a buffer layer, the drain current has a relaxation time. No long-term drift was observed. Mutual conductance at room temperature obtained when the drain voltage is 5 V (so-called g _m ) Reached about 10 millisiemens (mS) / mm per unit gate length (mm). In the vicinity of the gate pinch-off voltage due to an increase in the gate voltage (so-called Vg), g _m A high-performance MESFET capable of maintaining a high value of 8 mS / mm was provided.
[0031]
【The invention's effect】
According to the present invention, in a method for producing a high resistance boron phosphide layer, in which a high resistance boron phosphide layer is directly formed on a crystal substrate by vapor phase growth means, the temperature of the crystal substrate is 1200 ° C. at 1200 ° C. or more. Magnesium that is kept at a temperature of ℃ or lower and vapor-deposits a boron phosphide layer exhibiting p-type conductivity in an undoped state without intentionally adding impurities, and at the same time forms a "shallow" impurity level (Mg) is added to form a high-resistance boron phosphide layer. For example, if it is used as a buffer layer, there is little leakage of drain current, excellent pinch-off characteristics, and high mutual conductance. It is effective to construct a MESFET having
[0032]
Further, a high-resistance boron phosphide layer doped with magnesium (Mg) is formed on a crystal substrate at a temperature of 750 ° C. or more and 1200 ° C. or less, and contains boron and phosphorus, and the layer thickness is 2 nm or more and 50 nm or less. Since it is formed by bonding to an amorphous underlayer, a continuous high resistance boron phosphide layer without a gap can be formed.
[Brief description of the drawings]
FIG. 1 is a graph showing the relationship between the supply amount of a magnesium (Mg) source and the Mg atom concentration in a boron phosphide layer.
FIG. 2 is a schematic cross-sectional view of the multilayer structure according to the first embodiment of the present invention.
FIG. 3 is a schematic cross-sectional view of a MESFET according to a second embodiment of the present invention.
[Explanation of symbols]
1A Laminated structure
1B Multilayer structure for MESFET applications
101 Silicon single crystal substrate
102 Amorphous layer
103 High resistance boron phosphide layer (buffer layer)
104 Gallium nitride layer (active layer)
105 High resistance boron phosphide layer (gate electrode formation layer)
106 n-type boron phosphide layer (ohmic contact layer)
107 Gate electrode
108 Recess Department
109 Source electrode
110 Drain electrode

Claims (10)

In a method for producing a boron phosphide layer in which a boron phosphide (BP) layer is directly formed on a crystal substrate by vapor phase growth means, the temperature of the crystal substrate is maintained in a range of 1000 ° C. or more and 1200 ° C. or less, phosphorus Ka硼element exhibiting p-type conductivity in the state of (undope), boron phosphide layer and forming by the addition to vapor deposition boron phosphide layer having a high resistance to magnesium (Mg) Manufacturing method. In a method of manufacturing a boron phosphide layer formed by bonding a boron phosphide layer to an amorphous underlayer containing boron and phosphorus formed on a crystal substrate by vapor phase growth means, the temperature of the crystal substrate is changed. the amorphous underlayer including a 750 ° C. or higher and the boron and phosphorus is kept below a temperature which is vapor phase growth, the phosphorus Ka硼element exhibiting p-type conductivity in undoped state, magnesium (Mg) A method of manufacturing a boron phosphide layer, characterized by adding a high resistance boron phosphide layer by vapor phase growth . An amorphous underlayer comprising boron (B) and phosphorus (P) grown directly on a crystal substrate at a temperature of 750 ° C. or higher and 1200 ° C. or lower, and having a layer thickness of 2 nanometers (nm) or more The method for producing a boron phosphide layer according to claim 2, wherein the layer is 50 nm or less. 4. The method for producing a boron phosphide layer according to claim 2, wherein the high resistance boron phosphide layer and the amorphous underlayer are formed by the same vapor phase growth means. A boron phosphide-based semiconductor element comprising a high-resistance boron phosphide layer formed by the method according to claim 1. 6. The boron phosphide-based semiconductor according to claim 5, wherein the boron phosphide-based semiconductor element is a field effect transistor (FET) in which an active layer is provided above a high-resistance boron phosphide layer. element. The boron phosphide-based semiconductor element is a Schottky junction field effect transistor having a Schottky junction metal gate electrode bonded to a high resistance boron phosphide layer. Item 7. A boron phosphide-based semiconductor device according to Item 5 or 6. The boron phosphide-based semiconductor element is a light-emitting element in which an ohmic electrode made of an ohmic metal material is provided above a high-resistance boron phosphide layer. Boron phosphide-based semiconductor element. A boron phosphide-based semiconductor element is a laser diode comprising a high resistance boron phosphide layer as a current confinement layer for constricting a flow path of element operating current supplied from an ohmic contact electrode to a light emitting layer. The boron phosphide-based semiconductor device according to claim 8, wherein the boron phosphide-based semiconductor device is present. The boron phosphide-based semiconductor element is a light-emitting diode provided with a high-resistance boron phosphide layer as a current blocking layer for blocking forward current from flowing to the projected region of the ohmic contact electrode. The boron phosphide-based semiconductor device according to claim 8.

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