JP2000031164A - Iii compound nitride semiconductor element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enhance pinch-off characteristics by forming a buffer layer on a single crystal substrate and then forming an active layer of aluminum nitride/ gallium/indium crystal layer through the buffer layer. SOLUTION: A buffer layer 110 containing boron and phosphorus as constitutional elements is deposited on an insulating single crystal substrate 101 of calcium fluoride. A boron nitride phosphide mixed crystal layer 114 is formed on the buffer layer 110 by ordinary atmospheric pressure MOCVD employing trimethyl gallium as a gallium source, ammonia as a nitrogen source and phosphine as a phosphorus source. A crystal layer 115 of aluminum nitride/ gallium/indium crystal layer represented by a general formula AlαGaβIn1-α-βN1-γMγ (0<=α, β<=1, 0<=α+β<=1, M represents a group V element other than nitrogen, 0<=γ<1) is formed on the mixed crystal layer 114.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a group III nitride semiconductor device having an active layer composed of a cubic group III nitride semiconductor crystal formed on an insulating single crystal substrate having a cubic crystal structure. Get involved. The present invention can be suitably used particularly for forming a field effect transistor (FET) including an active layer made of a group III nitride semiconductor crystal.

[0002]

2. Description of the Related Art The general formula AlαGaβIn1 _- α _- βN1 _- γ
Mγ (0 ≦ α, β ≦ 1, 0 ≦ α + β ≦ 1, symbol M represents a Group V element other than nitrogen, and is composed of aluminum gallium indium crystal represented by 0 ≦ γ <1) II
Group I nitride semiconductors have a relatively high (large) bandgap at room temperature, and are generally referred to as wide band-gap semiconductors (for example, edited by Isamu Akasaki, " III-V Compound Semiconductor "(First Edition May 20, 1994, published by Baifukan Co., Ltd.), page 329).

A group III nitride semiconductor has a band gap suitable for emitting near-ultraviolet light or short-wavelength visible light (Yasuharu Suematsu, “Optical Device” (May 15, 1997)
The 8th printing of the first edition, published by Corona Co., Ltd.), pages 28-29), near-ultraviolet or blue light emitting diode (abbreviated as LED) or laser diode (abbreviated as L)
D) (Mat. Res. Soc. Symp. Pro)
c. Vol. 449 (1997), pp. 509-518). In addition to the light emitting element as described above, a group III nitride semiconductor has a large band-gap at room temperature.
Based on the superiority having p), it is used to construct environment-resistant electronic devices that can operate normally even at high temperatures.

As a conventional example of an electronic device using an active layer formed of a group III nitride semiconductor, for example, a field-effect transistor (Field-Effect Transistor) is known.
istor: FET). In particular,
Two-dimensional electron gas (two-dimensional electron gas)
modulation doped FET (Modulation Doped) utilizing high-speed running characteristics of electron gas.
FET: MODFET) is known (Electr
on. Lett. , 33 (14) (1997), 123.
0-1231).

[0005] Fig. 1 shows an example of a cross-sectional structure of a conventional MODFET. In FIG. 1, a substrate 101 is provided with an insulating hexagonal α-alumina (Al ₂ O).
₃ ) Single crystal (sapphire) is generally used. Sapphire is commonly used as a substrate because it maintains thermal durability against a relatively high temperature such as a film forming temperature of a group III nitride semiconductor crystal layer. Sapphire substrate 101
On top, a lattice mismatch (mis-match) between the substrate 101 and the group III nitride semiconductor forming the active layer 103
The buffer layer 102 is laid for the purpose of alleviating the pressure. The buffer layer 102 is usually formed at a relatively low temperature of about 400 ° C. to about 600 ° C., and is called a low-temperature buffer layer (edited by Isamu Akasaki, “III-V Group Compound Semiconductor” (May 20, 1994)
First edition, published by Baifukan Co., Ltd.), page 335). The low-temperature buffer layer 102 is made of aluminum gallium nitride (Al _A Ga _B N, where 0 ≦ A, B ≦ 1, A + B =
In general, it is composed of the following (1)
No. 29476 and Japanese Patent Application Laid-Open No. 4-297523).

On the low-temperature buffer layer 102, an active layer 1 also called a channel layer in the case of an FET.
03 are stacked. The active layer 103 is composed of an n-type or p-type conductive semiconductor crystal layer. Especially electronic (el
electron as a major charge carrier (majority).
In the case of an FET of a carrier type, the active layer 103 is generally made of an n-type group III nitride semiconductor crystal such as n-type gallium nitride (GaN). Active layer 10
On n, an n-type conductive layer generally called an electron supply layer 104 is laminated. In order to realize a band structure in which two-dimensional electrons can be accumulated in a very thin region near the junction interface with the electron supply layer 104 in the active layer 103, the electron supply layer 104 is more forbidden than the active layer 103. III
It is composed of a group III nitride semiconductor. The electron supply layer 104
For example, modulation doping of an n-type impurity (see above “III-V
Group semiconductors ", pp. 108-110)
Aluminum gallium mixed crystal (Al _A Ga _B
N, where 0 ≦ A, B ≦ 1, A + B = 1).

Between the active layer 103 and the electron supply layer 104, a spacer (spacer) layer 105 is provided.
It is customary to insert a high-purity crystal layer made of a material having a larger band gap than the material forming the active layer 103 (Electron. Lett., 33 (1)
6) (1997), pp. 1413-1415). Normally, the spacer layer 105 is made of an undoped n-type aluminum-gallium nitride mixed crystal (Al _A Ga _B N, where 0 ≦ A, B ≦ 1, A + B) where no impurity is intentionally added.
= 1). On the electron supply layer 104, a source electrode 107, which is an ohmic electrode having a low contact resistance, and a drain electrode
n) A contact layer 1 made of a low-resistance n-type group III nitride semiconductor for forming the electrode 108
06 are stacked. The contact layer 106 is generally made of an n-type group III nitride semiconductor having a smaller band gap than the electron supply layer 104. There is an example in which the contact layer 106 is made of n-type gallium nitride (GaN) (Pro
c. of the 2nd. Int. Nat. Con
f. Nitride Semiconductors
(Oct. 27-31, 1997, The Japan
Soc. Appl. Phys. ), Pp. 480-481). Further, the gate electrode 109 is formed by removing the contact layer 106 between the source electrode 107 and the drain electrode 108 to form a recess 116 and laying the recess on the surface of the electron supply layer 104 in the recess. To form an FET.

A conventional group III nitride semiconductor device is manufactured using a laminated structure having the above-described structure as a base material. First, sapphire commonly used as a substrate is a single crystal belonging to a hexagonal system. Also, the crystal layers which are suitable as a low-temperature buffer layer, the hexagonal wurtzite (wurzite) crystal structure type aluminum gallium nitride crystallites are mixed in (Al _A Ga _B N, where 0 ≦ A, B ≦ 1, A + B = 1 )
It is considered to be an amorphous (amorphous) crystal layer composed of (see Japanese Patent Application Laid-Open No. 2-229476). Therefore, each of the constituent layers of the laminated structure including the active layer and the like deposited on the hexagonal crystal as a base layer and above is a hexagonal crystal. The feature of the conventional laminated structure viewed from the crystal system is that each constituent layer is composed of a wurtzite-type hexagonal crystal layer.

[0009]

SUMMARY OF THE INVENTION Schottky
ttky) junction type FET (MESFET), especially low-noise MESFET and MODFET
It is known that major characteristics such as a noise-figure or high-speed response greatly depend on electron traveling characteristics generally expressed using the electron mobility of the active layer.

Each of the constituent layers constituting the conventional laminated structure for use in a group III nitride semiconductor device is a wurtzite-type hexagonal crystal as described above. Many wurtzite group III nitride semiconductor crystals exhibit a piezoelectric (piezo) effect (see the above-mentioned publication Electron. Lett., Vol.
33 (1997)). Therefore, for example, when a group III nitride semiconductor crystal layer is hetero-junction-bonded, unnecessary capacitance due to the piezo effect occurs in a region near the junction interface. Due to the occurrence of the parasitic capacitance, the high-speed response of the FET is reduced.

The degree to which the piezo effect is exhibited is weaker in a cubic group III nitride semiconductor crystal than in a hexagonal group III nitride semiconductor crystal. Therefore, from a stacked structure constructed from a cubic group III nitride semiconductor crystal layer, a high-speed responsive FET such as an FET can be used.
A group I nitride semiconductor device can be provided. In order to construct a laminated structure from a cubic group III nitride semiconductor crystal layer, it is first important to use a cubic single crystal as a substrate. Recently, a technique for forming a group III nitride semiconductor light-emitting device (LED) using a cubic diamond conductive silicon single crystal substrate (silicon) as a substrate has been disclosed (El).
electron. Lett. Vol. 33, no. 23
(1997), 1986-1987). But,
Unlike light emitting elements such as LEDs, the configuration of FETs
In order to ensure electrical insulation from the active layer, it is necessary to use an insulating cubic single crystal as a substrate.

The cubic single-crystalline material having insulating properties includes magnesium oxide (chemical formula: MgO). These cubic substrate materials and the group III nitride semiconductor crystal usually have a lattice mismatch (MgO). mis-match)
Exists. For example, the lattice constant of calcium fluoride (chemical formula: CaF ₂ ), which is a cubic insulating single crystal, is 5.436 °, which is close to that of silicon (5.431 °) (“Iwanami Physical and Chemical Dictionary 3rd Edition” (1976 April 5, Co., Ltd.
Iwanami Shoten), page 1151). Accordingly, the degree of mismatch with cubic GaN having a lattice constant of about 4.51 ° reaches about 21% based on GaN. For this reason, even when a cubic single crystal is used as the substrate,
It is advisable to provide a buffer layer for alleviating lattice mismatch with the group I nitride semiconductor crystal layer. According to the latest technology (see Appl. Phys. Lett., 7
2 (4) (1998), pp. 415-417), a method of arranging a buffer layer made of hexagonal AlN on a silicon substrate and constructing a laminated structure for a light emitting element is disclosed. However, hexagonal aluminum nitride (Al
A hexagonal group III nitride semiconductor crystal layer is grown on the buffer layer made of N). That is, if cubic silicon is used as the substrate and the buffer layer deposited on the surface is hexagonal, the upper layer constituting the laminated structure also becomes hexagonal. Therefore, in order to construct a laminated structure composed of cubic crystal layers, it is necessary to deposit a cubic buffer layer on a cubic substrate.

In another disclosed example of a group III nitride semiconductor light emitting device using silicon (Si) as a substrate, Al _X Ga _Y In
_z B _1-XYZ P (0 ≦ X, Y, Z <1, X + Y + Z =
1) An example is described in which a crystal layer, particularly a zinc-blende crystal-type boron phosphide (BP) layer, which is a cubic crystal, is used as a buffer layer for a silicon substrate (see Japanese Patent Application Laid-Open No. 2-275682). . However, the lattice constant of BP is 4.5.
38%, whereas that of Si is significantly different at 5.431% (Iwao Teramoto, "Introduction to Semiconductor Devices" (1
First edition, March 30, 995, published by Baifukan Co., Ltd., p. 28). Therefore, even if it is intended to form a continuous BP crystal layer on the surface of the Si substrate, either as a buffer layer or as another functional layer, the grown layer is BP (boron).
monophosphide or B ₁₃ P ₂ scattered pyramidal growth islands (Naoya Shibusawa, Kazutaka Terashima, Proceedings of the 28th National Conference on Crystal Growth (“Journal of Japan Society for Crystal Growth”, Vol. 24, No. 2
(1997)), p. 150). It is extremely rare that a crystal layer having continuity can be laminated on such a buffer layer having no continuity.

BP series III-V compound semiconductor crystal (Al
_{X Ga Y In z B 1-} XYZ P, where 0 ≦ X, Y, Z <
1, X + Y + Z = 1) is a zinc-blende cubic crystal (Yasuharu Suematsu, “Optical Device” (May 15, 1997, First Edition, 8th edition, published by Corona Co., Ltd.), 28-29 Page). Thus, the BP-based crystal layer has a cubic II
It is thought that it works predominantly in laminating a group I nitride semiconductor crystal layer. Furthermore, a sphalerite-type BP (lattice constant = 4.
538 °) is cubic GaN (lattice constant = 4.510)
There is an original advantage that it has a lattice constant substantially matching に) (see “III-V Group Compound Semiconductor”, p. 330, supra). However, in the conventional film forming technique, a BP-based crystal layer mainly composed of zinc blende type, which is sufficient to promote the growth of a cubic group III nitride semiconductor crystal layer, is steadily used as a buffer layer as a cubic single crystal. It was difficult to grow on the substrate. This is because the requirements for growing a buffer layer made of a BP-based crystal that induces the growth of a group III nitride semiconductor crystal layer mainly composed of a cubic crystal were unclear. A film formation technique for providing a continuous BP-based crystal layer on a cubic crystal substrate has not been proposed so far, and is required for forming a continuous BP-based crystal layer. The requirements are not clear.

To summarize the above-mentioned contents as problems to be solved by the present invention, the first problem of the present invention is that
An object of the present invention is to select and present an insulating cubic single crystal substrate material suitable for constructing a group III nitride semiconductor device. The second problem is that the cubic insulating single-crystal substrate is
An object of the present invention is to provide a constituent element of a buffer layer that is convenient for constructing a laminated structure including a cubic group III nitride semiconductor crystal layer. In addition, the present invention provides the requirement for better mitigating lattice mismatch with the cubic insulating substrate that the buffer layer should have, and provides continuity for the stack constituent layers deposited on the buffer layer surface. Requirements from the viewpoint of the crystal structure. A final object of the present invention is to provide a group III nitride semiconductor device having an active layer made of a cubic group III nitride semiconductor by solving these problems.

[0016]

DISCLOSURE OF THE INVENTION The present invention has been made to overcome the above-mentioned problems, and in order to solve the first problem, in the present invention, calcium fluoride (CaF ₂ ) is converted into an insulating cubic. It is presented as being suitable as a crystalline substrate material. Further, the group III nitride semiconductor device of the present invention is made of a boron phosphide (BP) -based material which is required to constantly provide a continuous film made of a cubic group III nitride semiconductor crystal having a smooth surface. Provided with a buffer layer.

That is, the invention according to claim 1 of the present application provides a single crystal substrate made of insulating calcium fluoride (chemical formula: CaF ₂ ) and at least boron (element symbol: A buffer (buffer) layer containing B) and phosphorus (element symbol: P) as constituent elements; and a general formula AlαGa formed on the single crystal substrate via the buffer layer.
βIn ₁ -α _- βN ₁ -γMγ (0 ≦ α, β ≦ 1, 0 ≦ α +
β ≦ 1, the symbol M represents a Group V element other than nitrogen, and 0 ≦ γ
A group III nitride semiconductor device comprising: an active layer composed of an aluminum nitride-gallium-indium crystal layer represented by <1).

The invention according to claim 2 of the present application should be provided with a buffer layer in order to constantly grow a cubic and continuous group III nitride semiconductor crystal layer on the buffer layer. It presents requirements. That is, according to the invention described in claim 2 of the present application, the buffer layer described in claim 1 is characterized in that the buffer layer according to claim 1 is a boron phosphide polymer crystal (B _X P _Y ) comprising boron (B) atoms and phosphorus (P) atoms. It is characterized by being composed of a BP-based III-V compound semiconductor crystal in which the content of X ≧ 6 and Y = 1 or 2) is 1/20 or less.

According to a third aspect of the present invention, in addition to the first and _second aspects of the present invention, there is provided a buffer layer made of a BP-based crystal having a better lattice match with CaF ₂ constituting the substrate. It is. That the present invention of claim 3, the buffer layer, boron indium phosphide crystal (B _a an In
_1- aP, where 0 <a <0.62). In particular, the buffer layer is preferably made of a B _0.31 In _0.69 P mixed crystal in which the average of the boron composition ratio (= a) is a = 0.31.

According to a fourth aspect of the present invention, there is provided the buffer layer according to any one of the first to third aspects, wherein a layer made of a single crystal is disposed in a region near an interface with the single crystal substrate, and Characterized in that a layer mainly composed of an amorphous body is arranged in the region (1).

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Cubic crystal materials include gallium phosphide (chemical formula: GaP) and gallium arsenide (GaAs).
Of zinc-blende type, such as iron and indium phosphide (InP)
There is a -V compound semiconductor. Further, there is an element (single) semiconductor such as silicon (Si) or germanium (element symbol: Ge) having a diamond structure. Further, there are rock salt structure type magnesium oxide (chemical formula: MgO), manganese oxide (chemical formula: MnO), and nickel oxide (chemical formula: NiO). Further, a spinel structure type MgAl
₂ O ₄ etc. (Int. Symp. Blue Las)
er and LightEmitting Diode
es (1996, Ohmsha, Ltd.), 80-8.
See page 5.)

The film formation of the group III nitride semiconductor crystal layer is carried out at a high temperature of about 1000 ° C. or higher (Isao Akasaki, Hiroshi Amano, “Optics”, Vol. 22, No. 11 (19)
93), p. 670). The substrate must be made of a single crystal material having heat resistance at such a high temperature. III
The melting point of GaAs, which is a group V compound semiconductor crystal, is 12
38 ° C., and that of InP at 1070 ° C. (see “III-V compound semiconductors” above, see Table 7.1 on page 148). Accordingly, these III-V compound semiconductor crystals have been industrially produced as semi-insulating single crystals having a specific resistance (resistivity) exceeding about 10 ⁶ ohm-cm (Ω · cm). However, it is difficult from the viewpoint of heat resistance. Although GaP has a relatively high melting point of 1467 ° C. (see “III-V compound semiconductors” above, Table 7.1 on page 148), it is difficult to supply an insulating single crystal substrate stably. Has not been reached. Therefore, it is difficult to select a substrate material that sufficiently satisfies both heat resistance and insulating properties from these III-V group compound semiconductor crystals.

On the other hand, silicon (Si), so-called silicon (s)
ilicon) has a melting point of 1420 ° C. (see “III-
V-group compound semiconductor ”(see Table 7.1 on page 148). However, similarly to Ge, which is another element semiconductor, even a high-purity crystal has a resistivity of about several tens to several hundreds Ω · cm, and there is a difficulty in obtaining an insulating single crystal. For a high-frequency FET operating in a microwave or millimeter-wave band, it is necessary to form a substrate from an insulating single crystal having a resistivity exceeding approximately 10 ⁶ Ω · cm.

MgO, MnO and NiO are heat-resistant oxide semiconductor materials. However, there is a disadvantage that the surface condition is deteriorated by ammonia (chemical formula: NH ₃ ) which is a typical nitrogen (element symbol: N) source when forming a group III nitride semiconductor (see Int. .Blue
Laser and Light Emitting
Diodes, page 81). Also, MnO, NiO
Alternatively, cobalt oxide (chemical formula: CoO) has a drawback in that it does not show a clear cleavage ("SiC", sponsored by the Japan Society of Applied Physics).
And related wide-gap semiconductor workshop 5th proceedings ”
(October 31-November 1, 1996), Lecture Number IV
-3, pages 20-21). Spinel
On the structural type MgAl ₂ O ₄ substrate, a polycrystalline group III nitride semiconductor (GaN) film is grown (see “SiC and Related Wide Gap Semiconductor Study Group Proceedings”, p. 21). However, the spinel type crystal does not show a clear cleavage property, and therefore, there is a problem in cutting into individual elements. As it is convenient to use the cleavage of the substrate to form the optical resonance surface in the laser diode, it is advisable to construct the substrate from a single crystal material that exhibits a clear cleavage even in the FET, as it is convenient. is there. Like MODFET, hetero (het)
ero) In a FET utilizing a low-dimensional electron gas developed with a steep junction interface, if the substrate is formed from a cleavable single crystal material, the case using a dicing means using a diamond blade (cutter) may be used. On the contrary, it is convenient that a chip can be formed by cleavage without damaging the heterojunction interface.

Calcium fluoride (CaF ₂ ) is a high melting point crystalline material having a melting point of 1373 ° C. (“Iwanami Physical and Chemical Dictionary Third Edition” (published by Iwanami Shoten Co., Ltd. on April 5, 1976). See page 1151). That is, it is a cubic crystal belonging to the fluorite crystal type that has heat resistance at the film forming temperature of the group III nitride semiconductor crystal (see the above-mentioned “Iwanami Rikagaku Dictionary No. 3”).
Edition ", p. 1278). In addition, it shows a clear cleavage in the plane direction of the octahedron (CW Ban, “Chemical Crystallography”).
(First edition, June 15, 1970, published by Baifukan Co., Ltd.), 5
See page 0). It is a large electrical insulating material with a band gap of 15.7 electron volts (eV) (supervised by Tetsuro Izumiya, "New Glass and Its Physical Properties" (First Edition, August 20, 1984, First Edition, ) Management Systems Research Institute), p. 629, edited by The Physical Society of Japan, "New Surface and Epitaxy" (December 10, 1992, first edition,
(Published by Baifukan Co., Ltd.), page 167). Therefore, CaF
The FET is on the _second surface, for example a Zener (Zene
r) Rectifying elements such as diodes can be formed while maintaining good mutual insulation. In summary, it is a crystal having the requirements to be provided as a substrate material according to the present invention. Further, C
aF ₂ is an optically transparent material. Therefore, for example, it can be used as a superior substrate in forming a composite device in which an FET and a light emitting device are combined. When the substrate is made of an optically transparent single crystal material, absorption of light emitted by the substrate can be avoided. For this reason, there is an advantage that a light emitting element having excellent efficiency of extracting light from the element to the outside can be integrated with, for example, an FET. Due to such advantages, the present invention uses C
aF ₂ is used as a suitable substrate material.

On a single crystal substrate made of CaF ₂ , BP
A buffer layer made of a system III-V compound semiconductor crystal is deposited. The BP-based III-V compound semiconductor of the present invention is a III-V compound semiconductor containing at least boron (element symbol: B) and phosphorus (element symbol: P) as constituent elements. A simple example of a BP III-V compound semiconductor is:
There is boron phosphide (BP). The buffer layer made of BP can be formed using a conventional vapor deposition technique. For example, a halide (h) using boron trichloride (chemical formula: BCl ₃ ) as a boron (B) source and phosphorus trichloride (PCl ₃ ) as a phosphorus (P) source.
Alide) A film can be formed by a vapor phase epitaxy (VPE) method.
Metalorganic pyrolysis vapor phase growth using borane (chemical formula: BH ₃ ) or diborane (chemical formula: B ₂ H ₆ ) as a boron (B) source and phosphine (chemical formula: PH ₃ ) as a phosphorus (P) source. The film can be formed by a method (MOCVD method). Also,
Hydride from a hydride of a halogen compound such as boron trichloride and phosphorus such as phosphine as raw materials
A film can be formed by a vapor growth method.

A buffer layer made of a conventional BP (Japanese Unexamined Patent Publication No.
Unlike 275682, JP-A-2-288371 and JP-A-2-288388, the BP buffer layer of the present invention has a continuous group III having a smooth and flat surface as an upper layer. A structure for contributing to the nitride semiconductor crystal layer is provided. The configuration of the buffer layer of the present invention will be described with reference to the schematic sectional view of FIG. The schematic cross-sectional view of FIG. 2 is a schematic TEM image of a cross-sectional TEM image of the BP buffer layer according to the present invention taken by a transmission electron microscope (abbreviation: TEM). The BP buffer layer 110 according to the present invention is made of CaF ₂
In a region 112 near the bonding interface 111 with the substrate 101, a Stransky Krnov
The structure is such that a layer composed of a single crystal of BP, which indicates the growth mode in the astanov mode (see the above “Thin Film Preparation Handbook”, page 59), is arranged. In a region 113 above a region 112 formed of a single crystal layer, a layer mainly composed of an amorphous body is arranged.

The BP buffer layer having the above structure is
In each of the above-described growth methods, the film can be stably obtained by setting the film forming temperature to a relatively low temperature. For example, BCl
_{In the} vapor phase growth method by the ₃ / PCl ₃ / H ₂ -based halide VPE method, the film can be formed by setting the film formation temperature to about 300 ° C. or more and about 500 ° C. or less. In the diborane / phosphine / hydrogen MOCVD growth method, the B
The P buffer layer is obtained when the film is formed at a temperature generally in the range of 250 ° C. to 600 ° C. Even in the same growth method, the appropriate film formation temperature range is slightly changed depending on the shape of the growth reaction vessel or the flow rate conditions, so the temperature range is appropriately selected according to the growth environment and conditions. Should.

The upper and lower limits of the proper range of the film forming temperature can be determined by the crystal structure inside the BP buffer layer. The upper limit temperature is a temperature at which a BP buffer layer in which the entire buffer layer is formed of a single crystal as well as a region near the interface with CaF ₂ is obtained. BP (lattice constant =
4.538 °) and cubic GaN (lattice constant = 4.510)
The degree of lattice mismatch with 度) is only 0.6%, and BP
The buffer layer made of a single crystal is considered to be superior to stacking a high-quality cubic GaN crystal layer as an upper layer. However, when there is no layer made of an amorphous material that can alleviate even a slight mismatch, linear stripes sometimes appear in a lattice pattern on the surface of the upper group III nitride semiconductor crystal layer. This is inconvenient for stably obtaining a smooth and flat group III nitride semiconductor crystal layer (a so-called cross hatch pattern). On the other hand, the lower limit temperature is a temperature at which the BP buffer layer does not partially crystallize and the entire buffer layer is formed of an amorphous material. A disadvantage when the entire buffer layer is made of an amorphous body is that when the substrate is heated to a high temperature in order to form a Group III nitride semiconductor crystal layer as an upper layer, the bonding force between constituent atoms is weakened. The buffer layer made of an amorphous material is volatilized to expose the substrate surface. That is, in this case, taking the case of forming a GaN film as an example, a CaF that increases the degree of lattice mismatch to approximately 21%
_This causes a situation in which GaN must be directly deposited on the surface of ( ₂ ). The GaN film consequent to such a situation lacks continuity. The crystal structure inside the buffer layer is X
It can be known from the appearance of diffraction peaks by the line diffraction method. Further, according to the cross-sectional TEM technique, it is possible to analyze the change of the crystal structure in the depth direction.

The BP-based buffer layer of the present invention should be referred to as a low-temperature buffer layer in view of the film formation temperature (see the above-mentioned "III-V compound semiconductor", pp. 335-337). . That is, B on a silicon substrate which has been conventionally known
P buffer layer (JP-A-2-275682, JP-A-2-27582)
288371 and JP-A-2-288388) have completely different internal crystal structures and film forming conditions. The low-temperature buffer layer having such a structure has a continuous upper layer deposited thereon.
This is particularly effective when it is composed of a group III-V compound semiconductor crystal layer.

In order to make the upper layer a continuous crystal layer, it is sufficient to use a buffer layer having the above requirements. However, in order to make the III-V compound semiconductor crystal layer constituting the upper layer cubic, additional constituent requirements are added to the BP-based buffer layer. In order to construct a buffer layer that provides a cubic upper layer, it is necessary to regulate the amount of boron phosphide multimeric crystals in the buffer layer. Boron monophosphide
The boron phosphide multimer crystal, which is referred to as BP, is referred to as a general formula B _i P _j (i ≠ 0, j ≧ 1). A typical B _i P _j crystal has i = 13,
There is a crystal represented by the chemical formula B ₁₃ P ₂ where j = 2 (
V. I. Matkovich, Acta. Crys
t. , 14 (1961), p. Amer.
Ceramic Society, 47 (1964),
See pages 44-46). There is also B ₆ P where i is 6 (J. Amer. Chem. Soc., 82 (196
0), pages 1330-1332. J representing the number of phosphorus atoms constituting one molecule of the boron phosphide multimer crystal is usually 1 or 2.

The technical rationale for restricting the boron phosphide multimer crystal with a quantitative relationship will be described below. B ₁₃ P ₂ is not preferable as a constituent material of the buffer layer because its crystal form is a hexagonal crystal having a rhombohedral structure (the above-mentioned Ame).
r. Ceramic Society, 47 (196
4), pages 44-46 and A.I. S. T. M. (Ameri
can Society of Testing Ma
terials) card 13-205). The crystal system constituting the buffer layer tends to be inherited by the upper layer. Therefore, the group III nitride semiconductor crystal layer laminated on the hexagonal buffer layer has a hexagonal crystal form. Inviting this situation is due to the fact that mainly cubic crystals
This is inconvenient and inconvenient for the purpose of the present invention, which aims at easily obtaining a laminated structure composed of a group III nitride semiconductor crystal layer. This is the reason why in the present invention, the amount of boron phosphide polymer crystals, which are aggregates of B atoms and P atoms, is suppressed to a small amount. In the present invention, a boron phosphide multimeric crystal (B _X P _Y , where X ≧ 6, Y = 1 or 2) comprising six or more boron (element symbol: B) atoms and phosphorus (element symbol: P) atoms. ) Are subject to quantitative regulation.

Specifically, it is preferable that the content of the boron phosphide multimeric crystal in the BP-based buffer layer is less than about 30%. More preferably, the amount of the boron phosphide multimeric crystal is 1/20 or less. Such a small amount of boron phosphide multimer crystals does not affect the crystal system of the upper layer. When the number of boron (B) atoms constituting a molecule increases,
Naturally, the volume occupied by the molecule becomes huge, for example,
This is also inconvenient, such as increased strain in the BP crystal layer.
From this viewpoint as well, it is particularly preferable that the boron phosphide polymer crystals are hardly contained.

For example, B ₁₃ P ₂ is obtained from BP by the following reaction formula 1.
(Amer., Supra).
Ceramic Society, 47 (1964),
See pages 44-46). 52 BP → 4 B ₁₃ P ₂ +11 P ₄ (Reaction formula 1) The production of B ₁₃ P _{2 due} to the thermal decomposition of this BP proceeds as the temperature increases (edited by the Japan Society for the Promotion of Industrial Technology, New Materials Technology Committee, "Compound semiconductor device" (September 15, 1973, Co., Ltd.)
(Issued by the Industrial Research Council), page 248). Therefore, chemical formula B
_In order to suppress the content of the boron phosphide polymer crystal represented by ₁₃ P ₂ to a small amount, it is advantageous to set the film forming temperature of the buffer layer to a low temperature as described above. After setting the film forming temperature as low as possible, when the BP-based buffer layer is formed by the vapor phase growth method, the supply amount of the boron (B) source to the reaction system is reduced and the boron (B) Increasing the supply ratio of the phosphorus (P) source to the source, that is, the P / B ratio, is more effective in suppressing the formation of B ₁₃ P ₂ crystals. For example, BCl ₃ / PC
₃ by halide VPE method using l ₃ / H ₂ reaction system
In the growth of BP at 50 ° C., the supply amount of BCl ₃ was about 5 × 10 ⁻⁶ mol / min, and PCl ₃ / BC
By setting the l ₃ supply ratio to about 300, B ₁₃ P
_A BP buffer layer containing almost no ₂ can be formed.

Further, the present invention provides a low-temperature buffer layer made of a semiconductor material capable of lattice-matching with CaF ₂ constituting a substrate in order to obtain an active layer having few crystal defects. By forming the low-temperature buffer layer from a crystal material that performs lattice matching with the substrate, the density of misfit dislocations generated at the interface between the substrate and the low-temperature buffer layer due to lattice misfit can be reduced in the first place. Therefore, there is an advantage that a low-temperature buffer layer having a small crystal defect density can be formed. On the low-temperature buffer layer having a low crystal defect density, an active layer having excellent crystallinity, which is advantageous for exhibiting high mobility characteristics, can be deposited. When forming a lattice-matched low-temperature buffer layer from a mixed crystal, it is desirable that the mixed crystal has as few constituent elements as possible. That is, it is desirable that the quaternary mixed crystal be composed of a ternary mixed crystal rather than a quinary mixed crystal. This is because the number of factors to be controlled to obtain a low-temperature buffer layer with specified specifications is reduced (Haruo Nagai et al., “III-V Semiconductor Mixed Crystal” (July 30, 1993). first edition second Printing, low-temperature buffer layer lattice-matched to CaF ₂ to 5.436Å Co., Ltd. corona publishing published). the lattice constant boron indium phosphide crystal (B _a in _1-a
P), the boron composition ratio (= a) is set to 0.31 B
_It can be composed of _0.31 In _0.69 P mixed crystal.

In forming the low-temperature buffer layer from the above-mentioned mixed crystal material, it is preferable that the region near the junction interface with the CaF ₂ single crystal substrate is mainly formed of a single crystal layer. Further, it is preferable that the region above it is composed of a layer mainly composed of an amorphous body. Thus, B _a an alternative to BP
Even when the low-temperature buffer layer is formed from the In _1-a P mixed crystal, the structural requirements for the crystal structure to be provided in the buffer layer are not different from those in the case of BP. Further, in order to deposit an upper layer consisting of cubic, B low-temperature buffer layer made of _a In _1-a P mixed crystal content of boron phosphide multimer crystals represented by B ₁₃ P ₂ 1/20 or less That is, there is no change in what should be suppressed to 5% or less.

[0037] When configuring the low-temperature buffer layer of the present invention from B _a In _1-a P mixed crystal, is not necessarily be composed of mixed crystal layer of a single composition. Strained-la
As a means for forming a yer super-lattice, a well-known method of superposing crystal layers having different lattice constants on each other (edited by the Physical Society of Japan, "Physics and Application of Semiconductor Superlattice" (September 1986) month 30 days first edition 4th Printing, Inc. Baifukan issue), pp. 83-84), B _a
A low-temperature buffer layer exhibiting good compatibility with CaF ₂ can be formed from an In _1-a P mixed crystal. For example, centering on the lattice constant of CaF ₂ (represented by the symbol d (= 5.436 °))
First B _a In _1-a P having _a lattice constant larger by Δa (Å)
Mixed crystal layer (lattice constant (Å) = d + Δa) and lattice constant d
-Δa (Å) to the second B _a In _1-a P mixed crystal layer and the multilayer structure of the superlattice structure in which the layered alternately, the low-temperature play a good lattice match to the CaF ₂ as a whole It can be used as a buffer layer. From the lattice constant (d) of CaF ₂ , + Δ
B having a lattice constant changed by a or -Δa (Å)
_a In _1-a P mixed crystal can be formed by changing the boron composition ratio (= a).

[0038] As described above, boron composition ratio of B _a In _1-a P mixed crystal CaF ₂ lattice matching Oseru is, B _0.31 an In _0.69 to 0.69 the indium composition ratio in other words 0.31
P. Accordingly, in the case of constituting the super lattice structure from a B _a In _1-a P mixed crystal displaces the composition ratio of boron to an equivalent amount in the magnitude bidirectionally around the a = 0.31. The equivalence of the deviation of the boron (or indium) composition ratio from the reference value in the magnitude direction is determined by the Vegard rule (Hirio Nagai et al., “III-V Group Semiconductor Mixed Crystal” (July 30, 1993).
Day First Edition Second Printing, Inc. Corona Publishing published), page 27 reference) as taught, B _a In _1-a P mixed crystals of the magnitude direction from the lattice constant of CaF ₂ by the varying composition This is to make the displacement amount of the lattice constant of Eq. _Ba In _1-a P
In the case of a mixed crystal, the maximum displacement of the boron composition ratio displaced in both the large and small directions is a boron composition ratio that gives a lattice constant matching CaF ₂ when considering the condition of boron composition ratio a> 0. It is ± 0.31 with reference to 31. Therefore, in _Ba In _1-a P, the possible range of the boron composition ratio (= a) is 0 <a <0.62.

On the low-temperature buffer layer of the present invention, an active layer made of a group III nitride semiconductor crystal can be directly deposited. For example,
A gallium nitride crystal layer constituting a channel layer can be stacked on the low-temperature buffer layer made of B _0.31 In _0.69 P (lattice constant = 5.436 °). Cubic gallium nitride (GaN)
Has a lattice constant of 4.510 ° and has no lattice matching relationship with B _0.31 In _0.69 P constituting the low-temperature buffer layer. However, in the low-temperature buffer layer according to the present invention, the active layer made of gallium nitride, which is the upper layer having a lattice mismatch, can be a continuous and smooth crystal layer.

There is also a method in which, instead of directly depositing an active layer on the low-temperature buffer layer, a group III nitride semiconductor crystal layer constituting the active layer is laminated after inserting an intervening layer. In this case, a material suitable for forming the intervening layer is a mixed crystal of boron phosphide nitride (BP ₁ -δNδ: 0 ≦ δ ≦ 1) in which the range of possible lattice constants is 3.62 ° or more and 4.54 ° or less. is there. This is because aluminum gallium nitride (Al _A) suitable for forming the active layer depends on the nitrogen composition ratio (= δ).
This is because an intervening layer lattice-matched to Ga _B N: 0 ≦ A, B ≦ 1, A + B = 1) can be supplied. For example, a BP _0.97 N _0.03 mixed crystal having a nitrogen composition ratio of 0.03 is a cubic Ga
N (lattice constant = 4.510 °). The BP _0.83 N _0.17 mixed crystal having a nitrogen composition ratio of 0.17 has a lattice constant that matches cubic AlN (lattice constant = 4.380 °). In addition, boron arsenide (BAs _1-
γNγ: 0 ≦ γ ≦ 1) The intervening layer can also be composed of a mixed crystal.
By forming the intervening layer from BAs ₁ -γNγ which is a ternary mixed crystal composed of boron arsenide (BAs; lattice constant = 4.777 °) and boron nitride (BN; lattice constant = 3.615 °), the intervening layer is formed. The type of group III nitride semiconductor crystal that can achieve lattice matching can be increased. For example, an intervening layer composed of a BAs _0.81 N _0.19 mixed crystal having an arsenic composition ratio of 0.81 cannot be achieved by a BP ₁ -δNδ mixed crystal, and Ga _0.90 In _0.10 N (a lattice constant) having an indium composition ratio of 10%. =
4.560 °) and lattice matching can be achieved.

In the buffer layer for FET use, the buffer layer is
It is preferable that the resistance is high in order to achieve electrical insulation with the active layer. It is also preferable that the intervening layer provided on the buffer layer has a high resistance. Similarly to the low-temperature buffer layer, the intervening layer is formed of a gas source (gas) which is a kind of a metal organic chemical vapor deposition (MOCVD) method, a halide or hydride VPE method, or a molecular beam epitaxial (MBE) method.
-Source) The film can be formed by the MBE method or the like. In these methods, for example, doping with impurities (dopin
g) If the film is formed, a low-temperature buffer layer or an intermediate layer having a high resistance can be obtained. For example, an undoped p-type BP-based low-temperature buffer layer is made of Si or tin (element symbol: Sn) belonging to group IV of the periodic table, or selenium (element symbol: S) belonging to group VI.
A high resistance layer can be formed by doping an n-type impurity such as e) or sulfur (element symbol: S). For an undoped n-type BP-based low-temperature buffer layer, group II zinc (element symbol: Zn), beryllium (element symbol: Be) and magnesium (element symbol: Mg), and group IV carbon (element A high-resistance layer can be formed by doping a p-type impurity such as C :.

The thickness of the low-temperature buffer layer is 10 μm or less, preferably 1 μm or less. More preferably, 5000
Å or less, and particularly preferably 500 ° or less. Furthermore, if the low-temperature buffer layer has a thickness of several atomic layers,
If the thickness of the region including the single crystal layer in the region near the bonding interface with the CaF ₂ substrate is about several atomic layers, the function as a low-temperature buffer layer can be sufficiently exhibited.

A laminated structure having at least an active layer made of a cubic group III nitride semiconductor on the low-temperature buffer layer according to the present invention is provided with a source and a drain made of an ohmic electrode material. By providing an electrode and a gate electrode made of a Schottky electrode material, a group III nitride semiconductor device such as a FET according to the present invention can be formed.

[0044]

According to the first aspect of the present invention, a cubic substrate made of fluorite crystal-type calcium fluoride (CaF ₂ ) and a zinc-blende-type boron phosphide (BP) -based low-temperature substrate provided thereon are provided. The underlying laminated system composed of the buffer layer has an advantageous effect on the fact that the active layer laminated as the upper layer is composed of a cubic group III nitride semiconductor crystal. As a result, a laminated structure having an active layer made of a cubic group III nitride semiconductor can be conveniently constructed, and the function of simply configuring a group III nitride semiconductor device can be achieved.

In particular, the content of the boron phosphide multimer crystal typified by hexagonal B ₁₃ P ₂ having a rhombohedral structure is set to 1/20 or less, and the low temperature is mainly composed of BP, so-called boron monophosphide. The buffer layer has an excellent effect on making the crystal system of the upper group III nitride semiconductor crystal layer cubic. Therefore, it is advantageous in constructing a laminated structure composed of a cubic group III nitride semiconductor crystal layer.

In particular, the low-temperature buffer layer in which a single-crystal layer is disposed in a region near the interface with the single-crystal substrate and a layer mainly composed of an amorphous substance is disposed in a region above the low-temperature buffer layer constitutes an upper layer. Has the effect of improving the continuity of the resulting crystal layer, thereby providing a continuous group III nitride semiconductor crystal layer.

[0047]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below based on embodiments. First Embodiment A Schottky junction field effect transistor (MESFET) shown in FIG. 3 using an undoped {001} -calcium fluoride (CaF ₂ ) single crystal to which no impurity is intentionally added as a substrate 101. )
A laminated structure 1 for use was configured.

In order to form the laminated structure 1, $ 00
On a 1｝ -CaF ₂ substrate 101, boron phosphide (BP)
The buffer layer 110 mainly composed of was deposited. The BP buffer layer 110 was grown at 450 ° C. by a general halogen VPE method using a boron trichloride (BCl ₃ ) / phosphorus trichloride (PCl ₃ ) / hydrogen (H ₂ ) reaction system. The supply amount of the ratio of PCl ₃ for _{BCl 3 (= PCl 3 / BCl} 3
Ratio) was set to 100 times. Bonding surface 1 of BP buffer layer 110 having a layer thickness of 200 ° to CaF ₂ substrate 101
An area of about 30 ° from 11 to the upper side of the buffer layer 110 is:
A single crystal layer made of BP was formed, and a region further above the single crystal layer was formed of a layer mainly made of amorphous BP. The content of the boron phosphide multimeric crystal in the BP buffer layer 110 was determined to be 4.8% by weight.

On the surface of the BP buffer layer 110, trimethylgallium ((CH ₃ ) ₃ Ga) is coated with gallium (Ga).
A source of ammonia (NH ₃ : 100%) into a nitrogen (N) source,
And phosphine (PH ₃ : 10% PH ₃ -90% H ₂ )
General atmospheric pressure (atmospheric pressure) MOCV using P as phosphorus (P) source
According to Method D, an undoped boron phosphide nitride (BP ₁ -δNδ) mixed crystal layer 114 was formed at 960 ° C. BP _1- δN
The nitrogen composition ratio (= δ) of the δ mixed crystal layer 114 is NH ₃ and PH
₃ to the MOCVD reaction system to adjust δ = 0.
03. The layer thickness was about 100 nm.

On the BP _0.97 N _0.03 mixed crystal layer 114, a gallium nitride (GaN) layer 115 mainly composed of cubic crystals was laminated at 980 ° C. by the above-mentioned MOCVD method. GaN layer 1
The content of the hexagonal GaN crystal in No. 15 was about 8 to 9% according to inspection by a usual X-ray diffraction method. The GaN layer 115 having a thickness of about 200 nm is doped with silicon (Si) using a mixed gas of disilane (5 ppm by volume) and hydrogen at the time of film formation so that the GaN layer 115 has a carrier concentration of about 2 × 10 An n-type layer of ¹⁷ cm ^-3 was formed. This is because the n-type GaN layer 115 is used as an active layer of the FET, that is, a channel layer.

On the n-type GaN channel layer 115, 98
At 0 ° C., the Si-doped n-type GaN layer (layer thickness = 200 n
m, carrier concentration = 2.2 × 10 ¹⁸ cm ⁻³ ) as a contact layer 106. In order to form an ohmic electrode having a low contact resistance, the carrier concentration of the contact layer 106 was set to be about one digit higher than that of the GaN layer 115 constituting the channel layer. The carrier concentration is above the Si
This was achieved by increasing the flow rate of doping gas to the MOCVD reaction system.

After patterning is performed using a general photolithography technique, the contact layer 106 in the region where the gate electrode 109 is to be arranged is made of methane (CH ₃ ) / hydrogen (H ₂ ) / argon ( Ar) is removed by plasma etching using a mixed gas, and a recess (r) is formed.
access section 116. A titanium (Ti) film, a platinum (Pt) film, and a gold (Au) film are sequentially deposited on a substantially central portion of the n-type GaN channel layer 115 exposed in the recessed portion 116 to form three layers of Ti / Pt / Au. The gate electrode 109 having a gate length of about 2 μm was formed. The source electrode 107 and the drain electrode 108 were provided on the surface of the n-type GaN contact layer 106 which was left to face with the recessed portion 116 interposed therebetween, thereby forming MESFET2. Each of the source and drain electrodes 107 and 108 was formed of a vacuum-deposited thin film of Au / germanium (Ge) alloy.

(Second Embodiment) In the second embodiment, the substrate 101 is the same as in the first embodiment, and the semiconductor material forming the buffer layer 110 is boron phosphide in the case of the first embodiment. (BP) boron indium phosphide mixed crystal from (B _a an In
_1-a P), and the laminated structure 3 for MODFET shown in FIG. 4 was constructed. First, a buffer layer 1 becomes boron composition ratio (= a) from B _a In _1-a P to 0.31, and about 15nm layer thickness which is lattice-matched to CaF ₂ substrate 101
10 is mounted on a CaF ₂ substrate 101 by a general atmospheric pressure MOCV.
It was constituted by the D method. Buffer layer 110 by MOCVD
Diborane (B ₂ H ₆ ) and phosphine (P
H ₃ ) was used as a raw material for boron (B) and phosphorus (P), and cyclopentadienyl indium (C ₅ H ₅ In) having a monovalent valence was used as the indium (In) source (J). Crystal Growth, 107 (1
991), pages 360-364). MOCVD
Group III element raw materials (B ₂ H ₆ and C ₅ H
Group V element raw material (PH ₃ ) based on the total concentration of ₅ In)
, The so-called V / III ratio was set to 180. Hydrogen (H ₂ ) was used as a carrier gas.
Furthermore, since the temperature at which the buffer layer 110 is formed is set at 450 ° C., the content of the hexagonal boron phosphide multimer crystal represented by B ₆ P or B ₁₃ P ₂ is less than about 10%.
_{A 0.31} In _0.69 P mixed crystal buffer layer 110 resulted.

[0054] region in the vicinity of the junction interface 111 between the CaF ₂ substrate 101 is composed primarily of B _a In _1-a P monocrystalline, B _a an In that the upper is constructed from a layer mainly containing amorphous material
_{On the 1-a} P buffer layer 110, a channel layer 115 made of n-type GaN similar to that described in the first embodiment is used.
Were laminated by the MOCVD method. On the n-type GaN channel layer 115, undoped n-type aluminum nitride
Electrons to approximately 20nm layer thickness the layer thickness of gallium mixed crystal (Al _0.20 Ga _0.80 N) consists of about 7nm spacer layer 105, Si-doped n-type aluminum gallium nitride mixed crystal (Al _0.20 Ga _0.80 N) Supply layer 104 and first
An n-type GaN contact layer 106 similar to that described in the embodiment is sequentially laminated by MOCVD,
The laminated structure 3 to be used for manufacturing the FET 4 was formed.

Each of the above layers is made of a general atmospheric pressure MOCVD.
When the Si-doped Al _0.20 Ga _0.80 N electron supply layer 104 is formed, a high-purity disilane (5 vol.%) Having a water and oxygen content of less than the order of ppm (parts per million) is formed. ppm)
-Using a hydrogen mixed gas, the doping flow rate was controlled such that the carrier concentration of the same layer 104 was about 1.8 × 10 ¹⁸ cm ⁻³ . The electron supply layer 104 is formed by converting trimethyl aluminum ((CH ₃ ) ₃ Al) purified to reduce the content of oxygen-containing functional group molecules such as oxygen and methoxy (—OCH ₃ ) groups to aluminum (Al).
A film was formed by using as a source. Both by utilizing a high-purity raw material, the deep level of origin, such as conjugates of aluminum atoms and oxygen impurities not the n-type aluminum gallium nitride mixed crystal (Al _{0. 20} Ga _0.80 N) layer This is a measure to prevent large quantities from being generated easily.

After that, in the same manner as in the first embodiment, the laminated structure 3 is processed to form a recessed structure 116, and then the surface of the electron supply layer 104 exposed at the bottom of the recessed portion 116 is formed. A gate electrode 109 having Ti / Pt / Au layered thereon. In addition, the source and drain electrodes 107 and 108 were arranged so as to face the surface of the contact layer 106 to form the MODFET 4 shown in FIG.

(Third Embodiment) In the third embodiment, when manufacturing a laminated structure similar to that described in the first embodiment, the buffer layer 110 made of boron phosphide (BP) is used. And B
Cl ₃ / PCl ₃ / H ₂ halogen 350 by VPE method
A layered structure was formed at a temperature of 100 ° C., and the other conditions were the same as in the first embodiment. By lowering the film forming temperature of the BP buffer layer, the BP buffer layer 110 having a content of boron phosphide multimeric crystals such as B ₁₃ P _{2 of} less than about 3% was formed.

The BP buffer layer 110 having the same layer thickness and internal crystal structure as the first embodiment manufactured in the third embodiment is provided with the means described in the first embodiment. The BP ₁ -δNδ mixed crystal layer 114, the n-type GaN channel layer 115, and the contact layer 106 were sequentially laminated in accordance with the following formula. Thereafter, a recess structure 116 is formed by the method described in the first embodiment to form a gate electrode 109 made of Ti / Pt / Au, and source and drain electrodes 107 and 108 are formed in the contact layer 106. And MESF
Configured ET. The manufactured MESFET had the configuration shown in FIG.

FIGS. 5 to 7 show examples of the drain current-voltage characteristics of the FETs manufactured in the first to third embodiments, and show the dependence of the drain current between the source / drain electrodes 107 and 108 on the gate voltage. It is an example of the static characteristic showing the property.
FIG. 5 shows the drain current-voltage characteristics of the MESFET manufactured in the first embodiment, and shows a good pinch-off with a normal gate action (gate action).
f) It is shown that the characteristics are consequent. Further, by providing the low-temperature buffer layer according to the present invention, the channel layer having excellent continuity can be formed at room temperature by about 520 cm.
² / V · s and high electron mobility (electron mo
The MESFET of the first embodiment has a high transconductance (g _m ) of about 12 mS, reflecting its
Was obtained.

FIG. 6 shows the MODF manufactured in the second embodiment.
It is an example of the drain current-voltage characteristics (DC static characteristics) of ET. The n-type GaN channel layer is a continuous film because it is deposited on a low-temperature buffer layer that has an advantage in providing a film with excellent continuity, and the vicinity of the junction interface between the channel layer and the spacer layer Reflecting the generation of two-dimensional electron gas in the region, the high g _{m of} about 25 mS
The ODFET was constructed. In addition, the pinch-off voltage was uniform at about -7.8V.

FIG. 7 shows the MESF fabricated in the third embodiment.
It is an example of the drain current-voltage characteristics (DC static characteristics) of ET. In the third embodiment, as shown in FIG. 7, MESFET expressing higher g _m than MESFET according to the first embodiment was produced. M produced in the third embodiment
The ESFET differs from that of the first embodiment in the crystal structure inside the low-temperature buffer layer. In particular, since the MESFET of the third embodiment has a low-temperature buffer layer having a low content of boron phosphide polymer crystals (B ₁₃ P ₂ ), the n-type GaN channel layer thereon is cubic crystal. Of about 95
% Or more of the continuous film having a larger cubic crystal composition ratio than that of the first embodiment. Therefore, the above results are considered to reflect that a channel layer having better electron mobility was formed. As a result, from the third multilayer structure comprising configuration described in the examples, MESFE with high g _m As shown in FIG. 7
T resulted.

(Comparative Example) In this comparative example, as described above, it is preferable to form a buffer layer at 250 ° C. to 600 ° C.
MODFE from a laminated structure with a BP buffer layer formed on a {001} CaF ₂ substrate at a temperature outside the range of
T was constructed. In this comparative example, B ₂ H ₆ / PH ₃ / H ₂
At 900 ° C. on a CaF ₂ substrate by a system MOCVD method,
A buffer layer in which cubic BP (boron monophosphide) and particularly hexagonal B ₁₃ P ₂ were mixed and the content of B ₁₃ P ₂ was about 30% was formed. When a BP film is formed directly on a silicon (silicon) single crystal substrate (“Journal of the Japan Society for Crystal Growth”, Vol. 24, No. 2 (1997), 15
Since the buffer layer is formed at a high temperature as in the case of (see page 0), the buffer layer of this comparative example is composed of pyramidal growth islands scattered on the surface of the CaF ₂ substrate, and lacks continuity. ₁₃ P
_It was composed of _two mixed films.

Neglecting the above-mentioned discontinuity of the buffer layer, the BP
Primarily B ₁₃ in a buffer layer made of a mixture of P _2, so the upper portion including a direct second embodiment similar to the n-type GaN channel layer is laminated by the MOCVD method and, MODF
A laminated structure for ET use was constructed. Subsequently, a gate electrode was formed in the recessed portion and a source and drain electrode were formed on the outermost n-type GaN contact layer in the same manner as in the second embodiment to form a MODFET. . The manufactured MODFET had the configuration shown in FIG.

The MODFET manufactured in this comparative example uses a discontinuous n-type GaN crystal layer as a channel layer, which reflects the discontinuity of the high-temperature buffer layer in which pyramid-shaped protrusions are scattered. Due to this channel layer discontinuity, a normal gate action (gate) leading to good pinch-off
action), that is, a semiconductor element exhibiting FET characteristics was difficult to obtain from the laminated structure of this comparative example.
FIG. 8 is an example of a drain current-voltage characteristic (DC static characteristic) of a MODFET showing a gate action slightly obtained from the MODFET manufactured in this comparative example. The crystallinity of the poor channel layer exists Nao且crack discontinuous reflecting vividly g _m is as low as about 3 mS, in particular, under a high gate bias (bias), g _m results also further small becomes pinched off Did not reach. MO of this comparative example
Low of g _m of DFET is discontinuity and low electron mobility due to inconsistencies in the crystal system of hexagonal and cubic channel layer crystalline form are mixed in the channel layer are caused.
Poor pinch-off also involves the lack of insulating properties of the buffer layer due to film formation at a high temperature. In summary, it is difficult to form a laminated structure having a channel layer (active layer) that provides excellent normal FET characteristics on the buffer layer formed at a temperature outside the preferable range. Therefore, it is difficult to obtain an FET having good characteristics.

[0065]

According to the invention described in claim 1 of the present application,
A laminated structure comprising a cubic aluminum nitride gallium indium crystal layer having excellent continuity is obtained on a CaF ₂ single crystal substrate having excellent electrical insulation. When this laminated structure is used, III such as MESFET having excellent pinch-off characteristics and exhibiting high conductance (g _m ) is used.
A group III nitride semiconductor device can be provided.

According to the internal structure of the low-temperature buffer layer described in claim 2 of the present application, it is particularly effective to form the upper group III nitride semiconductor crystal layer from a uniform cubic crystal form. There is. Accordingly, the laminated structure having a group III nitride semiconductor crystal layer that exhibit high electron mobility contributes to improvement of the FET characteristics can be configured, group III nitride semiconductor characteristics such as FET is improved with a higher g _m An element can be provided.

According to the third aspect of the present invention, a low-temperature buffer layer excellent in lattice matching with a CaF ₂ substrate can be formed, and further, a group III nitride semiconductor excellent in crystallinity. A laminated structure having a crystal layer can be formed. The laminate structure, such as to further improve the g _m of the FET, the effect to result in enhanced properties of III-nitride semiconductor device. Thus, there is an effect that a group III nitride semiconductor device such as a MESFET having excellent characteristics can be provided.

The invention according to claim 4 of the present application has an effect of providing a constituent layer of a laminated structure having a uniform crystal form and having continuity.

[Brief description of the drawings]

Fig. 1 Conventional MOD using hexagonal sapphire as substrate
FIG. 2 is a schematic cross-sectional view illustrating a configuration of an FET.

FIG. 2 is a schematic diagram showing an internal crystal structure of a boron phosphide buffer layer according to the present invention formed on a calcium fluoride substrate.

FIG. 3 is a MESFET according to first and third embodiments;
FIG. 2 is a schematic cross-sectional view showing the configuration of FIG.

FIG. 4 shows M0DFE according to a second embodiment and a comparative example.
FIG. 2 is a schematic cross-sectional view showing a configuration of T.

FIG. 5 is a diagram showing drain current-voltage characteristics of the MESFET manufactured in the first embodiment.

FIG. 6 is a diagram showing drain current-voltage characteristics of the MODFET manufactured in the second embodiment.

FIG. 7 is a diagram showing drain current-voltage characteristics of the MESFET manufactured in the third embodiment.

FIG. 8 is a diagram showing drain current-voltage characteristics of a MODFET manufactured in a comparative example.

[Explanation of symbols]

REFERENCE SIGNS LIST 1 laminated structure for FET use 2 FET as group III nitride semiconductor device 3 laminated structure for FET use 4 FET as group III nitride semiconductor device 101 substrate 102 low temperature buffer layer 103 active layer 104 electron supply layer 105 spacer layer 106 Contact layer 107 Source electrode 108 Drain electrode 109 Gate electrode 110 BP buffer layer 111 Junction interface between substrate and buffer layer 112 Region near junction interface composed of single crystal 113 Above vicinity near junction interface mainly composed of amorphous material Region 114 boron nitrided phosphide mixed crystal layer 115 n-type GaN channel layer 116 recess

Claims (4)

[Claims] 1. An insulating calcium fluoride (chemical formula: C
aF ₂ ), a buffer (buffer) layer formed on the single crystal substrate and containing at least boron (element symbol: B) and phosphorus (element symbol: P) as constituent elements; A general formula AlαGaβIn1 _- α _- βN1 _- γMγ (0 ≦ α, β) formed on a crystal substrate via the buffer layer
.Ltoreq.1, 0.ltoreq..alpha. +. Beta..ltoreq.1, the symbol M represents a Group V element other than nitrogen, and aluminum nitride represented by 0.ltoreq..gamma. <1).
A group III nitride semiconductor device comprising: an active layer formed of a gallium / indium crystal layer. 2. The method according to claim 1, wherein the buffer layer comprises a boron phosphide polymer crystal (B _X P) comprising boron (B) atoms and phosphorus (P) atoms.
_Y , provided that the content of X ≧ 6 and Y = 1 or 2) is １ ／
2. The group III nitride semiconductor device according to claim 1, wherein the group III nitride semiconductor device is made of a BP-based group III-V compound semiconductor crystal having 0 or less. Wherein the buffer layer is, boron indium phosphide crystal _{(B a In 1-a P} , where 0 <a <0.62) III according to claim 1 or 2, characterized in that it consists Group III nitride semiconductor device. 4. The buffer layer according to claim 1, wherein a layer made of single crystal is arranged in a region near an interface with the single crystal substrate, and a layer mainly composed of an amorphous body is arranged in a region above the single crystal substrate. The group III nitride semiconductor device according to claim 1, wherein: