JP4065365B2 - 雑音低減回路 - Google Patents

雑音低減回路 Download PDF

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Publication number
JP4065365B2
JP4065365B2 JP2000502578A JP2000502578A JP4065365B2 JP 4065365 B2 JP4065365 B2 JP 4065365B2 JP 2000502578 A JP2000502578 A JP 2000502578A JP 2000502578 A JP2000502578 A JP 2000502578A JP 4065365 B2 JP4065365 B2 JP 4065365B2
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JP
Japan
Prior art keywords
circuit
pulse train
output
pulse
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
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JP2000502578A
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English (en)
Japanese (ja)
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JP2001510291A (ja
JP2001510291A5 (enExample
Inventor
ジェームズ アンダーヒル，マイケル
アレクサンダー ダウニー，ニール
Original Assignee
トリック リミティド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from GBGB9714309.3A external-priority patent/GB9714309D0/en
Priority claimed from GBGB9716041.0A external-priority patent/GB9716041D0/en
Priority claimed from GBGB9719291.8A external-priority patent/GB9719291D0/en
Priority claimed from GBGB9805017.2A external-priority patent/GB9805017D0/en
Application filed by トリック リミティド filed Critical トリック リミティド
Publication of JP2001510291A publication Critical patent/JP2001510291A/ja
Publication of JP2001510291A5 publication Critical patent/JP2001510291A5/ja
Application granted granted Critical
Publication of JP4065365B2 publication Critical patent/JP4065365B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/156—Arrangements in which a continuous pulse train is transformed into a train having a desired pattern
    • H03K5/1565—Arrangements in which a continuous pulse train is transformed into a train having a desired pattern the output pulses having a constant duty cycle
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/003—Changing the DC level
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01—Shaping pulses
    • H03K5/08—Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding
    • H03K5/082—Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding with an adaptive threshold
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/19—Monitoring patterns of pulse trains

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Manipulation Of Pulses (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
JP2000502578A 1997-07-07 1998-07-06 雑音低減回路 Expired - Fee Related JP4065365B2 (ja)

Applications Claiming Priority (9)

Application Number Priority Date Filing Date Title
GBGB9714309.3A GB9714309D0 (en) 1997-07-07 1997-07-07 Noise reduction circuits
GB9714309.3 1997-07-07
GB9716041.0 1997-07-30
GBGB9716041.0A GB9716041D0 (en) 1997-07-30 1997-07-30 Jitter reduction and spurious pulse deletion circuit for noise reduction
GBGB9719291.8A GB9719291D0 (en) 1997-09-10 1997-09-10 Jitter reduction circuit with application to multiphase output clock distribut on
GB9719291.8 1997-09-10
GBGB9805017.2A GB9805017D0 (en) 1998-03-11 1998-03-11 Fractional-n frequency synthesiser with jitter suppression
GB9805017.2 1998-03-11
PCT/GB1998/002001 WO1999003201A2 (en) 1997-07-07 1998-07-06 Missing pulse detector

Publications (3)

Publication Number Publication Date
JP2001510291A JP2001510291A (ja) 2001-07-31
JP2001510291A5 JP2001510291A5 (enExample) 2006-01-05
JP4065365B2 true JP4065365B2 (ja) 2008-03-26

Family

ID=27451675

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000502578A Expired - Fee Related JP4065365B2 (ja) 1997-07-07 1998-07-06 雑音低減回路

Country Status (7)

Country Link
US (1) US6417707B1 (enExample)
EP (1) EP1040577B1 (enExample)
JP (1) JP4065365B2 (enExample)
KR (1) KR100514549B1 (enExample)
AU (1) AU8232898A (enExample)
DE (1) DE69840525D1 (enExample)
WO (1) WO1999003201A2 (enExample)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6434707B1 (en) 1999-06-07 2002-08-13 Motorola, Inc. Low phase jitter clock signal generation circuit
US6981166B2 (en) * 2002-01-07 2005-12-27 International Business Machines Corporation Method, apparatus, and computer program product for pacing clocked operations
DE602004025907D1 (de) * 2004-06-04 2010-04-22 Infineon Technologies Ag Vorrichtung zur DC-Kompensation in einem Demodulator
GB0416627D0 (en) * 2004-07-26 2004-08-25 Toric Ltd Anti-jitter circuits
JP4769985B2 (ja) * 2004-11-26 2011-09-07 エスティー‐エリクソン、ソシエテ、アノニム ジッタ低減回路および周波数合成器
JP4748356B2 (ja) * 2005-10-13 2011-08-17 サンケン電気株式会社 誘導加熱装置
US20080122606A1 (en) * 2006-04-17 2008-05-29 James Roy Bradley System and Method for Vehicular Communications
US7961086B2 (en) * 2006-04-17 2011-06-14 James Roy Bradley System and method for vehicular communications
DE102007002112B4 (de) * 2007-01-15 2008-12-18 Infineon Technologies Ag Vorrichtung und Verfahren zur Regenerierung eines Taktsignals, Vorrichtung und Verfahren zur Umwandlung eines Taktsignals in ein mittelwertfreies Signal
US20080253491A1 (en) * 2007-04-13 2008-10-16 Georgia Tech Research Corporation Method and Apparatus for Reducing Jitter in Multi-Gigahertz Systems
GB0807152D0 (en) * 2008-04-18 2008-05-21 Toric Ltd Clock generator circuits
US8924765B2 (en) * 2011-07-03 2014-12-30 Ambiq Micro, Inc. Method and apparatus for low jitter distributed clock calibration
JP5657596B2 (ja) * 2012-03-26 2015-01-21 株式会社東芝 近接妨害除去フィルタ装置、無線通信装置およびキーレスエントリー装置
TWM445301U (zh) * 2012-09-06 2013-01-11 Excelliance Mos Corp 電壓轉換裝置及次諧波偵測器
CN105242678B (zh) * 2015-09-11 2017-10-31 湖北三江航天红峰控制有限公司 一种舵机抖动抑制电路及舵机系统
CN109302177A (zh) * 2018-11-27 2019-02-01 国网上海市电力公司 一种基于二倍频二分频的数字反馈式精密方波移相器
RU2719556C1 (ru) * 2019-07-30 2020-04-21 федеральное государственное бюджетное образовательное учреждение высшего образования "Белгородский государственный технологический университет им. В.Г. Шухова" Формирователь периодической последовательности импульсов

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1462408A (en) 1974-07-26 1977-01-26 Mullard Ltd Circuit for comparing two electrical waveforms
US4230958A (en) * 1978-08-09 1980-10-28 Bell Telephone Laboratories, Incorporated Loss of clock detector circuit
GB2064273B (en) * 1979-11-23 1983-10-19 Marconi Co Ltd Data transmission clock pulse recovery
JPH0453366A (ja) * 1990-06-21 1992-02-20 Matsushita Electric Ind Co Ltd 水平同期信号分離装置
GB2274032A (en) * 1993-01-05 1994-07-06 Mitel Corp Clock-sensitive processor reset circuit
JPH08163181A (ja) * 1994-11-30 1996-06-21 Sharp Corp 情報再生回路
GB2310331B (en) * 1996-02-15 2000-06-28 Surrey University Of Phase noise reduction circuits
US5742200A (en) * 1996-05-14 1998-04-21 Alliedsignal Inc. Environmentally rugged optical sensor with improved noise cancellation

Also Published As

Publication number Publication date
US6417707B1 (en) 2002-07-09
AU8232898A (en) 1999-02-08
DE69840525D1 (de) 2009-03-19
EP1040577A2 (en) 2000-10-04
KR100514549B1 (ko) 2005-09-14
WO1999003201A3 (en) 1999-03-25
JP2001510291A (ja) 2001-07-31
EP1040577B1 (en) 2009-01-28
WO1999003201A2 (en) 1999-01-21
KR20010021606A (ko) 2001-03-15

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