JP4044986B2

JP4044986B2 - Manufacturing method of wiring board assembly

Info

Publication number: JP4044986B2
Application number: JP18290597A
Authority: JP
Inventors: 弘志中村
Original assignee: NGK Spark Plug Co Ltd
Current assignee: NGK Spark Plug Co Ltd
Priority date: 1997-07-09
Filing date: 1997-07-09
Publication date: 2008-02-06
Anticipated expiration: 2017-07-09
Also published as: JPH1126639A

Description

【０００１】
【発明の属する技術分野】
本発明は、複数の配線基板となる複数の基板部分を有する配線基板集合体の製造方法に関する。
【０００２】
【従来の技術】
一般にセラミック多層配線基板は多数個取りによって量産される。係る複数個の配線基板の集合体の状態において、各配線基板の上面に例えば水晶振動子等の素子を搭載し、個別に電気的特性を測定した後に、上記集合体を分割して複数の配線基板を得る場合がある。
【０００３】
係るセラミック多層配線基板の集合体７０は、例えば図６(Ａ)の平面図に示すように、分割溝７４によって区画された複数の基板部分７２と、分割溝７４上に垂直に形成された貫通孔７６と、この貫通孔７６に一部が接続する素子用の端子７８を有する。各基板部分７２は、分割溝７４に沿い追って分割されて個別の配線基板となる。上記端子７８は、基板部分７２の上面に搭載される素子等と導通される。
また、図６(Ｂ)に示すように、上記貫通孔７６の内周面全体には、各基板部分７２の配線パターンを追ってマザーボードと半田付けして導通するため、中空部を有する円管状の導通部８０が形成されている。
【０００４】
この場合、図６(Ｃ)に示すように、分割溝７４を挟んで隣接する基板部分７２同士は、係る導通部８０を介して互いの配線パターン７３同士が導通している。
このため、前記集合体７０における各基板部分７２の上面の素子搭載部に例えば水晶振動子等の素子を固着し、この素子と上記端子７８を導通しても、個別の基板部分７２の電気的特性を正確に測定できない場合がある。係る集合体７０の状態で、各基板部分７２の電気的特性を測定できないと、検査効率を低下させるということにもなる。
【０００５】
また、前記貫通孔７６内に分割後に外部端子となる導通部８０を得るため、素子用の端子７８と共に、Ｎｉ及びＡｕの無電解メッキを施すに先立ち、それらの下地メタライズに対しＰｄ触媒核等を付着させる活性化処理を施す。この際、断面Ｖ形をなす分割溝７４の底部にもＰｄ触媒核が付着するため、分割溝７４の底部に沿ってＮｉ及びＡｕメッキ層が線状に形成される。
この結果、図６(Ｄ)に示すように、分割溝７４に沿って各基板部分７２毎に分割すると、その側面８２における隣接する半円形に凹んだ外部端子８４同士が線状のＮｉ及びＡｕメッキ層８６を介して短絡し、本来の回路形成を阻害する不具合を招く場合もある。
【０００６】
【発明が解決すべき課題】
本発明は、以上の従来の技術における問題点を解決し、個別の配線基板となる基板部分の電気的特性の測定を配線基板の集合体の状態において可能とした配線基板集合体の製造方法を提供することを目的とする。
【０００７】
【課題を解決するための手段】
本発明は、上記課題を解決するため、配線基板集合体の貫通孔内に形成される複数の導体層を隣接する基板部分毎に分離して形成し、且つ分割後の配線基板の側面における導体層同士の短絡を断つことに着想して成されたものである。
即ち、本発明の配線基板集合体の製造方法（請求項１）は、配線基板集合体となる複数のグリーンシートにおいて、複数の基板部分を区分する分割溝が追って形成される分割予定線に沿って、該分割予定線と長軸が平行な略長円形又は略楕円形の貫通孔を形成する工程と、上記複数のグリーンシートにおける上記貫通孔毎の内周面で且つ上記分割予定線から離れて対向する基板部分毎の位置に複数の下地メタライズを形成する工程と、上記複数のグリーンシートを上記貫通孔が連通し且つ上記下地メタライズが接続するように積層して積層体を形成する工程と、上記積層体における上記分割予定線に沿って分割溝を形成する工程と、上記積層体を焼成する工程と、係る焼成により得られたセラミックの本体の上記下地メタライズが焼成された下地層にメッキを施して導体層を形成する工程と、を含む、ことを特徴とする。
【０００８】
これによれば、各基板部分の配線パターンが隣接する基板部分の配線パターンと絶縁され、各基板部分の分割溝上における複数の導体層同士も絶縁されていることで、複数の基板部分について、集合体の状態でそれぞれの電気的特性を測定できる配線基板集合体を確実に提供することができる。
【０００９】
尚、前記基板部分とは分割後に個別の配線基板となる集合体内の部分を指す。
また、前記分割溝上とは該溝同士の交差部や、各溝のコーナ、屈曲部も含む。
【００１０】
更に、本発明には、前記貫通孔を形成する工程では、前記分割予定線に沿って貫通孔と通し孔とが交互に形成される、配線基板集合体の製造方法も含まれ得る。
【００１１】
【実施の形態】
以下において本発明の実施に好適な形態を図面と共に説明する。
図１は、本発明により製造される配線基板集合体１に関する。
同図(Ａ)はこの集合体１の平面図を示し、アルミナ等のセラミックからなる板状の本体２内に分割溝４によって上下左右に４つに区分された基板部分６を同一平面上に有する。図示で水平方向の分割溝４上に沿って長円形の貫通孔５が複数個穿設され、各貫通孔５の中央部の上縁に各基板部分６の上面７に形成された素子用の端子８の一部が接続されている。尚、各基板部分６には図示しない複数の配線パターンが形成されている。
【００１２】
図１(Ｂ)に示すように、各貫通孔５内の一対の長手面における平面視で中央部には略垂直に導体層１０が形成され、且つその上端で上記端子８の一部と導通している。また、導体層１０は各基板部分６内の配線パターンの何れかとも導通している。尚、断面Ｖ形の分割溝４は本体２の上下両面の同じ位置に形成されているが、少なくとも一方の面にのみ形成しても良い。
【００１３】
係る配線基板集合体１によれば、基板部分６の各導体層１０は貫通孔５内の左右両側部分５ａで分割溝４に沿って隣接する導体層１０と絶縁されると共に、貫通孔５を挟んで隣接する基板部分６の対向する導体層１０とも絶縁されている。
【００１４】
従って、係る集合体１の状態において、各基板部分６の上面７の中央に図示しない素子を搭載し、これと上記素子用の端子８を半田付けして導通すると、各基板部分６の配線パターンとも導通でき、上記素子を含めた各基板部分６の電気的特性を測定することが可能となる。このため、配線基板毎に分割する前に検査が集合体１上で可能となるので、検査工程の効率を高めることもできる。
しかも、各分割溝４に沿って本体２を分割して得られる各配線基板の側面における導体層１０同士間の絶縁性も確保される。
【００１５】
尚、貫通孔５の形状は上記長円形に限らず、例えば図１(Ｃ)のように横長の上記長円形の上下辺における中央部を更に略半長円形に凹ませた貫通孔５ｂ、図１(Ｄ)のように横長の長円形の上下辺における中央部を更に略半円形に凹ませた貫通孔５ｃ、又は図１(Ｅ)のように横長の楕円形の上下辺における中央部を更に略半円形に凹ませた貫通孔５ｄとすることもできる。
これらのように、貫通孔５の中央部を略半長円形、又は略半円形に更に凹ませると、後述するように貫通孔５の中央部に導体層１０となるメタライズをマスクを介して部分的に形成する際、注入するメタライズインクが濡れ広がるのを防止でき、該インクを一層容易に貫通孔５の中央部に塗布することができる。
また、図１(Ｃ)の貫通孔５ｂの図示で下辺に示すように、複数の導体層１０を互いに絶縁して併設することもできる。
【００１６】
図２は、本発明により製造される異なる形態の配線基板集合体１１に関する。
同図(Ａ)は、この集合体１１の平面図を示し、前記同様のセラミックからなる板状の本体１２内に分割溝１４によって４つに区分された基板部分１６を同一平面上に有する。図示で水平方向の分割溝１４に沿って長円形の貫通孔１５が等間隔に複数個穿設され、各貫通孔１５の上縁には各基板部分１６の上面１７に形成された素子用の端子１８の一部が繋がっている。また、各貫通孔１５，１５間には分割溝１４を遮る丸い通し孔１９が貫通されている。尚、各基板部分１６も図示しない複数の配線パターンを有している。
【００１７】
図２(Ｂ)に示すように、各貫通孔１５内の一対の長手面における平面視で中央部には垂直に導体層２０が形成され、且つその上端で上記端子１８の一部と導通している。尚、導体層２０は各基板部分５６の配線パターンとも導通している。
係る配線基板集合体１１によれば、各基板部分１６の導体層２０は貫通孔１５内の左右両側部分１５ａ及び貫通孔１５間の各通し孔１９によって互いに絶縁され、且つ各貫通孔１５を挟んで隣接する基板部分１６の対向する導体層２０とも互いに絶縁されている。
【００１８】
従って、係る集合体１１の状態のままで、各基板部分１６の上面１７中央に搭載した素子と該素子用の端子１８を半田付けして導通すると、各基板部分１６の配線パターンとも導通でき、上記素子を含めた各基板部分１６の電気的特性を測定することができる。このため、配線基板毎に分割する前の集合体１１上で検査が確実に行えるので、検査工程の効率を高めることもできる。
しかも、各分割溝１４に沿って本体１２を分割して得られる配線基板の側面における導体層２０同士間の絶縁性も確保される。
尚、図２(Ｃ)に示すように、貫通孔１５の内周面全体に円管状の導通部６０′を形成すると、係る貫通孔１５，１５間における分割溝１４上に通し孔１９を形成した参考形態の配線基板集合体１１′を得ることができる。
【００１９】
次に、上記配線基板集合体１１について、本発明の製造方法を、図３により説明する。
図３(Ａ)及び(Ａ′)は主にアルミナからなり、前記本体１２を形成するためのグリーンシート２１の断面と部分平面図を示す。
次に、図３(Ｂ)及び(Ｂ′)に示すように、各グリーンシート２１の前記分割溝１４が追って形成される分割予定線（仮想線）に沿って、複数の長円形を呈する貫通孔１５と丸い通し孔１９とがプレスによって交互に打ち抜かれる。
更に、各グリーンシート２１の上面に、タングステン（Ｗ）やモリブデン（Ｍｏ）等の高融点金属からなる導電ペーストがスクリーン印刷により所定のパターンに倣って塗布される。
【００２０】
また、図３(Ｃ)及び(Ｄ)に示すように、各シート２１の各貫通孔１５の開口部には図中の破線で示す吸引孔２２を有するマスク２３が接触され、Ｗ又はＭｏ等からなるメタライズインクを注入する。係るインクは反対側の開口部からの負圧によって吸引され、図示のように貫通孔１５内の長手面の中央部に下地メタライズ２４を形成する。尚、該メタライズ２４はシート２１の上面にも形成される。
次いで、図３(Ｅ)に示すように、各グリーンシート２１を上記貫通孔１５と通し孔１９が互いに連通するように積層し積層体２６とする。この際、貫通孔１５内の各下地メタライズ２４同士も上下に接続される。
【００２１】
更に、図３(Ｆ)に示すように、上記積層体２６における上下端のグリーンシート２１に、前記分割予定線に沿って断面Ｖ形の分割溝１４を形成する。尚、分割溝１４は、予め個別のグリーンシート２１に形成しておいても良い。
係るシート２１の積層体２６を上下方向に加圧しつつ、約１５００℃に所定時間に渉り加熱・保持して焼成し、前記図２に示すセラミックの本体１２とする。同時に、前記導電ペーストは、配線パターンや素子用の端子１８となる。また、下地メタライズ２４は下地層となる。
次いで、各貫通孔１５内の下地層に対し、マスクを介して活性化処理した上、メッキ用触媒核の付着を行う。上記活性化処理は界面活性剤を付着させ、メッキ用触媒核の付着を確保するために施す。上記メッキ用触媒核はＰｄ(パラジウム)であり、所謂キャタリストとアクセレーティング処理により付着される。
【００２２】
この際、上記Ｐｄ触媒核は、狭い分割溝１４内(特に底の部分)に残留しても通し孔１９内には残留しない。また、Ｐｄ触媒核は、貫通孔１５内においても処理液と共に流下する。最後に各下地層に対し無電解Ｎｉ及びＡｕメッキを行う。
このメッキは上記Ｐｄ触媒核が付着する部分にのみ形成されるので、各下地層及び分割溝１４内にメッキが析出しても、左右両側部分１５ａや通し孔１９には上記Ｎｉ及びＡｕメッキが析出しない。この結果、導体層２０が相互に絶縁された配線基板集合体１１を得ることができる。
【００２３】
尚、係る集合体１１を各分割溝１４に沿って破断し分割することにより、複数の配線基板が得られる。
また、上記各グリーンシート２１に貫通孔１５を打ち抜き且つ上記通し孔１９の形成を省略して、同様の各工程を施すことにより、図１の配線基板集合体１を製造でき、且つこの集合体１を分割することによっても、複数の配線基板が得られる。
【００２４】
次に、前記集合体１を分割して得られた配線基板３１について説明する。
図４(Ａ)は、本発明の製造方法により得られた配線基板３１の平面図を示す。この基板３１は、アルミナ等のセラミックからなる板状の本体３２と、この本体３２の上面(表面)３３に形成した複数の素子用の端子３４を有する。
図４(Ｂ)にも示すように、上記本体３２の側面３６には本体３２に対し半長円形に凹んだ複数の凹部３８が設けられ、この凹部３８の平面視で中央部に端子となる導体層４０が略垂直に形成されている。この導体層４０は、その上端で上記素子用の端子３４と導通すると共に、図４(Ｃ)に示すように、本体３２に内蔵される複数の配線パターン３５，３５とも導通している。
【００２５】
上記本体３２は、例えば厚さ約０．５ｍｍで、各凹部３８の側面３６に沿う長さは約１ｍｍ、その凹みは約０．３ｍｍ、各導体層４０の幅は約０．３ｍｍである。従って、導体層４０の左右には凹部３８の両側部分３９，３９が幅約０．３ｍｍずつ残っている。この凹部３８内に部分的に導体層４０を形成するには、凹部３８自体を側面３６に沿って長めにすると共に、前述したように導体層４０となる下地メタライズをマスクを介して形成することにより成される。
この配線基板３１によれば、凹部３８の中央部に導体層４０が形成され、その両側部分３９，３９によって同じ側面３６にて隣接する凹部３８内の導体層４０と確実に絶縁されるので、仮に製造工程で前記図６(Ｄ)で示した線状のメッキ層８６が生じても、導体層４０同士間の不用意な短絡を確実に防げ、その誤作動を予防できる。尚、図４(Ｄ)は、凹部３８内に導体層４０を併設した状態を示す。
【００２６】
また、前記集合体１１を分割して得られた配線基板５１について説明する。
図５(Ａ)は、前記集合体１１を分割して得た配線基板４１の平面図を示す。この基板４１は前記と同様なセラミックからなる板状の本体４２と、該本体４２の上面（表面）４３に形成した複数の素子用の端子４４を有する。
図５(Ｂ)にも示すように、上記本体４２の側面４６には本体４２に対し半長円形に凹んだ複数の凹部４８が等間隔に設けられ、この凹部４８の平面視で中央部に端子となる導体層５０が略垂直に形成されている。この導体層５０はその上端で上記素子用の端子４４と導通すると共に、本体４２の図示しない配線パターンの何れかと導通している。しかも、各導体層５０同士間の側面４６には半円形の垂直な溝部４９が上面４３から下面(裏面)に連なって設けられている。
【００２７】
上記導体層５０は、前述したように一対の凹部４８，４８を形成する前記長円形の貫通孔１５内の中央部に前述したようにメタライズインクを負圧にて吸引することで形成され、溝部４９もプレスによる打ち抜きによって形成される。
係る配線基板４１によれば、導体層５０が凹部４８の中央部に形成され、且つ凹部４８同士間の側面４６に溝部４９が形成されているので、仮に前記図６(Ｄ)の線状のメッキ層８６が生じても凹部４８の左右両側部分４８ａと溝部４９によって遮断される。従って、導体層５０同士間の不用意な短絡を確実に防げ、その誤作動を予防できる。
尚、配線基板４１の四隅における円弧４９′は基板４１が集合体１１の状態において隣接する基板部分１６とに跨って打抜かれた前記通し孔１９の跡を示す。
【００２８】
更に、前記参考形態の集合体１１′を分割して得られた参考形態の配線基板５１について説明する。
図５(Ｃ)は、参考形態の配線基板５１を示し、その側面５６に本体５２に対し半長円形に凹む複数の凹部５８が所定の間隔を置いて設けられ、この凹部５８内の全体に導体層６０が形成されている。また、この導体層６０はその上端で上面(表面)５３に形成された素子用の端子５４と導通し、本体５２の図示しない配線パターンの何れかと導通している。更に、各凹部５８同士間には厚さ方向に垂直な溝部５９が設けられている。
この配線基板５１は、側面５６における凹部５８間の溝部５９により、導体層６０同士間の不用意な短絡を一層確実に防ぎ、その誤作動を予防している。
尚、以上の各基板３１，４１，５１における図示で左右の垂直な側面にも、前記凹部３８，４８，５８や溝部４９，５９を同様に形成することもできる。
【００２９】
本発明は、以上に説明した各形態に限定されるものではない。
前記配線基板集合体の貫通孔の前記分割溝に沿うサイズを数種類形成して、比較的長く形成した貫通孔内に複数の導体層を並行して形成したり、前記配線基板の凹部も同様にして各凹部内に単数又は複数の導体層を形成することもできる。
配線基板やその集合体を形成するセラミックには、前記アルミナに限らず、窒化アルミニウム、ガラスセラミック、ムライト等を用いることもできる。
また、導体層、端子、及び配線パターンの材質も前記ＷやＭｏに限らず、ＣｕやＣｏ及びこれらをベースとする合金、Ｍｏ−Ｍｎ、Ａｇ、Ａｇ−Ｐｄ、Ａｇ−Ｐｔ等を適用することも可能である。
【００３０】
更に、前記配線基板集合体は、上記素子等を各基板部分に搭載し、且つ蓋にて密封する等の組立てを前記検査に先立って行うこともできる。
また、前記配線基板には、複数の電子部品や素子を搭載するマルチチップモジュール等の表面実装型配線基板も含まれる。更に、前記水晶振動子の他、トランジスタ、ダイオードやＥＦＴ等の素子を搭載することもできる。尚、搭載された素子等は、配線基板上において蓋により密封される。
【００３１】
【発明の効果】
以上において説明した本発明の配線基板集合体の製造方法によれば、分割溝に沿う導体層同士及び貫通孔に臨む各基板部分の導体層同士とが互いに絶縁され、各基板部分の電気的特性の測定が確実に効率良く行えると共に、各基板部分における素子等の組み立ても効率良く行い得る配線基板集合体を確実に提供することができる。
【図面の簡単な説明】
【図１】(Ａ)は本発明により得られる配線基板集合体の一形態を示す平面図、(Ｂ)は(Ａ)中の一点鎖線で示す部分Ｂの部分斜視図、(Ｃ)乃至(Ｅ)は貫通孔の異なる形態を示す部分平面図。
【図２】(Ａ)は本発明により得られる配線基板集合体の異なる形態を示す平面図、(Ｂ)は(Ａ)中の一点鎖線部分Ｂの部分斜視図、(Ｃ)は参考形態の配線基板集合体を示す部分斜視図。
【図３】本発明による配線基板集合体の製造工程を示す概略断面図又は部分図。
【図４】(Ａ)は本発明により得られた配線基板の一形態を示す平面図、(Ｂ)は(Ａ)中の一点鎖線で示す部分Ｂの部分斜視図、(Ｃ)は(Ｂ)中におけるＣ−Ｃ断面図、(Ｄ)は異なる態様の部分斜視図。
【図５】(Ａ)は本発明により得られた配線基板の異なる形態を示す平面図、(Ｂ)は(Ａ)中の一点鎖線部分Ｂの部分斜視図、(Ｃ)は参考形態の配線基板を示す部分斜視図。
【図６】(Ａ)は従来の配線基板集合体を示す平面図、(Ｂ)は(Ａ)中の一点鎖線で示す部分Ｂの部分斜視図、(Ｃ)は(Ｂ)中におけるＣ−Ｃ断面を含む部分斜視図、(Ｄ)は従来の配線基板の側面を含む部分斜視図。
【符号の説明】
１，１１……………………………配線基板集合体
４，１４……………………………分割溝
５，５ｂ〜５ｄ，１５……………貫通孔
６，１６……………………………基板部分
１０，２０，３０，４０，５０…導体層
１９…………………………………通し孔
２１…………………………………グリーンシート
２４…………………………………下地メタライズ層
２６…………………………………積層体
３１，４１…………………………配線基板[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a manufacturing method of the wiring board assembly having a plurality of substrate portions comprising a plurality of wiring boards.
[0002]
[Prior art]
In general, ceramic multilayer wiring boards are mass-produced by taking a large number of pieces. In the state of the assembly of a plurality of such wiring boards, an element such as a crystal resonator is mounted on the upper surface of each wiring board and the electrical characteristics are individually measured. A substrate may be obtained.
[0003]
An assembly 70 of such ceramic multilayer wiring boards includes, for example, a plurality of substrate portions 72 partitioned by dividing grooves 74 and through holes formed vertically on the dividing grooves 74 as shown in the plan view of FIG. A hole 76 and an element terminal 78 partially connected to the through hole 76 are provided. Each substrate portion 72 is divided along the dividing groove 74 to become an individual wiring board. The terminal 78 is electrically connected to an element mounted on the upper surface of the substrate portion 72.
Further, as shown in FIG. 6 (B), the entire inner peripheral surface of the through hole 76 is soldered to the mother board following the wiring pattern of each substrate portion 72, so that it has a hollow tubular shape. A conductive portion 80 is formed.
[0004]
In this case, as shown in FIG. 6C, the wiring patterns 73 are electrically connected to each other between the substrate portions 72 adjacent to each other with the dividing groove 74 interposed therebetween.
For this reason, even if an element such as a crystal resonator is fixed to the element mounting portion on the upper surface of each substrate portion 72 in the aggregate 70 and this element is electrically connected to the terminal 78, the electrical properties of the individual substrate portions 72 are not affected. In some cases, characteristics cannot be measured accurately. If the electrical characteristics of each substrate portion 72 cannot be measured in the state of the aggregate 70, the inspection efficiency is also lowered.
[0005]
In addition, in order to obtain a conductive portion 80 that becomes an external terminal after being divided in the through-hole 76, the Pd catalyst nucleus or the like is applied to the base metallization before the electroless plating of Ni and Au together with the element terminal 78. An activation treatment is applied to adhere the. At this time, Pd catalyst nuclei also adhere to the bottom of the dividing groove 74 having a V-shaped cross section, so that Ni and Au plating layers are formed linearly along the bottom of the dividing groove 74.
As a result, as shown in FIG. 6D, when divided into each substrate portion 72 along the dividing groove 74, the adjacent semicircular concave external terminals 84 on the side surfaces 82 are linear Ni and Au. There is a case where a short circuit occurs through the plating layer 86, causing a problem that obstructs the original circuit formation.
[0006]
[Problems to be Solved by the Invention]
The present invention solves the above-described problems in the prior art, and provides a method for manufacturing a wiring board assembly that enables measurement of electrical characteristics of a board portion to be an individual wiring board in the state of the wiring board assembly. The purpose is to provide.
[0007]
[Means for Solving the Problems]
In order to solve the above-mentioned problems, the present invention forms a plurality of conductor layers formed in the through holes of the wiring board assembly separately for each adjacent board portion, and conductors on the side surfaces of the divided wiring board The idea is to break the short circuit between layers.
That is, according to the method for manufacturing a wiring board assembly of the present invention (claim 1), a plurality of green sheets serving as the wiring board assembly are arranged along a planned dividing line formed by dividing grooves for dividing a plurality of substrate portions. Forming a substantially oval or substantially elliptical through-hole having a major axis parallel to the planned dividing line, and an inner peripheral surface of each of the through-holes in the plurality of green sheets and away from the planned dividing line. forming a plurality of base metallization on the position of each substrate portion facing Te, the steps of the plurality of green sheets above through hole to form a laminate stacked so and the underlying metallization is connected communicated a step of forming the dividing lines dividing groove along in the laminate, a step of firing the laminate, is the underlying metallized ceramic body obtained by firing according fired And forming a conductive layer by plating into the formation, and characterized in that.
[0008]
According to this, the wiring pattern of each substrate portion is insulated from the wiring pattern of the adjacent substrate portion, and the plurality of conductor layers on the dividing grooves of each substrate portion are also insulated, so that the plurality of substrate portions are aggregated. It is possible to reliably provide a wiring board assembly that can measure the respective electrical characteristics in the state of the body .
[0009]
The substrate portion refers to a portion in the assembly that becomes an individual wiring substrate after division.
Further, the above-mentioned divided grooves include intersections of the grooves, corners of each groove, and bent portions.
[0010]
Furthermore, the present invention may include a method for manufacturing a wiring board assembly in which in the step of forming the through hole, the through hole and the through hole are alternately formed along the planned dividing line.
[0011]
Embodiment
In the following, preferred embodiments of the present invention will be described with reference to the drawings.
FIG. 1 relates to a wiring board assembly 1 manufactured according to the present invention.
FIG. 1A shows a plan view of the assembly 1. In the plate-like main body 2 made of ceramic such as alumina, the substrate portions 6 divided into four parts vertically and horizontally by the dividing grooves 4 are arranged on the same plane. Have. In the drawing, a plurality of oval through-holes 5 are formed along the horizontal dividing grooves 4, and the element is formed on the upper surface 7 of each substrate portion 6 at the upper edge of the central portion of each through-hole 5. A part of the terminal 8 is connected. Each substrate portion 6 is formed with a plurality of wiring patterns (not shown).
[0012]
As shown in FIG. 1 (B), a conductor layer 10 is formed substantially vertically in the central portion in a plan view of a pair of longitudinal surfaces in each through-hole 5, and is electrically connected to a part of the terminal 8 at the upper end thereof. is doing. Further, the conductor layer 10 is electrically connected to any of the wiring patterns in each substrate portion 6. The dividing groove 4 having a V-shaped cross section is formed at the same position on both the upper and lower surfaces of the main body 2, but may be formed only on at least one surface.
[0013]
According to the wiring board assembly 1, each conductor layer 10 of the substrate portion 6 is insulated from the adjacent conductor layer 10 along the dividing groove 4 by the left and right side portions 5 a in the through hole 5, and the through hole 5 The opposing conductor layers 10 of the substrate portions 6 adjacent to each other are also insulated.
[0014]
Accordingly, in the state of the assembly 1, an element (not shown) is mounted at the center of the upper surface 7 of each substrate portion 6, and when this is soldered to the element terminal 8, the wiring pattern of each substrate portion 6 is obtained. The electrical characteristics of each substrate portion 6 including the above elements can be measured. For this reason, since the inspection can be performed on the assembly 1 before dividing each wiring board, the efficiency of the inspection process can be increased.
In addition, insulation between the conductor layers 10 on the side surface of each wiring board obtained by dividing the main body 2 along each dividing groove 4 is also ensured.
[0015]
The shape of the through hole 5 is not limited to the oval shape. For example, as shown in FIG. 1C, the through hole 5b in which the central portion of the upper and lower sides of the horizontally long oval shape is further recessed into a substantially semi-oval shape. A through hole 5c in which the central part of the upper and lower sides of a horizontally long oval is further recessed into a substantially semicircular shape as shown in FIG. 1 (D), or the central part of the upper and lower sides of a horizontally long ellipse as shown in FIG. Furthermore, it can also be set as the through-hole 5d dented in the substantially semicircle.
As described above, when the central portion of the through-hole 5 is further recessed into a substantially semi-oval shape or a substantially semi-circular shape, the metallization that becomes the conductor layer 10 is partly provided through the mask in the central portion of the through-hole 5 as will be described later. Therefore, the metallized ink to be injected can be prevented from getting wet and spread, and the ink can be applied to the central portion of the through hole 5 more easily.
Further, as shown in the lower side of the through hole 5b in FIG. 1C, a plurality of conductor layers 10 can be insulated and provided side by side.
[0016]
FIG. 2 relates to a different form of wiring board assembly 11 manufactured according to the present invention .
FIG. 1A shows a plan view of the aggregate 11, which has a substrate portion 16 divided into four by dividing grooves 14 in a plate-like main body 12 made of the same ceramic as described above. In the figure, a plurality of oval through holes 15 are formed at equal intervals along the horizontal dividing grooves 14, and the upper edge of each through hole 15 is for an element formed on the upper surface 17 of each substrate portion 16. A part of the terminal 18 is connected. A round through hole 19 that blocks the dividing groove 14 is passed between the through holes 15 and 15. Each substrate portion 16 also has a plurality of wiring patterns (not shown).
[0017]
As shown in FIG. 2 (B), a conductor layer 20 is vertically formed in the central portion in a plan view of a pair of longitudinal surfaces in each through-hole 15, and is electrically connected to a part of the terminal 18 at the upper end thereof. ing. The conductor layer 20 is also electrically connected to the wiring pattern of each substrate portion 56.
According to the wiring board assembly 11, the conductor layer 20 of each board portion 16 is insulated from each other by the left and right side portions 15 a in the through hole 15 and the through holes 19 between the through holes 15, and sandwiches the through holes 15. The opposing conductor layers 20 of the adjacent substrate portions 16 are also insulated from each other.
[0018]
Therefore, when the element mounted on the center of the upper surface 17 of each substrate portion 16 and the terminal 18 for the element are soldered and conducted in the state of the aggregate 11, the wiring pattern of each substrate portion 16 can be conducted. The electrical characteristics of each substrate portion 16 including the element can be measured. For this reason, since the inspection can be reliably performed on the assembly 11 before being divided for each wiring board, the efficiency of the inspection process can be increased.
In addition, insulation between the conductor layers 20 on the side surface of the wiring board obtained by dividing the main body 12 along each dividing groove 14 is also ensured.
As shown in FIG. 2 (C), when a circular conducting portion 60 ′ is formed on the entire inner peripheral surface of the through hole 15, a through hole 19 is formed on the dividing groove 14 between the through holes 15 and 15. Thus, the wiring board assembly 11 ′ in the reference form can be obtained.
[0019]
Next, the manufacturing method of the present invention for the wiring board assembly 11 will be described with reference to FIG .
3 (A) and 3 (A ′) are mainly made of alumina, and show a cross section and a partial plan view of the green sheet 21 for forming the main body 12.
Next, as shown in FIGS. 3 (B) and 3 (B '), a plurality of oval penetrations are formed along the planned dividing lines (virtual lines) formed by the dividing grooves 14 of each green sheet 21 later. The holes 15 and the round through holes 19 are punched alternately by pressing.
Furthermore, a conductive paste made of a refractory metal such as tungsten (W) or molybdenum (Mo) is applied to the upper surface of each green sheet 21 by screen printing following a predetermined pattern.
[0020]
Further, as shown in FIGS. 3C and 3D, a mask 23 having a suction hole 22 indicated by a broken line in the drawing is brought into contact with the opening of each through hole 15 of each sheet 21, and W or Mo or the like is contacted. Inject metallized ink consisting of The ink is sucked by the negative pressure from the opening on the opposite side, and forms a base metallization 24 at the center of the longitudinal surface in the through hole 15 as shown. The metallization 24 is also formed on the upper surface of the sheet 21.
Next, as shown in FIG. 3E, the green sheets 21 are laminated so that the through holes 15 and the through holes 19 communicate with each other to form a laminated body 26. At this time, the base metallizations 24 in the through holes 15 are also connected to each other in the vertical direction.
[0021]
Further, as shown in FIG. 3 (F), the dividing grooves 14 having a V-shaped cross section are formed on the upper and lower green sheets 21 of the laminate 26 along the planned dividing line. The dividing grooves 14 may be formed in advance on the individual green sheets 21.
The laminated body 26 of the sheet 21 is heated and held at about 1500 ° C. for a predetermined time while being pressed in the vertical direction, and fired to obtain the ceramic body 12 shown in FIG. At the same time, the conductive paste becomes a wiring pattern or an element terminal 18. The base metallization 24 becomes a base layer.
Next, the base layer in each through-hole 15 is activated through a mask, and then a catalyst core for plating is attached. The activation treatment is performed to adhere a surfactant and ensure adhesion of the catalyst core for plating. The plating catalyst nucleus is Pd (palladium), and is deposited by a so-called catalyst and an acceleration treatment.
[0022]
At this time, the Pd catalyst nucleus does not remain in the through hole 19 even if it remains in the narrow dividing groove 14 (particularly the bottom portion). Further, the Pd catalyst nucleus also flows down with the processing liquid in the through hole 15. Finally, electroless Ni and Au plating is performed on each underlayer.
Since this plating is formed only on the portion where the Pd catalyst nucleus adheres, even if the plating is deposited in each of the underlayers and the division grooves 14, the left and right side portions 15a and the through holes 19 are not covered with the Ni and Au plating. It does not precipitate. As a result, the wiring board assembly 11 in which the conductor layers 20 are insulated from each other can be obtained.
[0023]
A plurality of wiring boards can be obtained by breaking and dividing the aggregate 11 along the dividing grooves 14.
Moreover, the wiring board assembly 1 of FIG. 1 can be manufactured by punching the through holes 15 in the respective green sheets 21 and omitting the formation of the through holes 19 and performing the same processes, and this assembly. A plurality of wiring boards can also be obtained by dividing 1.
[0024]
Next, the wiring board 31 obtained by dividing the assembly 1 will be described.
FIG. 4A shows a plan view of the wiring board 31 obtained by the manufacturing method of the present invention. The substrate 31 has a plate-like main body 32 made of ceramic such as alumina, and a plurality of element terminals 34 formed on the upper surface (surface) 33 of the main body 32.
As shown in FIG. 4B, the side surface 36 of the main body 32 is provided with a plurality of concave portions 38 that are recessed in a semi-oval shape with respect to the main body 32, and serves as a terminal at the center portion of the concave portion 38 in plan view. The conductor layer 40 is formed substantially vertically. The conductor layer 40 is electrically connected to the element terminal 34 at the upper end thereof, and is also electrically connected to a plurality of wiring patterns 35 and 35 built in the main body 32 as shown in FIG.
[0025]
The main body 32 has a thickness of about 0.5 mm, for example, the length along the side surface 36 of each recess 38 is about 1 mm, the recess is about 0.3 mm, and the width of each conductor layer 40 is about 0.3 mm. Therefore, the left and right sides of the conductor layer 40 have both side portions 39, 39 of the recess 38 each having a width of about 0.3 mm. In order to partially form the conductor layer 40 in the recess 38, the recess 38 itself is elongated along the side surface 36, and the base metallization that becomes the conductor layer 40 is formed through the mask as described above. It is made by.
According to this wiring board 31, the conductor layer 40 is formed at the center of the recess 38, and is reliably insulated from the conductor layer 40 in the recess 38 adjacent on the same side surface 36 by both side portions 39, 39. Even if the linear plating layer 86 shown in FIG. 6D is generated in the manufacturing process, an inadvertent short circuit between the conductor layers 40 can be surely prevented, and the malfunction can be prevented. FIG. 4D shows a state where the conductor layer 40 is provided in the recess 38.
[0026]
The wiring board 51 obtained by dividing the assembly 11 will be described.
FIG. 5A shows a plan view of a wiring board 41 obtained by dividing the assembly 11. The substrate 41 has a plate-like main body 42 made of the same ceramic as described above, and a plurality of element terminals 44 formed on the upper surface (surface) 43 of the main body 42.
As shown in FIG. 5B, the side surface 46 of the main body 42 is provided with a plurality of concave portions 48 which are recessed in a semi-oval shape with respect to the main body 42 at equal intervals. A conductor layer 50 serving as a terminal is formed substantially vertically. The conductor layer 50 is electrically connected to the element terminal 44 at the upper end thereof, and is electrically connected to one of the wiring patterns (not shown) of the main body 42. In addition, a semicircular vertical groove 49 is provided on the side surface 46 between the conductor layers 50 so as to continue from the upper surface 43 to the lower surface (back surface).
[0027]
As described above, the conductor layer 50 is formed by sucking the metallized ink with a negative pressure in the central portion of the oval through-hole 15 forming the pair of recesses 48, as described above. 49 is also formed by punching with a press.
According to the wiring board 41, since the conductor layer 50 is formed in the central portion of the recess 48 and the groove portion 49 is formed in the side surface 46 between the recesses 48, the linear shape shown in FIG. Even if the plated layer 86 is formed, it is blocked by the left and right side portions 48 a of the recess 48 and the groove 49. Therefore, an inadvertent short circuit between the conductor layers 50 can be surely prevented, and the malfunction can be prevented.
Note that arcs 49 ′ at the four corners of the wiring board 41 indicate the traces of the through holes 19 that are punched across the board portions 16 adjacent to each other when the board 41 is in the state of the assembly 11.
[0028]
Furthermore, the wiring board 51 of the reference form obtained by dividing the assembly 11 ′ of the reference form will be described.
FIG. 5C shows a wiring board 51 of a reference form, and a plurality of concave portions 58 that are recessed in a semi-oval shape with respect to the main body 52 are provided on the side surface 56 at a predetermined interval. A conductor layer 60 is formed. In addition, the conductor layer 60 is electrically connected to an element terminal 54 formed on the upper surface (surface) 53 at the upper end thereof, and is electrically connected to one of the wiring patterns (not shown) of the main body 52. Further, a groove portion 59 perpendicular to the thickness direction is provided between the concave portions 58.
In this wiring board 51, an inadvertent short circuit between the conductor layers 60 is more reliably prevented by the groove 59 between the recesses 58 on the side surface 56, and malfunction is prevented.
The concave portions 38, 48, 58 and the groove portions 49, 59 can be similarly formed on the left and right vertical side surfaces of the substrates 31, 41, 51 shown in the drawing.
[0029]
The present invention is not limited to the embodiments described above.
Several sizes of the through holes of the wiring board assembly are formed along the dividing grooves, and a plurality of conductor layers are formed in parallel in the relatively long through holes, and the recesses of the wiring board are similarly formed. It is also possible to form one or more conductor layers in each recess.
The ceramic forming the wiring board and the aggregate thereof is not limited to alumina, and aluminum nitride, glass ceramic, mullite, and the like can also be used.
Also, the material of the conductor layer, terminal, and wiring pattern is not limited to W or Mo, but Cu, Co, alloys based on these, Mo-Mn, Ag, Ag-Pd, Ag-Pt, etc. are applied. Is also possible.
[0030]
Furthermore, the wiring board assembly can be assembled prior to the inspection, such as mounting the above elements on each board portion and sealing with a lid.
The wiring board also includes a surface mount wiring board such as a multichip module on which a plurality of electronic components and elements are mounted. Further, in addition to the crystal resonator, elements such as a transistor, a diode, and an EFT can be mounted. The mounted elements and the like are sealed with a lid on the wiring board.
[0031]
【The invention's effect】
According to the method for manufacturing a wiring board assembly of the present invention described above, the conductor layers along the dividing grooves and the conductor layers of each board part facing the through hole are insulated from each other, and the electrical characteristics of each board part Thus, it is possible to reliably provide a wiring board assembly capable of efficiently and efficiently assembling elements and the like in each board portion .
[Brief description of the drawings]
1A is a plan view showing an embodiment of a wiring board assembly obtained by the present invention, FIG. 1B is a partial perspective view of a portion B indicated by a one-dot chain line in FIG. 1A, and FIGS. E) is a partial plan view showing different forms of through holes.
2A is a plan view showing different forms of a wiring board assembly obtained according to the present invention, FIG. 2B is a partial perspective view of a one-dot chain line part B in FIG. 2A, and FIG. 2C is a reference form; The partial perspective view which shows a wiring board aggregate | assembly.
FIG. 3 is a schematic sectional view or a partial view showing a manufacturing process of a wiring board assembly according to the present invention .
4A is a plan view showing one embodiment of a wiring board obtained by the present invention, FIG. 4B is a partial perspective view of a portion B indicated by a one-dot chain line in FIG. 4A, and FIG. CC sectional drawing in the inside, (D) is a fragmentary perspective view of a different aspect.
[5] (A) is a plan view showing different forms of the wiring board obtained by the present invention, (B) is a partial perspective view of the one-dot chain line portion B in (A), (C) the wire reference embodiment The fragmentary perspective view which shows a board | substrate.
6A is a plan view showing a conventional wiring board assembly, FIG. 6B is a partial perspective view of a portion B indicated by a one-dot chain line in FIG. 6A, and FIG. The fragmentary perspective view containing C cross section, (D) is the fragmentary perspective view containing the side surface of the conventional wiring board.
[Explanation of symbols]
1, 11 ……………………………… Wiring board assembly 4, 14 …………………………… Divided grooves 5, 5 b to 5 d, 15 ………… Through hole 6 16 ……………………………… Substrate portion 10, 20, 30, 40, 50… Conductive layer 19 ………………………………… Through hole 21 ………………… ……………… Green Sheet 24 ………………………………… Underly Metallized Layer 26 …………………………………… Laminated 31, 41 ……………… ………… Wiring board

Claims

In a plurality of green sheets to be a wiring board assembly, along the planned dividing line formed by dividing the dividing grooves for dividing the plurality of substrate portions, the divided line and the major axis are substantially oval or substantially elliptical in parallel. Forming a through hole of
Forming a plurality of base metallization on the position of each substrate portion facing away from and the dividing line in the inner circumferential surface of each the through hole in the plurality of green sheets,
A step of laminating the plurality of green sheets so that the through holes communicate with each other and the base metallization is connected ;
Forming a dividing groove along the planned dividing line in the laminate ,
Firing the laminate ,
Forming a conductor layer by plating the base layer on which the base metallization of the ceramic body obtained by the firing is fired ,
A method of manufacturing a wiring board assembly.