JP3995559B2 - 半導体装置の製造方法およびそれに使用されるボンディング装置 - Google Patents
半導体装置の製造方法およびそれに使用されるボンディング装置 Download PDFInfo
- Publication number
- JP3995559B2 JP3995559B2 JP2002242455A JP2002242455A JP3995559B2 JP 3995559 B2 JP3995559 B2 JP 3995559B2 JP 2002242455 A JP2002242455 A JP 2002242455A JP 2002242455 A JP2002242455 A JP 2002242455A JP 3995559 B2 JP3995559 B2 JP 3995559B2
- Authority
- JP
- Japan
- Prior art keywords
- chip
- bonding
- head
- bonding head
- semiconductor chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
Landscapes
- Wire Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002242455A JP3995559B2 (ja) | 2002-08-22 | 2002-08-22 | 半導体装置の製造方法およびそれに使用されるボンディング装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002242455A JP3995559B2 (ja) | 2002-08-22 | 2002-08-22 | 半導体装置の製造方法およびそれに使用されるボンディング装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2004087529A JP2004087529A (ja) | 2004-03-18 |
| JP2004087529A5 JP2004087529A5 (cg-RX-API-DMAC7.html) | 2005-11-04 |
| JP3995559B2 true JP3995559B2 (ja) | 2007-10-24 |
Family
ID=32051535
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002242455A Expired - Fee Related JP3995559B2 (ja) | 2002-08-22 | 2002-08-22 | 半導体装置の製造方法およびそれに使用されるボンディング装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3995559B2 (cg-RX-API-DMAC7.html) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4933166B2 (ja) * | 2006-06-23 | 2012-05-16 | 東レエンジニアリング株式会社 | 実装装置 |
| JP7382170B2 (ja) * | 2019-08-02 | 2023-11-16 | ローム株式会社 | 半導体装置 |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2538058B2 (ja) * | 1989-06-21 | 1996-09-25 | 松下電子工業株式会社 | 半導体チップのパタ―ン認識方法 |
| JPH06140470A (ja) * | 1992-10-28 | 1994-05-20 | Fujitsu Ltd | フリップチップボンディング装置 |
| JP3255065B2 (ja) * | 1997-01-22 | 2002-02-12 | 松下電器産業株式会社 | チップの搭載装置 |
| JPH118345A (ja) * | 1997-06-17 | 1999-01-12 | Casio Comput Co Ltd | マルチチップモジュールの接合構造とその製造方法 |
| JPH1167795A (ja) * | 1997-08-08 | 1999-03-09 | Nec Corp | 半導体チップ搭載装置及び半導体チップ搭載方法並びに半導体装置 |
| JP2002118153A (ja) * | 2000-10-11 | 2002-04-19 | Toshiba Corp | 電子部品の製造方法及び実装装置 |
-
2002
- 2002-08-22 JP JP2002242455A patent/JP3995559B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2004087529A (ja) | 2004-03-18 |
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