JP3979797B2 - 電子部品実装済部品の製造方法、電子部品実装済完成品の製造方法、及び半導体部品実装済完成品 - Google Patents
電子部品実装済部品の製造方法、電子部品実装済完成品の製造方法、及び半導体部品実装済完成品 Download PDFInfo
- Publication number
- JP3979797B2 JP3979797B2 JP2001183185A JP2001183185A JP3979797B2 JP 3979797 B2 JP3979797 B2 JP 3979797B2 JP 2001183185 A JP2001183185 A JP 2001183185A JP 2001183185 A JP2001183185 A JP 2001183185A JP 3979797 B2 JP3979797 B2 JP 3979797B2
- Authority
- JP
- Japan
- Prior art keywords
- electronic component
- component mounted
- manufacturing
- finished product
- circuit pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
- H10W72/01221—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using local deposition
- H10W72/01225—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using local deposition in solid form, e.g. by using a powder or by stud bumping
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001183185A JP3979797B2 (ja) | 2001-06-18 | 2001-06-18 | 電子部品実装済部品の製造方法、電子部品実装済完成品の製造方法、及び半導体部品実装済完成品 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001183185A JP3979797B2 (ja) | 2001-06-18 | 2001-06-18 | 電子部品実装済部品の製造方法、電子部品実装済完成品の製造方法、及び半導体部品実装済完成品 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2003008167A JP2003008167A (ja) | 2003-01-10 |
| JP2003008167A5 JP2003008167A5 (https=) | 2005-05-19 |
| JP3979797B2 true JP3979797B2 (ja) | 2007-09-19 |
Family
ID=19023165
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001183185A Expired - Fee Related JP3979797B2 (ja) | 2001-06-18 | 2001-06-18 | 電子部品実装済部品の製造方法、電子部品実装済完成品の製造方法、及び半導体部品実装済完成品 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3979797B2 (https=) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070075436A1 (en) | 2003-10-06 | 2007-04-05 | Nec Corporation | Electronic device and manufacturing method of the same |
-
2001
- 2001-06-18 JP JP2001183185A patent/JP3979797B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2003008167A (ja) | 2003-01-10 |
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