JP3934565B2 - Semiconductor device - Google Patents

Semiconductor device Download PDF

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Publication number
JP3934565B2
JP3934565B2 JP2003044335A JP2003044335A JP3934565B2 JP 3934565 B2 JP3934565 B2 JP 3934565B2 JP 2003044335 A JP2003044335 A JP 2003044335A JP 2003044335 A JP2003044335 A JP 2003044335A JP 3934565 B2 JP3934565 B2 JP 3934565B2
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JP
Japan
Prior art keywords
semiconductor device
post
semiconductor chip
semiconductor
heat
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2003044335A
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Japanese (ja)
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JP2004253703A (en
Inventor
英明 吉村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
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Fujitsu Ltd
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Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2003044335A priority Critical patent/JP3934565B2/en
Priority to EP04250449A priority patent/EP1450402A1/en
Priority to KR1020040006251A priority patent/KR20040075714A/en
Priority to US10/772,252 priority patent/US7199467B2/en
Publication of JP2004253703A publication Critical patent/JP2004253703A/en
Priority to US11/235,269 priority patent/US20060019430A1/en
Priority to US11/235,270 priority patent/US7115444B2/en
Priority to US11/654,555 priority patent/US7381592B2/en
Application granted granted Critical
Publication of JP3934565B2 publication Critical patent/JP3934565B2/en
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
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    • H01L2924/16195—Flat cap [not enclosing an internal cavity]

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Description

【０００１】
【発明の属する技術分野】
本発明は半導体装置に係り、特に半導体チップから発生する熱の放熱効率の向上を図った半導体装置に関する。
【０００２】
近年、半導体チップが高集積化してきており、また、半導体装置の実装の高密度化が要求されてきている。そこで、ＱＦＰ(Quad Flat Package) 型半導体装置に比べて、外部接続端子（バンプ，ランド等）の狭ピッチ化を図ることができるＢＧＡ型半導体装置及びＬＧＡ型半導体装置が注目され、また実用されるようになってきている。
【０００３】
また、半導体チップの高集積化に伴い半導体素子の発熱量が増えてきており、よって半導体装置の放熱特性を向上させる必要がある。
【０００４】
【従来の技術】
従来から、外部接続端子の狭ピッチ化及び放熱特性の向上を図った半導体装置が各種提案されている（例えば特許文献１〜４）。図１は、従来の放熱特性の向上を図った半導体装置の一例を示している。同図に示す半導体装置１はＦＣ−ＢＧＡ(Flip Chip Bump Grid Array package)構造とされており、大略すると半導体チップ２，パッケージ基板３，放熱部材４，半田ボール５等により構成されている。
【０００５】
半導体チップ２は、パッケージ基板３の上面にフリップチップ実装されている。また、パッケージ基板３の下面には、外部接続端子として機能する半田ボール５が配設されている。パッケージ基板３は多層基板であり、半導体チップ２と半田ボール５は、この内部配線により電気的に接続された構成となっている。
【０００６】
また、放熱部材４は半導体チップ２を保護するリッドとして機能すると共に、半導体チップ２で発生した熱を放熱する放熱板としても機能するものである。よって、半導体チップ２と放熱部材４は熱的に接続する必要があるが、従来では熱的接続部材６（以下、単に接続部材という）を用いて半導体チップ２の背面と放熱部材４の内面を熱的に接続することが行なわれていた。
【０００７】
この際、半導体チップ２の背面から放熱部材４への熱伝達機構としては、従来では次に述べる二つの方法が一般的であった。
【０００８】
(a) 半導体チップ２と放熱部材４の材質差による熱膨張率のミスマッチによる信頼度低下を防止するため、接続部材６として応力緩和性のあるグリス（コンパウンド）、或いは熱伝導性の接着剤などの熱媒体を用い、これを半導体チップ２と放熱部材４との間に配設する方法（図１に図示した方法）
(b) 半導体チップ２の熱膨張率に近い熱膨張率を有した材料（例えば、Cu-W、カーボンとＡｌの複合材料等）を半導体チップ２と放熱部材４との間で半田接合する方法
【特許文献１】
特開昭５７−１７６７５０号公報
【０００９】
【特許文献２】
特開平０１−１１７０４９号公報
【００１０】
【特許文献３】
特開平１０−０５０７７０号公報
【００１１】
【特許文献４】
特開平１１−０６７９９８号公報
【００１２】
【発明が解決しようとする課題】
しかしながら、上記した(a)の方法では、グリス（コンパウンド）或いは熱伝導性接着剤は熱抵抗が大きいため、半導体チップ２から放熱部材４に効率よく熱伝導が行なわれないという問題点があった。
また、上記した(b)の方法では、半導体チップ２の熱膨張率に近い熱膨張率を有した材料として、例えば、Cu-W、カーボンとＡｌの複合材料等を用いるが、これらの材料は放熱性の良好なCu等と比較して熱伝導材料の熱伝導率が低くなる。このため上記の(b)の方法は、主に半導体チップ２の発熱量が比較的に低いパッケージにしか適用することができなかった。
【００１３】
本発明は上記の点に鑑みてなされたものであり、半導体素子で発生する熱を確実に放熱すると共に装置内部で発生する応力の低減を図り得る半導体装置を提供することを目的とする。
【００１４】
【課題を解決するための手段】
上記の課題を解決するために本発明では、次に述べる各手段を講じたことを特徴とするものである。
【００２５】
請求項１記載の発明は、
半導体素子と、
該半導体素子で発生する熱を放熱する放熱部材と、
前記半導体素子と前記放熱部材を熱的に接続する接続部材とを有し、
前記接続部材を金属により形成すると共に、変形することにより前記半導体素子と前記放熱部材との間に発生する応力を吸収する構成とし、
かつ、該接続部材と前記半導体素子とを金属接合した半導体装置であって、
前記接続部材を変形可能な構成とされた複数のポストを有する構成とすると共に、前記複数のポストの長さを、中心部における長さに対し、外周部における長さを長く設定したことを特徴とするものである。
【００２６】
また、請求項２記載の発明は、
請求項１記載の半導体装置において、
前記複数のポストの断面積を、中心部における断面積に対し、外周部における断面積が小さくなるよう設定したことを特徴とするものである。
【００２７】
また、請求項３記載の発明は、
請求項１または２記載の半導体装置において、
前記複数のポストの配設密度を、中心部における配設密度に対し、外周部における配設密度が低くなるよう設定したことを特徴とするものである。
【００２８】
上記の請求項１乃至３記載の発明によれば、応力の発生量が少ない中心部においては接続部材の剛性は高く、応力の発生量が大きい外周部では接続部材の剛性は低く撓み易い。よって、ポストは応力の発生量に対応した可撓を行なうため、半導体素子と放熱部材との間に発生する応力を効率よくかつ確実に吸収することができる。
【００２９】
また、請求項４記載の発明は、
請求項１乃至３のいずれか１項に記載の半導体装置において、
前記接続部材を前記放熱部材と一体化したことを特徴とするものである。
【００３０】
上記発明によれば、接続部材と前記放熱部材とが一体化されることにより、半導体装置の構成を簡単化することができる。
【００３３】
【発明の実施の形態】
次に本発明の実施の形態について図面と共に説明する。
図２は、本発明の第１実施例である半導体装置１０Ａを示している。同図に示す半導体装置１０ＡはＦＣ−ＢＧＡ構造とされており、大略すると半導体チップ１２，パッケージ基板１３，放熱部材１４Ａ，半田ボール１５，及び接続部材１６Ａ等により構成されている。
【００３４】
半導体チップ１２は、パッケージ基板１３の上面にバンプ１７を用いてフリップチップ実装されている。この半導体チップ１２とパッケージ基板１３との間には、半導体チップ１２とパッケージ基板１３との熱膨張差に起因した応力がバンプ１７に集中するのを防止するため、アンダーフィルレジン１８が配設されている。また、半導体チップ１２の背面には、図３に拡大して示すように、金属層２２が形成されている。この金属層２２は、後述するポスト２０が接合材２３を介して接合される。
【００３５】
パッケージ基板１３は、その下面に外部接続端子として機能する半田ボール１５が配設されている。このパッケージ基板１３は多層配線基板であり、半導体チップ２と半田ボール１５は、この内部配線により電気的に接続される構成となっている。
【００３６】
放熱部材１４Ａは、熱伝導性のよい銅（Cu），アルミニウム（Al），これらをベースとした複合材料、或いはカーボン複合材料により形成されている。本実施例では、放熱部材１４Ａの材料としてＣｕを用いている。この際、表面の酸化を防止するため、放熱部材１４Ａの表面に酸化防止膜を形成する構成としてもよい。
【００３７】
この放熱部材１４Ａは、半導体チップ１２を保護するリッドとして機能すると共に、半導体チップ１２で発生した熱を放熱する放熱板としても機能するものである。よって、放熱部材１４Ａの内部にはキャビティ１９が形成されており、半導体チップ１２及び後述する接続部材１６Ａは、このキャビティ１９内に位置した構成となっている。
【００３８】
また、放熱部材１４Ａは半導体チップ１２で発生した熱を放熱する放熱板としても機能するものであるたため、半導体チップ１２と放熱部材１４とを熱的に接続する必要がある。本実施例では、半導体チップ１２と放熱部材１４とを熱的接続部材１６Ａ（以下、単に接続部材という）を用いて熱的に接続した構成としている。よって、半導体チップ１２で発生した熱は、接続部材１６Ａを介して放熱部材１４Ａに熱伝達され、放熱部材１４Ａにおいて放熱される。
【００３９】
本実施例に係る接続部材１６Ａは、放熱部材１４Ａに一体的に形成された複数のポスト２０と、この複数のポスト２０間の隙間に配設された樹脂材２１とにより構成されている。ポスト２０は、前記した放熱部材１４Ａと一体的に形成されるため、その材質は熱伝導率の高いＣｕである。また、Ｃｕは変形し易い材料でもあるため、よってポスト２０も変形し易い特性を有している。
【００４０】
このＣｕよりなるポスト２０の高さは、ポスト２０と半導体チップ１２との接合部の応力及び半導体チップ１２から放熱部材１４Ａへの熱伝達により決定されるが、約30〜100μｍ程度である。また、ポスト２０の直径及びピッチは必要な熱抵抗値及び上記接続部の信頼度（寿命）によって決定する。
【００４１】
この熱抵抗は、ポスト２０の配設密度（単位面積あたりのポスト２０の配設本数）、ポスト２０の断面積に反比例する。また信頼度は、放熱部材１４Ａと半導体チップ１２の熱膨張差、及び半導体チップ１２の発熱量等により決められる。通常、この信頼度の値は、ポスト２０の直径のｎ乗数（およそ２〜３乗）、熱膨張率差のｍ乗（およそ２乗）、ポスト２０の高さのL乗（およそ２乗）に反比例する。
【００４２】
一方、樹脂材２１は、ＢＴレジン系、エポキシ系、シリコン系等の材料を用いることが可能である。この樹脂材２１は、前記のようにポスト２０の隙間に充填される。このため、樹脂材２１によりポスト２０と半導体チップ１２との接合位置を補強することができ、接続部材１６Ａと半導体チップ１２との接合信頼性を高めることができる。
【００４３】
また、樹脂材２１としてＢＴレジン系、エポキシ系、シリコン系等の樹脂をそのまま用いた場合には、樹脂材２１の熱膨張率が半導体チップ１２の熱膨張率に対して非常に大きなものとなる。このため、半導体装置１０Ａの加熱時（例えば、実装時）等において、半導体チップ１２と樹脂材２１との間で応力が発生するおそれがある。
【００４４】
これを防止するため、ＢＴレジン系、エポキシ系、シリコン系等の樹脂材２１の原料となる樹脂に、図４に示すように無機材料よりなるフィラー２４を混合し、このフィラー２４を混入した樹脂材２１の熱膨張率が、半導体チップ１２の熱膨張率と放熱部材１４Ａの熱膨張率との間の値となるよう構成してもよい。このフィラー２４としては、例えばSiO2、Al2O3等の粉末、或いは粘性を下げる目的から球形としたSiO2、Al2O3等を用いることが考えられる。
【００４５】
このように樹脂材２１の原料となる樹脂にフィラー２４を混入することにより、樹脂材２１の熱膨張率を半導体素子１２の熱膨張率と放熱部材１４Ａの熱膨張率との間の値とすることができ、樹脂材２１を設けたことに起因して半導体チップ１２に応力が印加されることを防止することができる。また、樹脂材２１に熱伝導率の高い（熱抵抗の低い）フィラー２４を混入することにより、樹脂材２１を介して半導体チップ１２から発生する熱を放熱部材１４Ａに放熱することもできる。
【００４６】
上記したように本実施例に係る半導体装置１０Ａによれば、熱膨張率の違いにより半導体チップ１２と放熱部材１４Ａとの間に発生する応力は、接続部材１６Ａを構成するポスト２０が変形することにより確実に吸収される。このため、半導体チップ１２に印加される応力は低減され、半導体装置１０Ａの信頼性を向上させることができる。
【００４７】
また、ポスト２０と半導体チップ１２（金属層２２）とが金属接合されることにより、ポスト２０と半導体チップ１２との間における熱伝導率を高めることができ、半導体チップ１２で発生する熱を効率良く放熱することができる。更に、本実施例では接続部材１６Ａ（ポスト２０）を放熱部材１４Ａと一体化した構成であるため、半導体装置１０Ａの構成を簡単化することができる。
【００４８】
続いて、上記構成とされた半導体装置１０Ａの製造方法について説明する。尚、本発明における半導体装置１０Ａの製造方法は、接続部材１６Ａの形成方法、及び接続部材１６Ａ（ポスト２０）を半導体チップ１２に熱的に接続させる方法に特徴があり、他の製造工程は周知の方法を用いることができる。このため、以下の製造方法の説明では、接続部材１６Ａの形成方法、及び接続部材１６Ａの半導体チップ１２への接続方法についてのみ説明するものとする。
【００４９】
接続部材１６Ａを製造するには、先ず図５（Ａ）に示す放熱部材用基材３０を用意する。本実施例では、図２に示した半導体装置１０Ａを製造する方法を例に挙げて説明しているため、この放熱部材用基材３０はポスト２０が形成されていない状態の放熱部材１４Ａとなる。
【００５０】
この放熱部材用基材３０上には、図５（Ｂ）に示すようにレジスト３１を形成する。続いて、図５（Ｃ）に示すように、ポスト２０を形成する位置におけるレジスト３１を除去する。このレジスト３１の除去法は、例えば感光性レジスト材料の露光、レジスト剥離などのウエットプロセス法や、イオンミリングなどドライプロセス法などを用いる。
【００５１】
ポスト形成部におけるレジスト３１が除去されると、続いてＣｕを電解メッキすることにより、図５（Ｄ）に示すように放熱部材用基材３０上にポスト２０を形成する。前記したように、放熱部材用基材３０は放熱部材１４Ａであり、Ｃｕにより形成されている。よって、放熱部材用基材３０を電極としてポスト２０が電解メッキにより形成される。
【００５２】
このＣｕよりなるポスト２０の高さは、電解メッキ時間により制御することが可能である。前記のようにポスト２０の高さは、ポスト２０と半導体チップ１２との接合部の応力及び半導体チップ１２から放熱部材１４Ａへの熱伝達により決定されるが、例えば30〜100μｍ程度に設定される。
【００５３】
上記のように放熱部材用基材３０上にポスト２０が形成されると、続いて図５（Ｅ）に示すように、放熱部材用基材３０の上面全面（ポスト２０及びレジスト３１を含む上面全面）に半導体チップ１２と金属接合するための接合材２３を形成する。この接合材２３の材料は、主にＳｎなどであり、一般的なSn-Pb半田材料等も使用が可能である。また、接合材２３の作成方法はメッキ法により、その厚さは例えば3μm〜5μｍ程度である。尚、接合材２３の形成にあっては、ポスト２０の上面のみに選択的に接合材２３を形成する構成としてもよい。
【００５４】
上記のようにポスト２０の形成が完了すると、続いてポスト２０の形成のために用いたレジスト３１（レジスト３１上の接合材２３も含む）を除去し、これにより図５（Ｆ）に示すように接続部材１６Ａ（ポスト２０）の製造が完了する。この接続部材１６Ａが完成した状態において、本実施例の構成では、ポスト２０は放熱部材１４Ａと一体化した構成となっている。
【００５５】
次に、上記のように製造された接続部材１６Ａを用いて放熱部材１４Ａを半導体チップ１２に熱的に接続する接続方法について説明する。
【００５６】
放熱部材１４Ａを半導体チップ１２に熱的に接続するには、図６（Ｇ）に示すように、接続部材１６Ａを構成するポスト２０の上部にシート状の樹脂材２１（予め、上記したフィラー２４が混入されている）を配設する。続いて、予備加熱を実施することにより、図６（Ｈ）に示すように、シート状の樹脂材２１を接続部材１６Ａに仮固定する。この際、気泡の巻き込によるボイド発生を防止するために、真空中で加熱・加圧して固定する。例えば樹脂材２１としてBTレジンを用いた場合には、70℃、10torr、10kg/cm2で仮固定を実施する。
【００５７】
また、後述するようにポスト２０はこの樹脂材２１を挿通して半導体チップ１２に接合されることとなる。このため、樹脂材２１の材質選定においては、ポスト２０の先端に樹脂材２１やフィラー２４が残留してポスト２０の熱抵抗が低下しないよう、硬化前の樹脂材２１の粘性設計及びフィラー２４の含有量の設計が重要となる。具体的には、直径がφ60〜70μｍのポスト２０を用いた場合の粘性設計値は、硬化前の樹脂材２１の最低粘度が5000cps(センチポイズ)以下になるように設計される。また、このときのフィラー(SiO2)の含有量は20%以下で、熱膨張率は60ppm程度である。
【００５８】
上記のように樹脂材２１が接続部材１６Ａに仮固定されると、図６（Ｉ）に示すように、樹脂材２１が下となるよう半導体チップ１２の上部に接続部材１６Ａを位置決めする。この際、予め半導体チップ１２の背面には金属層２２（メタライズ）を形成しておく。この金属層２２としてはＣｕ或いはＡｕ等を用いることができる。具体的な金属層２２の形成方法としては、先ず半導体チップ１２の背面に密着金属となるチタン（Ｔｉ）膜を5000Åの厚さで形成し、その上部にＡｕを0.3μmの厚さで層形成する。
【００５９】
続いて、図６（Ｊ）に示すように、接続部材１６Ａを半導体チップ１２に金属接合する処理を行なう。具体的には、ポスト２０の先端に形成された接合材２３を半導体チップ１２の背面に形成された金属層２２に金属接合する処理を行なう。
【００６０】
このポスト２０を金属層２２に金属接合する処理は、酸化防止機能および加圧機能を有する装置を用いて実施する。
【００６１】
本実施例では、上記の二つの機能を有する装置として、真空プレス装置を用いている。また、接合条件としては、金属層２２としてＡｕを用いた場合には、圧力を〜30kg/cm2程度に設定し、230℃〜240℃の温度下において１秒程度でポスト２０を金属層２２に接合する。また、金属層２２としてＣｕを用いた場合には、圧力は5〜10kg/cm2程度で、強度的に脆いSn3Cuを安定なSn6Cu5に移行させるため、250℃で30分の加熱を行なう。
【００６２】
この際、加圧を行なう目的は、ポスト２０と金属層２２との接合部分の接触を図るほか、Au-Snの拡散、Cu-Snの拡散時に発生するカーケンドールボイドをつぶして、この発生を防止するためである。また、樹脂材２１をポスト２０の間の隙間に確実に充填するためである。
【００６３】
以上の工程を実施することにより、図６（Ｋ）に示されるように、接続部材１６Ａは半導体チップ１２に熱的に接合された状態となる。また、これと同時に、樹脂材２１はポスト２０の間の隙間に確実に充填される。このように、本実施例に係る製造方法によれば、ポスト２０と金属層２２との金属接合処理と、ポスト２０間の隙間に樹脂材２１を充填する処理を同時に行なうことができるため、半導体装置１０Ａの製造工程を簡単化することができる。
【００６４】
尚、上記した製造方法の実施では、樹脂材２１を接続部材１６Ａに仮止めした後に半導体チップ１２の背面に形成された金属層２２と金属接合する構成とした。しかしながら、図７（Ａ）に示すように、樹脂材２１を半導体チップ１２に形成された金属層２２上に仮止めし、その後に図７（Ｂ）に示すように接続部材１６Ａを半導体チップ１２に加熱下で加圧し、これにより図７（Ｃ）に示すようにポスト２０（接合材２３）を金属層２２に金属接合する構成としてもよい。
【００６５】
また、本実施例に係る製造方法では、樹脂材２１としてシート状の樹脂を用いたが、樹脂材２１としてゲル状の接着材料を用いることも可能である。樹脂材２１としてゲル状の接着材料を用いた場合も、上記したシート状の樹脂材２１と同様に、接着材料は再溶融時の粘性低下設計がなされており、仮固定温度以上で粘性が大きく変化し、例えば5000cps程度以下になるように設計されている。また、ゲル状の接着材料を用いた接合工程では、主に半導体チップ１２の背面にゲル状の接着材料塗布した後、接続部材１６Ａと半導体チップ１２を位置決めし、シート状の樹脂材２１と同様に半導体チップ１２と接続部材１６Ａとを加圧、加熱してポスト２０を金属層２２に金属接合する。
【００６６】
更に、本実施例に係る製造方法では、ポスト２０としてCuをメッキにより成長させたが、放熱部材１４Ａのポスト２０の形成位置に予めブロック体を一体的に形成しておき、このブロック体にスリット加工等を施すことにより分割されたポストを形成する方法を用いてもよい。
【００６７】
図８乃至図１２は、本発明の第２乃至第６実施例である半導体装置１０Ｂ〜１０Ｆを示している。尚、図８乃至図１２において、図２乃至図４に示した構成と同一構成については同一符号を付し、その説明を省略するものとする。
【００６８】
図８は、第２実施例である半導体装置１０Ｂを示している。先に図２を用いて説明した第１実施例に係る半導体装置１０Ａは、接続部材１６Ａを放熱部材１４Ａに一体化した構成とした。これに対して本実施例に係る半導体装置１０Ｂは、接続部材１６Ｂを放熱部材１４Ｂとは別個の構成としたものである。
【００６９】
このため、ポスト２０は基板３５に形成されており、また基板３５は熱媒体３６を介して放熱部材１４Ｂに熱的に接続された構成となっている。この熱媒体３６は、高い熱伝導率を有した材料よりなり、その熱膨張係数は放熱部材１４Ｂと接続部材１６Ｂとの間の熱膨張率に設定されている。
【００７０】
この構成とすることにより、接続部材１６Ｂを放熱部材１４Ｂに拘わらず形成することが可能となり、放熱部材１４Ｂの形状に変更があったような場合においても、接続部材１６Ｂはそのまま用いることが可能である。
【００７１】
図９は、第３実施例である半導体装置１０Ｃを示している。本実施例に係る半導体装置１０Ｃは、接続部材１６Ｃを構成する複数のポスト２０の高さを異ならせたことを特徴とするものである。具体的には、放熱部材１４Ｃに段部３７を形成することにより、中心部におけるポスト２０の長さ（図中、中心位置に配設されたポスト２０ｂの長さを矢印Ｈｂで示す）に対し、外周部におけるポスト２０の長さ（図中、最外周部に配設されたポスト２０ａの長さを矢印Ｈａで示す）を長く設定した構成としている（Ｈａ＞Ｈｂ）。
【００７２】
図１０は、第４実施例である半導体装置１０Ｄを示している。本実施例に係る半導体装置１０Ｄも、第３実施例に係る半導体装置１０Ｃと同様に、接続部材１６Ｄを構成する複数のポスト２０の高さを異ならせたことを特徴とするものである。
【００７３】
具体的には、放熱部材１４Ｄに球面状部３８を形成することにより、中心部におけるポスト２０の長さ（図中、中心位置に配設されたポスト２０ｂの長さを矢印Ｈｂで示す）に対し、外周部におけるポスト２０の長さ（図中、最外周部に配設されたポスト２０ａの長さを矢印Ｈａで示す）を長く設定した構成としている（Ｈａ＞Ｈｂ）。このポスト２０の長さの変化は、中心部から外周部に向け漸次変化するよう構成しても、段階的に変化するようにしてもよい。
【００７４】
図１１は、第５実施例である半導体装置１０Ｅを示している。本実施例に係る半導体装置１０Ｅは、接続部材１６Ｃを構成する複数のポスト２０の断面積を異ならせたことを特徴とするものである。
【００７５】
具体的には、中心部におけるポスト２０の断面積（図中、中心位置に配設されたポスト２０ｂの断面積をＳｂで示す）に対し、外周部におけるポスト２０の断面積（図中、最外周部に配設されたポスト２０ａの断面積をＳａで示す）が小さくなるよう設定した構成としている（Ｓａ＜Ｓｂ）。このポスト２０の断面積の変化は、中心部から外周部に向け漸次変化するよう構成しても、段階的に変化するようにしてもよい。
【００７６】
図１２は、第６実施例である半導体装置１０Ｆを示している。本実施例に係る半導体装置１０Ｆは、接続部材１６Ｃを構成する複数のポスト２０の長さ及び断面積は等しいが、ポスト２０の配設密度を異ならせたことを特徴とするものである。
【００７７】
具体的には、中心部におけるポスト２０の配設密度に対し、外周部におけるポスト２０の配設密度が低くなるよう設定している。このポスト２０の配設密度の変化も、中心部から外周部に向け漸次変化するよう構成しても、段階的に変化するようにしてもよい。
【００７８】
上記した第２乃至第６実施例に係る半導体装置１０Ｂ〜１０Ｆは、応力の発生量が少ない中心部においては剛性が高く、応力の発生量が大きい外周部では剛性は低く撓み易い構成となる。即ち、熱膨張差に起因して半導体チップ１２と放熱部材１４Ｂ〜１４Ｆとの間で相対的な変位が発生した場合、中央部における変位量に対して外周部における変位量は大きくなる。このため、半導体チップ１２と放熱部材１４Ｂ〜１４Ｆとの間で発生する応力も、中央部における応力に対して外周部における応力は大きくなる。
【００７９】
これに対し、第２乃至第６実施例に係る半導体装置１０Ｂ〜１０Ｆは、接続部材１６Ｂ〜１６Ｆの中心部は剛性が高く、外周部では剛性は低く撓み易い構成であるため、接続部材１６Ｂ〜１６Ｆにおいて半導体チップ１２と放熱部材１４Ｂ〜１４Ｆとの間で発生する応力を効率よくかつ確実に吸収することができる。
【００８０】
以上の説明に関し、更に以下の項を開示する。
【００８１】
（付記１） 半導体素子と、
該半導体素子で発生する熱を放熱する放熱部材と、
前記半導体素子と前記放熱部材を熱的に接続する接続部材とを有する半導体装置において、
前記接続部材を金属により形成すると共に、変形することにより前記半導体素子と前記放熱部材との間に発生する応力を吸収する構成とし、
かつ、該接続部材と前記半導体素子とを金属接合したことを特徴とする半導体装置。
【００８２】
（付記２） 付記１記載の半導体装置において、
前記半導体素子の前記接続部材が金属接合される位置に、金属接合用の金属層が形成されてなることを特徴とする半導体装置。
【００８３】
（付記３） 付記１または２記載の半導体装置において、
前記接続部材は、変形可能な構成とされた複数のポストを有することを特徴とする半導体装置。
【００８４】
（付記４） 付記３記載の半導体装置において、
前記ポスト間の隙間に有機材料を充填したことを特徴とする半導体装置。
【００８５】
（付記５） 付記４記載の半導体装置において、
前記有機材料に無機材料を混合し、該無機材料を混入した有機材料の熱膨張率が、前記半導体素子の熱膨張率と前記放熱部材の熱膨張率との間の値となるよう構成したことを特徴とする半導体装置。
【００８６】
（付記６） 付記３乃至５のいずれか１項に記載の半導体装置において、
前記複数のポストの長さを、中心部における長さに対し、外周部における長さを長く設定したことを特徴とする半導体装置。
【００８７】
（付記７） 付記３乃至６のいずれか１項に記載の半導体装置において、
前記複数のポストの断面積を、中心部における断面積に対し、外周部における断面積が小さくなるよう設定したことを特徴とする半導体装置。
【００８８】
（付記８） 付記３乃至７のいずれか１項に記載の半導体装置において、
前記複数のポストの配設密度を、中心部における配設密度に対し、外周部における配設密度が低くなるよう設定したことを特徴とする半導体装置。
【００８９】
（付記９） 付記１乃至８のいずれか１項に記載の半導体装置において、
前記接続部材を前記放熱部材と一体化したことを特徴とする半導体装置。
【００９０】
（付記１０） 基材に対してポストを形成することにより接続部材を製造する工程と、
半導体素子の背面に金属層を形成する工程と、
前記前記接続部材と前記半導体素子との間に樹脂材を配設しつつ前記ポストを前記金属層に押圧し、前記ポストと前記金属層を接合する工程と
を有することを特徴とする半導体装置の製造方法。
【００９１】
（付記１１） 基材上にレジストを形成する工程と、
前記基材上に形成されたレジストの複数箇所のポスト形成部分を除去する工程と、
前記レジストが除去されたポスト形成部分の基板部分にポストを形成する工程と、
前記ポスト上に接合材を形成する工程と、
前記基材上のレジストを除去する工程とにより作成されることを特徴とする半導体素子用の放熱部材。
【００９２】
（付記１２） 付記１１記載の半導体素子用の放熱部材において、
前記接合材の形成工程は、前記レジスト及びポスト上に接合材を形成し、
前記レジストを除去する工程は、前記接合材が形成されたレジストを除去することを特徴とする半導体素子用の放熱部材。
【００９３】
【発明の効果】
上述の如く本発明によれば、次に述べる種々の効果を実現することができる。
【００９９】
請求項１乃至３記載の発明によれば、ポストは応力の発生量に対応した可撓を行なうため、半導体素子と放熱部材との間に発生する応力を効率よくかつ確実に吸収することができる。
【０１００】
また、請求項４記載の発明によれば、接続部材と前記放熱部材とが一体化されることにより、半導体装置の構成を簡単化することができる。
【図面の簡単な説明】
【図１】従来の一例である半導体装置を示す図である。
【図２】本発明の第１実施例である半導体装置を示す図である。
【図３】本発明の第１実施例である半導体装置のポスト近傍を拡大して示す図である。
【図４】樹脂材にフィーを混入した状態を示す図である。
【図５】本発明の一実施例である半導体装置の製造方法を説明するための図である（その１）。
【図６】本発明の一実施例である半導体装置の製造方法を説明するための図である（その２）。
【図７】図５及び図６に示す半導体装置の製造方法の変形例を説明するための図である。
【図８】本発明の第２実施例である半導体装置を示す図である。
【図９】本発明の第３実施例である半導体装置を示す図である。
【図１０】本発明の第４実施例である半導体装置を示す図である。
【図１１】本発明の第５実施例である半導体装置を示す図である。
【図１２】本発明の第６実施例である半導体装置を示す図である。
【符号の説明】
１０Ａ〜１０Ｆ 半導体装置
１２ 半導体チップ
１３ パッケージ基板
１４Ａ〜１４Ｆ 放熱部材
１６Ａ〜１６Ｆ 接続部材
１８ アンダーフィルレジン
２０，２０ａ，２０ｂ ポスト
２１ 樹脂材
２２ 金属層
２３ 接合材
２４ フィラー
３０ 放熱部材用基材
３１ レジスト
３６ 熱媒体
３７ 段部
３８ 球面状部[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor equipment, about the particular semiconductor equipment with improved heat dissipation efficiency of the heat generated by the semiconductor chip.
[0002]
In recent years, semiconductor chips have been highly integrated, and there has been a demand for higher density mounting of semiconductor devices. Therefore, BGA type semiconductor devices and LGA type semiconductor devices capable of narrowing the pitch of external connection terminals (bumps, lands, etc.) are attracting attention and practically used as compared to QFP (Quad Flat Package) type semiconductor devices. It has become like this.
[0003]
In addition, the amount of heat generated by semiconductor elements has increased with the high integration of semiconductor chips, and thus it is necessary to improve the heat dissipation characteristics of semiconductor devices.
[0004]
[Prior art]
Conventionally, various semiconductor devices have been proposed in which the pitch of external connection terminals is reduced and the heat dissipation characteristics are improved (for example, Patent Documents 1 to 4). FIG. 1 shows an example of a conventional semiconductor device with improved heat dissipation characteristics. The semiconductor device 1 shown in FIG. 1 has an FC-BGA (Flip Chip Bump Grid Array package) structure, and is roughly composed of a semiconductor chip 2, a package substrate 3, a heat dissipation member 4, solder balls 5, and the like.
[0005]
The semiconductor chip 2 is flip-chip mounted on the upper surface of the package substrate 3. A solder ball 5 that functions as an external connection terminal is disposed on the lower surface of the package substrate 3. The package substrate 3 is a multilayer substrate, and the semiconductor chip 2 and the solder balls 5 are electrically connected by this internal wiring.
[0006]
The heat radiating member 4 functions as a lid for protecting the semiconductor chip 2 and also functions as a heat radiating plate that radiates heat generated in the semiconductor chip 2. Therefore, the semiconductor chip 2 and the heat dissipation member 4 need to be thermally connected. Conventionally, the back surface of the semiconductor chip 2 and the inner surface of the heat dissipation member 4 are connected using a thermal connection member 6 (hereinafter simply referred to as a connection member). Thermal connection was performed.
[0007]
At this time, as a heat transfer mechanism from the back surface of the semiconductor chip 2 to the heat radiating member 4, the following two methods have been generally used.
[0008]
(a) In order to prevent a decrease in reliability due to a mismatch in thermal expansion coefficient due to a material difference between the semiconductor chip 2 and the heat radiating member 4, a stress-releasing grease (compound) or a heat conductive adhesive is used as the connecting member 6. 1 is used, and this is disposed between the semiconductor chip 2 and the heat dissipation member 4 (the method illustrated in FIG. 1).
(b) Method of soldering a material having a thermal expansion coefficient close to that of the semiconductor chip 2 (for example, Cu-W, a composite material of carbon and Al) between the semiconductor chip 2 and the heat dissipation member 4 [Patent Document 1]
JP-A-57-176750 [0009]
[Patent Document 2]
Japanese Laid-Open Patent Publication No. 01-117049
[Patent Document 3]
Japanese Patent Laid-Open No. 10-050770
[Patent Document 4]
Japanese Patent Laid-Open No. 11-066798
[Problems to be solved by the invention]
However, the method (a) described above has the problem that grease (compound) or a heat conductive adhesive has a large thermal resistance, and therefore heat conduction from the semiconductor chip 2 to the heat radiating member 4 is not performed efficiently. .
In the method (b) described above, for example, Cu-W, a composite material of carbon and Al, or the like is used as a material having a thermal expansion coefficient close to that of the semiconductor chip 2. The heat conductivity of the heat conducting material is lower than that of Cu having good heat dissipation. For this reason, the above method (b) can be mainly applied only to a package in which the heat generation amount of the semiconductor chip 2 is relatively low.
[0013]
The present invention has been made in view of the above, and an object thereof is to provide a semiconductor equipment to obtain achieving reduction of stress generated inside the device while reliably dissipate the heat generated by the semiconductor element.
[0014]
[Means for Solving the Problems]
In order to solve the above-described problems, the present invention is characterized by the following measures.
[0025]
The invention described in claim 1
A semiconductor element;
A heat dissipating member that dissipates heat generated in the semiconductor element;
A connection member for thermally connecting the semiconductor element and the heat dissipation member;
The connection member is made of metal and absorbs stress generated between the semiconductor element and the heat dissipation member by deformation,
And a semiconductor device in which the connection member and the semiconductor element are metal-bonded,
The connecting member is configured to have a plurality of posts that can be deformed, and the length of the plurality of posts is set to be longer in the outer peripheral portion than in the center portion. It is what.
[0026]
The invention according to claim 2
The semiconductor device according to claim 1 ,
The cross-sectional area of the plurality of posts is set so that the cross-sectional area at the outer peripheral portion is smaller than the cross-sectional area at the central portion.
[0027]
The invention according to claim 3
The semiconductor device according to claim 1 or 2 ,
The arrangement density of the plurality of posts is set so that the arrangement density in the outer peripheral portion is lower than the arrangement density in the central portion.
[0028]
According to the first to third aspects of the invention, the rigidity of the connecting member is high in the central portion where the amount of stress is small, and the rigidity of the connecting member is low and easily bent in the outer peripheral portion where the amount of stress is large. Therefore, since the post performs flexibility corresponding to the amount of generated stress, the stress generated between the semiconductor element and the heat radiating member can be absorbed efficiently and reliably.
[0029]
The invention according to claim 4
The semiconductor device according to any one of claims 1 to 3 ,
The connection member is integrated with the heat dissipation member.
[0030]
According to the said invention, the structure of a semiconductor device can be simplified by integrating a connection member and the said heat radiating member.
[0033]
DETAILED DESCRIPTION OF THE INVENTION
Next, embodiments of the present invention will be described with reference to the drawings.
FIG. 2 shows a semiconductor device 10A according to the first embodiment of the present invention. The semiconductor device 10A shown in the figure has an FC-BGA structure, and is roughly composed of a semiconductor chip 12, a package substrate 13, a heat radiation member 14A, a solder ball 15, a connection member 16A, and the like.
[0034]
The semiconductor chip 12 is flip-chip mounted on the upper surface of the package substrate 13 using bumps 17. An underfill resin 18 is disposed between the semiconductor chip 12 and the package substrate 13 in order to prevent stress due to the difference in thermal expansion between the semiconductor chip 12 and the package substrate 13 from concentrating on the bumps 17. ing. A metal layer 22 is formed on the back surface of the semiconductor chip 12 as shown in an enlarged view in FIG. The metal layer 22 is bonded to a post 20 described later via a bonding material 23.
[0035]
The package substrate 13 is provided with solder balls 15 functioning as external connection terminals on the lower surface thereof. The package substrate 13 is a multilayer wiring substrate, and the semiconductor chip 2 and the solder balls 15 are electrically connected by the internal wiring.
[0036]
The heat radiating member 14A is made of copper (Cu), aluminum (Al), a composite material based on these, or a carbon composite material having good thermal conductivity. In this embodiment, Cu is used as the material of the heat dissipation member 14A. At this time, in order to prevent oxidation of the surface, an anti-oxidation film may be formed on the surface of the heat dissipation member 14A.
[0037]
The heat radiating member 14 </ b> A functions as a lid that protects the semiconductor chip 12 and also functions as a heat radiating plate that radiates heat generated in the semiconductor chip 12. Therefore, the cavity 19 is formed inside the heat radiating member 14 </ b> A, and the semiconductor chip 12 and a connecting member 16 </ b> A described later are located in the cavity 19.
[0038]
Moreover, since the heat radiating member 14 </ b> A functions as a heat radiating plate that radiates heat generated in the semiconductor chip 12, it is necessary to thermally connect the semiconductor chip 12 and the heat radiating member 14. In this embodiment, the semiconductor chip 12 and the heat dissipation member 14 are thermally connected using a thermal connection member 16A (hereinafter simply referred to as a connection member). Therefore, the heat generated in the semiconductor chip 12 is transferred to the heat radiating member 14A via the connection member 16A and is radiated in the heat radiating member 14A.
[0039]
The connecting member 16 </ b> A according to the present embodiment includes a plurality of posts 20 that are integrally formed with the heat radiating member 14 </ b> A, and a resin material 21 that is disposed in a gap between the plurality of posts 20. Since the post 20 is formed integrally with the heat dissipation member 14A described above, the material thereof is Cu having a high thermal conductivity. Further, since Cu is also a material that is easily deformed, the post 20 also has a characteristic that it is easily deformed.
[0040]
The height of the post 20 made of Cu is determined by the stress at the joint between the post 20 and the semiconductor chip 12 and the heat transfer from the semiconductor chip 12 to the heat radiating member 14A, but is about 30 to 100 μm. Further, the diameter and pitch of the posts 20 are determined by the required thermal resistance value and the reliability (lifetime) of the connecting portion.
[0041]
This thermal resistance is inversely proportional to the density of the posts 20 (the number of posts 20 per unit area) and the cross-sectional area of the posts 20. The reliability is determined by the difference in thermal expansion between the heat radiating member 14A and the semiconductor chip 12, the amount of heat generated by the semiconductor chip 12, and the like. Usually, the reliability value is the n-th power (approximately 2 to 3) of the diameter of the post 20, the m power (approximately square) of the difference in thermal expansion coefficient, and the L power of the height of the post 20 (approximately square). Inversely proportional to
[0042]
On the other hand, the resin material 21 can be made of a material such as BT resin, epoxy, or silicon. This resin material 21 is filled in the gaps of the posts 20 as described above. For this reason, the bonding position between the post 20 and the semiconductor chip 12 can be reinforced by the resin material 21, and the bonding reliability between the connecting member 16A and the semiconductor chip 12 can be improved.
[0043]
Further, when a resin such as BT resin, epoxy, or silicon is used as the resin material 21, the thermal expansion coefficient of the resin material 21 is very large relative to the thermal expansion coefficient of the semiconductor chip 12. . For this reason, stress may occur between the semiconductor chip 12 and the resin material 21 when the semiconductor device 10 </ b> A is heated (for example, during mounting).
[0044]
In order to prevent this, a filler 24 made of an inorganic material as shown in FIG. 4 is mixed with a resin that is a raw material for the resin material 21 such as a BT resin, an epoxy, or a silicon, and the filler 24 is mixed. You may comprise so that the thermal expansion coefficient of the material 21 may become a value between the thermal expansion coefficient of the semiconductor chip 12 and the thermal expansion coefficient of 14 A of thermal radiation members. As the filler 24, for example, powder of SiO 2 , Al 2 O 3 or the like, or spherical SiO 2 , Al 2 O 3 or the like for the purpose of reducing the viscosity may be used.
[0045]
Thus, by mixing the filler 24 into the resin that is the raw material of the resin material 21, the coefficient of thermal expansion of the resin material 21 is set to a value between the coefficient of thermal expansion of the semiconductor element 12 and the coefficient of thermal expansion of the heat radiating member 14A. It is possible to prevent stress from being applied to the semiconductor chip 12 due to the provision of the resin material 21. Further, by mixing the resin material 21 with a filler 24 having a high thermal conductivity (low thermal resistance), the heat generated from the semiconductor chip 12 via the resin material 21 can be radiated to the heat radiating member 14A.
[0046]
As described above, according to the semiconductor device 10A according to the present embodiment, the stress generated between the semiconductor chip 12 and the heat dissipation member 14A due to the difference in the coefficient of thermal expansion causes the post 20 constituting the connection member 16A to be deformed. Is reliably absorbed. For this reason, the stress applied to the semiconductor chip 12 is reduced, and the reliability of the semiconductor device 10A can be improved.
[0047]
Further, the post 20 and the semiconductor chip 12 (metal layer 22) are metal-bonded, whereby the thermal conductivity between the post 20 and the semiconductor chip 12 can be increased, and the heat generated in the semiconductor chip 12 can be efficiently used. It can dissipate heat well. Furthermore, since the connection member 16A (post 20) is integrated with the heat dissipation member 14A in this embodiment, the configuration of the semiconductor device 10A can be simplified.
[0048]
Next, a method for manufacturing the semiconductor device 10A having the above configuration will be described. The manufacturing method of the semiconductor device 10A according to the present invention is characterized by a method of forming the connection member 16A and a method of thermally connecting the connection member 16A (post 20) to the semiconductor chip 12, and other manufacturing processes are well known. This method can be used. For this reason, in the following description of the manufacturing method, only the method for forming the connection member 16A and the method for connecting the connection member 16A to the semiconductor chip 12 will be described.
[0049]
In order to manufacture the connecting member 16A, first, the base member 30 for heat radiating member shown in FIG. In the present embodiment, the method for manufacturing the semiconductor device 10A shown in FIG. 2 is described as an example, and thus the base member 30 for the heat radiating member becomes the heat radiating member 14A in a state where the post 20 is not formed. .
[0050]
A resist 31 is formed on the heat radiating member base 30 as shown in FIG. Subsequently, as shown in FIG. 5C, the resist 31 at the position where the post 20 is formed is removed. As a method for removing the resist 31, for example, a wet process method such as exposure of a photosensitive resist material, resist stripping, or a dry process method such as ion milling is used.
[0051]
When the resist 31 in the post forming portion is removed, the post 20 is formed on the heat radiating member base 30 as shown in FIG. As described above, the heat dissipation member base material 30 is the heat dissipation member 14A, and is formed of Cu. Therefore, the post 20 is formed by electrolytic plating using the heat dissipating member substrate 30 as an electrode.
[0052]
The height of the post 20 made of Cu can be controlled by the electrolytic plating time. As described above, the height of the post 20 is determined by the stress at the joint between the post 20 and the semiconductor chip 12 and the heat transfer from the semiconductor chip 12 to the heat dissipation member 14A, and is set to about 30 to 100 μm, for example. .
[0053]
When the post 20 is formed on the heat radiating member base 30 as described above, subsequently, as shown in FIG. 5E, the entire upper surface of the heat radiating member base 30 (the upper surface including the post 20 and the resist 31). A bonding material 23 for metal bonding to the semiconductor chip 12 is formed on the entire surface. The material of the bonding material 23 is mainly Sn or the like, and a general Sn—Pb solder material or the like can also be used. Further, the method for producing the bonding material 23 is a plating method, and the thickness thereof is, for example, about 3 μm to 5 μm. In the formation of the bonding material 23, the bonding material 23 may be selectively formed only on the upper surface of the post 20.
[0054]
When the formation of the post 20 is completed as described above, the resist 31 (including the bonding material 23 on the resist 31) used for the formation of the post 20 is subsequently removed, and as shown in FIG. The manufacture of the connecting member 16A (post 20) is completed. In the state where this connection member 16A is completed, in the configuration of this embodiment, the post 20 is integrated with the heat dissipation member 14A.
[0055]
Next, a connection method for thermally connecting the heat dissipation member 14A to the semiconductor chip 12 using the connection member 16A manufactured as described above will be described.
[0056]
In order to thermally connect the heat radiating member 14A to the semiconductor chip 12, as shown in FIG. 6G, a sheet-like resin material 21 (previously the filler 24 described above) is formed on the post 20 constituting the connecting member 16A. Is mixed). Subsequently, preheating is performed to temporarily fix the sheet-like resin material 21 to the connecting member 16A as shown in FIG. 6 (H). At this time, in order to prevent generation of voids due to entrainment of bubbles, heating and pressurization are performed in a vacuum. For example, when BT resin is used as the resin material 21, temporary fixing is performed at 70 ° C., 10 torr, and 10 kg / cm 2 .
[0057]
Further, as will be described later, the post 20 is inserted into the resin material 21 and joined to the semiconductor chip 12. For this reason, in the selection of the material of the resin material 21, the resin material 21 and the filler 24 remain at the tip of the post 20 and the thermal resistance of the post 20 does not decrease and the viscosity design of the resin material 21 before curing and the filler 24 Content design is important. Specifically, the viscosity design value when the post 20 having a diameter of 60 to 70 μm is used is designed so that the minimum viscosity of the resin material 21 before curing is 5000 cps (centipoise) or less. Further, the content of the filler (SiO 2 ) at this time is 20% or less, and the thermal expansion coefficient is about 60 ppm.
[0058]
When the resin material 21 is temporarily fixed to the connection member 16A as described above, the connection member 16A is positioned above the semiconductor chip 12 so that the resin material 21 faces downward as shown in FIG. At this time, a metal layer 22 (metallized) is previously formed on the back surface of the semiconductor chip 12. As this metal layer 22, Cu, Au, or the like can be used. As a specific method for forming the metal layer 22, first, a titanium (Ti) film as an adhesion metal is formed on the back surface of the semiconductor chip 12 with a thickness of 5000 mm, and Au is formed thereon with a thickness of 0.3 μm. To do.
[0059]
Subsequently, as shown in FIG. 6J, a process of metal-connecting the connection member 16A to the semiconductor chip 12 is performed. Specifically, the bonding material 23 formed at the tip of the post 20 is metal bonded to the metal layer 22 formed on the back surface of the semiconductor chip 12.
[0060]
The process of joining the post 20 to the metal layer 22 is performed using an apparatus having an antioxidant function and a pressurizing function.
[0061]
In this embodiment, a vacuum press apparatus is used as the apparatus having the above two functions. As the bonding condition, when Au is used as the metal layer 22, the pressure is set to about 30 kg / cm 2 , and the post 20 is attached to the metal layer 22 in about 1 second at a temperature of 230 ° C. to 240 ° C. To join. Further, when Cu is used as the metal layer 22, the pressure is about 5 to 10 kg / cm 2 , and strength-fragile Sn 3 Cu is transferred to stable Sn 6 Cu 5 . Heat.
[0062]
At this time, the purpose of pressurization is to contact the joint portion between the post 20 and the metal layer 22, and to crush the Kirkendall void generated during the diffusion of Au-Sn and Cu-Sn. This is to prevent it. Further, the resin material 21 is reliably filled in the gaps between the posts 20.
[0063]
By performing the above steps, the connecting member 16A is thermally bonded to the semiconductor chip 12 as shown in FIG. At the same time, the resin material 21 is reliably filled in the gaps between the posts 20. Thus, according to the manufacturing method according to the present embodiment, the metal bonding process between the post 20 and the metal layer 22 and the process of filling the gap between the posts 20 with the resin material 21 can be performed simultaneously. The manufacturing process of the apparatus 10A can be simplified.
[0064]
In the implementation of the manufacturing method described above, the resin material 21 is temporarily fixed to the connecting member 16A, and then the metal layer 22 formed on the back surface of the semiconductor chip 12 is metal-bonded. However, as shown in FIG. 7A, the resin material 21 is temporarily fixed on the metal layer 22 formed on the semiconductor chip 12, and then the connecting member 16A is connected to the semiconductor chip 12 as shown in FIG. It is good also as a structure which pressurizes under heating and metal-joins the post | mailbox 20 (joining material 23) to the metal layer 22 by this, as shown in FIG.7 (C).
[0065]
In the manufacturing method according to the present embodiment, a sheet-like resin is used as the resin material 21, but a gel-like adhesive material can also be used as the resin material 21. Even when a gel-like adhesive material is used as the resin material 21, the adhesive material is designed to reduce the viscosity at the time of remelting, as in the above-described sheet-like resin material 21, and has a large viscosity at a temperature not lower than the temporary fixing temperature. It is designed to change and become, for example, about 5000 cps or less. Further, in the joining step using the gel adhesive material, after applying the gel adhesive material mainly to the back surface of the semiconductor chip 12, the connecting member 16 </ b> A and the semiconductor chip 12 are positioned, and the same as the sheet-like resin material 21. The post 20 is metal-bonded to the metal layer 22 by pressurizing and heating the semiconductor chip 12 and the connecting member 16A.
[0066]
Furthermore, in the manufacturing method according to the present embodiment, Cu is grown as the post 20 by plating. However, a block body is integrally formed in advance at the position where the post 20 of the heat radiating member 14A is formed, and a slit is formed in the block body. A method of forming divided posts by processing or the like may be used.
[0067]
8 to 12 show semiconductor devices 10B to 10F according to second to sixth embodiments of the present invention. 8 to 12, the same components as those shown in FIGS. 2 to 4 are denoted by the same reference numerals, and the description thereof is omitted.
[0068]
FIG. 8 shows a semiconductor device 10B according to the second embodiment. The semiconductor device 10A according to the first embodiment described above with reference to FIG. 2 has a configuration in which the connection member 16A is integrated with the heat dissipation member 14A. On the other hand, in the semiconductor device 10B according to the present embodiment, the connection member 16B is configured separately from the heat dissipation member 14B.
[0069]
Therefore, the post 20 is formed on the substrate 35, and the substrate 35 is thermally connected to the heat radiating member 14B via the heat medium 36. The heat medium 36 is made of a material having high thermal conductivity, and the coefficient of thermal expansion is set to the coefficient of thermal expansion between the heat radiation member 14B and the connection member 16B.
[0070]
With this configuration, the connection member 16B can be formed regardless of the heat dissipation member 14B, and the connection member 16B can be used as it is even when the shape of the heat dissipation member 14B is changed. is there.
[0071]
FIG. 9 shows a semiconductor device 10C according to the third embodiment. The semiconductor device 10C according to the present embodiment is characterized in that the heights of the plurality of posts 20 constituting the connection member 16C are different. Specifically, by forming the step portion 37 on the heat radiating member 14C, the length of the post 20 at the center portion (in the figure, the length of the post 20b disposed at the center position is indicated by an arrow Hb). The length of the post 20 in the outer peripheral portion (in the figure, the length of the post 20a disposed in the outermost peripheral portion is indicated by an arrow Ha) is set to be long (Ha> Hb).
[0072]
FIG. 10 shows a semiconductor device 10D according to the fourth embodiment. Similarly to the semiconductor device 10C according to the third embodiment, the semiconductor device 10D according to the present embodiment is characterized in that the heights of the plurality of posts 20 constituting the connection member 16D are different.
[0073]
Specifically, by forming the spherical portion 38 in the heat radiating member 14D, the length of the post 20 at the center (in the drawing, the length of the post 20b disposed at the center position is indicated by an arrow Hb). On the other hand, the length of the post 20 at the outer peripheral portion (in the figure, the length of the post 20a disposed at the outermost peripheral portion is indicated by an arrow Ha) is set long (Ha> Hb). The change in the length of the post 20 may be configured to gradually change from the central portion toward the outer peripheral portion, or may be changed in stages.
[0074]
FIG. 11 shows a semiconductor device 10E according to the fifth embodiment. The semiconductor device 10E according to the present embodiment is characterized in that the cross-sectional areas of the plurality of posts 20 constituting the connection member 16C are different.
[0075]
Specifically, the cross-sectional area of the post 20 at the outer peripheral portion (the cross-sectional area of the post 20b disposed at the central position in the drawing is indicated by Sb) in the central portion (the maximum cross-sectional area in the drawing). The cross section of the post 20a disposed on the outer peripheral portion is set to be small (Sa <Sb). The change in the cross-sectional area of the post 20 may be configured to gradually change from the central portion toward the outer peripheral portion, or may be changed in stages.
[0076]
FIG. 12 shows a semiconductor device 10F according to the sixth embodiment. The semiconductor device 10F according to the present embodiment is characterized in that the plurality of posts 20 constituting the connection member 16C have the same length and cross-sectional area, but the arrangement density of the posts 20 is varied.
[0077]
Specifically, the arrangement density of the posts 20 in the outer peripheral part is set lower than the arrangement density of the posts 20 in the central part. The change in the arrangement density of the posts 20 may be configured to gradually change from the central portion toward the outer peripheral portion, or may be changed in stages.
[0078]
The semiconductor devices 10B to 10F according to the second to sixth embodiments described above have a configuration in which the rigidity is high in the central portion where the amount of stress generation is small, and the rigidity is low in the outer peripheral portion where the amount of stress generation is large. That is, when a relative displacement occurs between the semiconductor chip 12 and the heat dissipation members 14B to 14F due to a difference in thermal expansion, the displacement amount at the outer peripheral portion becomes larger than the displacement amount at the central portion. For this reason, the stress which generate | occur | produces between the semiconductor chip 12 and the heat radiating member 14B-14F also becomes large in the outer peripheral part with respect to the stress in a center part.
[0079]
On the other hand, in the semiconductor devices 10B to 10F according to the second to sixth embodiments, the central portions of the connection members 16B to 16F have high rigidity, and the outer peripheral portion has low rigidity and is easily bent. The stress generated between the semiconductor chip 12 and the heat radiation members 14B to 14F in 16F can be absorbed efficiently and reliably.
[0080]
Regarding the above description, the following items are further disclosed.
[0081]
(Supplementary note 1) a semiconductor element;
A heat dissipating member that dissipates heat generated in the semiconductor element;
In the semiconductor device having the semiconductor element and a connection member that thermally connects the heat dissipation member,
The connection member is made of metal and absorbs stress generated between the semiconductor element and the heat dissipation member by deformation,
And the semiconductor device characterized by metal-bonding this connection member and the said semiconductor element.
[0082]
(Appendix 2) In the semiconductor device according to Appendix 1,
A semiconductor device, wherein a metal layer for metal bonding is formed at a position where the connection member of the semiconductor element is metal bonded.
[0083]
(Appendix 3) In the semiconductor device according to Appendix 1 or 2,
The connection member includes a plurality of posts having a deformable configuration.
[0084]
(Appendix 4) In the semiconductor device described in Appendix 3,
A semiconductor device, wherein a gap between the posts is filled with an organic material.
[0085]
(Appendix 5) In the semiconductor device according to Appendix 4,
An inorganic material is mixed with the organic material, and the thermal expansion coefficient of the organic material mixed with the inorganic material is set to a value between the thermal expansion coefficient of the semiconductor element and the thermal expansion coefficient of the heat dissipation member. A semiconductor device characterized by the above.
[0086]
(Appendix 6) In the semiconductor device according to any one of appendices 3 to 5,
A length of the plurality of posts is set so that a length in an outer peripheral portion is set longer than a length in a central portion.
[0087]
(Appendix 7) In the semiconductor device according to any one of appendices 3 to 6,
A semiconductor device characterized in that the cross-sectional area of the plurality of posts is set so that the cross-sectional area at the outer peripheral portion is smaller than the cross-sectional area at the central portion.
[0088]
(Appendix 8) In the semiconductor device according to any one of appendices 3 to 7,
2. A semiconductor device according to claim 1, wherein the arrangement density of the plurality of posts is set so that the arrangement density in the outer peripheral portion is lower than the arrangement density in the central portion.
[0089]
(Appendix 9) In the semiconductor device according to any one of appendices 1 to 8,
A semiconductor device, wherein the connecting member is integrated with the heat radiating member.
[0090]
(Additional remark 10) The process of manufacturing a connection member by forming a post with respect to a substrate,
Forming a metal layer on the back surface of the semiconductor element;
And a step of pressing the post against the metal layer while disposing a resin material between the connection member and the semiconductor element, and joining the post and the metal layer. Production method.
[0091]
(Additional remark 11) The process of forming a resist on a base material,
Removing a plurality of post forming portions of the resist formed on the substrate;
Forming a post on the substrate portion of the post forming portion from which the resist has been removed;
Forming a bonding material on the post;
A heat radiating member for a semiconductor element, which is formed by a step of removing the resist on the base material.
[0092]
(Additional remark 12) In the heat dissipation member for semiconductor elements of Additional remark 11,
The bonding material forming step forms a bonding material on the resist and the post,
The step of removing the resist removes the resist on which the bonding material has been formed.
[0093]
【The invention's effect】
As described above, according to the present invention, various effects described below can be realized.
[0099]
According to the first to third aspects of the present invention, since the post performs flexibility corresponding to the amount of generated stress, the stress generated between the semiconductor element and the heat dissipation member can be absorbed efficiently and reliably. .
[0100]
According to the fourth aspect of the invention, the configuration of the semiconductor device can be simplified by integrating the connection member and the heat dissipation member.
[Brief description of the drawings]
FIG. 1 is a diagram showing a conventional semiconductor device.
FIG. 2 is a diagram showing a semiconductor device according to a first embodiment of the present invention.
FIG. 3 is an enlarged view showing the vicinity of a post of the semiconductor device according to the first embodiment of the present invention;
FIG. 4 is a diagram showing a state in which a fee is mixed in a resin material.
FIG. 5 is a drawing for explaining the method of manufacturing a semiconductor device according to one embodiment of the present invention (# 1).
FIG. 6 is a drawing for explaining the method for manufacturing a semiconductor device according to one embodiment of the present invention (# 2).
7 is a diagram for explaining a modification of the method for manufacturing the semiconductor device shown in FIGS. 5 and 6. FIG.
FIG. 8 is a diagram showing a semiconductor device according to a second embodiment of the present invention.
FIG. 9 is a diagram showing a semiconductor device according to a third embodiment of the present invention.
FIG. 10 is a diagram showing a semiconductor device according to a fourth embodiment of the present invention.
FIG. 11 is a diagram showing a semiconductor device according to a fifth embodiment of the present invention.
FIG. 12 is a diagram showing a semiconductor device according to a sixth embodiment of the present invention.
[Explanation of symbols]
10A to 10F Semiconductor device 12 Semiconductor chip 13 Package substrate 14A to 14F Heat radiation member 16A to 16F Connection member 18 Underfill resin 20, 20a, 20b Post 21 Resin material 22 Metal layer 23 Bonding material 24 Filler 30 Heat radiation member base material 31 Resist 36 Heat medium 37 Step portion 38 Spherical surface portion

Claims (4)

半導体素子と、
該半導体素子で発生する熱を放熱する放熱部材と、
前記半導体素子と前記放熱部材を熱的に接続する接続部材とを有し、
前記接続部材を金属により形成すると共に、変形することにより前記半導体素子と前記放熱部材との間に発生する応力を吸収する構成とし、
かつ、該接続部材と前記半導体素子とを金属接合した半導体装置であって、
前記接続部材を変形可能な構成とされた複数のポストを有する構成とすると共に、前記複数のポストの長さを、中心部における長さに対し、外周部における長さを長く設定したことを特徴とする半導体装置。A semiconductor element;
A heat dissipating member that dissipates heat generated in the semiconductor element;
Said heat radiation member and the semiconductor device have a connection member for connecting thermally,
The connection member is made of metal and absorbs stress generated between the semiconductor element and the heat dissipation member by deformation,
And, and said and said connecting member semiconductor device comprising a semi-conductor device in which metal bonding,
The connecting member is configured to have a plurality of posts that can be deformed, and the length of the plurality of posts is set to be longer in the outer peripheral portion than in the center portion. A semiconductor device. 請求項１記載の半導体装置において、
前記複数のポストの断面積を、中心部における断面積に対し、外周部における断面積が小さくなるよう設定したことを特徴とする半導体装置。The semiconductor device according to claim 1,
A semiconductor device characterized in that the cross-sectional area of the plurality of posts is set so that the cross-sectional area at the outer peripheral portion is smaller than the cross-sectional area at the central portion . 請求項１または２記載の半導体装置において、
前記複数のポストの配設密度を、中心部における配設密度に対し、外周部における配設密度が低くなるよう設定したことを特徴とする半導体装置。The semiconductor device according to claim 1 or 2,
2. A semiconductor device according to claim 1, wherein the arrangement density of the plurality of posts is set so that the arrangement density in the outer peripheral portion is lower than the arrangement density in the central portion . 請求項１乃至３のいずれか１項に記載の半導体装置において、
前記接続部材を前記放熱部材と一体化したことを特徴とする半導体装置。The semiconductor device according to any one of claims 1 to 3 ,
A semiconductor device, wherein the connecting member is integrated with the heat radiating member .
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