JP3934565B2 - Semiconductor device - Google Patents

Semiconductor device Download PDF

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Publication number
JP3934565B2
JP3934565B2 JP2003044335A JP2003044335A JP3934565B2 JP 3934565 B2 JP3934565 B2 JP 3934565B2 JP 2003044335 A JP2003044335 A JP 2003044335A JP 2003044335 A JP2003044335 A JP 2003044335A JP 3934565 B2 JP3934565 B2 JP 3934565B2
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semiconductor device
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semiconductor chip
member
material
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JP2004253703A (en
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英明 吉村
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富士通株式会社
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    • HELECTRICITY
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    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
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Description

【0001】 [0001]
【発明の属する技術分野】 BACKGROUND OF THE INVENTION
本発明は半導体装置に係り、特に半導体チップから発生する熱の放熱効率の向上を図った半導体装置に関する。 The present invention relates to a semiconductor equipment, about the particular semiconductor equipment with improved heat dissipation efficiency of the heat generated by the semiconductor chip.
【0002】 [0002]
近年、半導体チップが高集積化してきており、また、半導体装置の実装の高密度化が要求されてきている。 Recently, semiconductor chips have been highly integrated, and high densification of mounting the semiconductor device has been required. そこで、QFP(Quad Flat Package) 型半導体装置に比べて、外部接続端子(バンプ,ランド等)の狭ピッチ化を図ることができるBGA型半導体装置及びLGA型半導体装置が注目され、また実用されるようになってきている。 Therefore, as compared with QFP (Quad Flat Package) type semiconductor device, the external connection terminals (bumps, lands or the like) BGA type semiconductor device and a LGA type semiconductor device capable of achieving narrower pitches of the interest, also is practically it has become way.
【0003】 [0003]
また、半導体チップの高集積化に伴い半導体素子の発熱量が増えてきており、よって半導体装置の放熱特性を向上させる必要がある。 Further, the heating value of the semiconductor device with higher integration of semiconductor chips has been increasing, it is necessary to thus improve the heat dissipation characteristics of the semiconductor device.
【0004】 [0004]
【従来の技術】 BACKGROUND OF THE INVENTION
従来から、外部接続端子の狭ピッチ化及び放熱特性の向上を図った半導体装置が各種提案されている(例えば特許文献1〜4)。 Conventionally, a semiconductor device with improved pitch reduction and heat dissipation characteristics of the external connection terminal have been proposed (e.g. Patent Documents 1 to 4). 図1は、従来の放熱特性の向上を図った半導体装置の一例を示している。 Figure 1 shows an example of a semiconductor device with improved conventional heat dissipation characteristics. 同図に示す半導体装置1はFC−BGA(Flip Chip Bump Grid Array package)構造とされており、大略すると半導体チップ2,パッケージ基板3,放熱部材4,半田ボール5等により構成されている。 The semiconductor device 1 shown in the figure are the FC-BGA (Flip Chip Bump Grid Array package) structure, when roughly semiconductor chip 2, the package substrate 3, the heat radiating member 4, and a solder ball 5 and the like.
【0005】 [0005]
半導体チップ2は、パッケージ基板3の上面にフリップチップ実装されている。 The semiconductor chip 2 is flip-chip mounted on the upper surface of the package substrate 3. また、パッケージ基板3の下面には、外部接続端子として機能する半田ボール5が配設されている。 Further, on the lower surface of the package substrate 3, the solder balls 5 which functions as an external connection terminal is disposed. パッケージ基板3は多層基板であり、半導体チップ2と半田ボール5は、この内部配線により電気的に接続された構成となっている。 Package substrate 3 is a multilayer substrate, the semiconductor chip 2 and the solder balls 5 are in an electrically connected configuration by the internal wiring.
【0006】 [0006]
また、放熱部材4は半導体チップ2を保護するリッドとして機能すると共に、半導体チップ2で発生した熱を放熱する放熱板としても機能するものである。 Further, the heat radiating member 4 serves as a lid for protecting the semiconductor chip 2, and serves also as a heat sink for radiating heat generated in the semiconductor chip 2. よって、半導体チップ2と放熱部材4は熱的に接続する必要があるが、従来では熱的接続部材6(以下、単に接続部材という)を用いて半導体チップ2の背面と放熱部材4の内面を熱的に接続することが行なわれていた。 Thus, although the semiconductor chip 2 and the heat radiating member 4 needs to be thermally connected, conventionally thermally connecting member 6 (hereinafter, simply referred to as connecting member) has a rear and inner surface of the heat radiating member 4 of the semiconductor chip 2 with be thermally connected has been performed.
【0007】 [0007]
この際、半導体チップ2の背面から放熱部材4への熱伝達機構としては、従来では次に述べる二つの方法が一般的であった。 At this time, as the heat transfer mechanism from the rear of the semiconductor chip 2 to the heat radiating member 4, the two methods described below were common in the prior art.
【0008】 [0008]
(a) 半導体チップ2と放熱部材4の材質差による熱膨張率のミスマッチによる信頼度低下を防止するため、接続部材6として応力緩和性のあるグリス(コンパウンド)、或いは熱伝導性の接着剤などの熱媒体を用い、これを半導体チップ2と放熱部材4との間に配設する方法(図1に図示した方法) To prevent the reliability reduction due to a mismatch in thermal expansion coefficient (a) and the semiconductor chip 2 by the material differences of the heat radiating member 4, grease with a stress relaxation properties as the connection member 6 (compound), or a thermally conductive adhesive, such as method of using a heat medium, disposed between this and the semiconductor chip 2 and the heat radiating member 4 (method illustrated in FIG. 1)
(b) 半導体チップ2の熱膨張率に近い熱膨張率を有した材料(例えば、Cu-W、カーボンとAlの複合材料等)を半導体チップ2と放熱部材4との間で半田接合する方法【特許文献1】 (B) material having a thermal expansion coefficient close to the thermal expansion coefficient of the semiconductor chip 2 (e.g., Cu-W, carbon and composite materials of Al) a method of solder bonding between the semiconductor chip 2 and the heat radiating member 4 [Patent Document 1]
特開昭57−176750号公報【0009】 JP-A-57-176750 Patent Publication No. [0009]
【特許文献2】 [Patent Document 2]
特開平01−117049号公報【0010】 Japanese Unexamined Patent Publication No. 01-117049 [0010]
【特許文献3】 [Patent Document 3]
特開平10−050770号公報【0011】 Japanese Unexamined Patent Publication No. 10-050770 [0011]
【特許文献4】 [Patent Document 4]
特開平11−067998号公報【0012】 Japanese Unexamined Patent Publication No. 11-067998 [0012]
【発明が解決しようとする課題】 [Problems that the Invention is to Solve
しかしながら、上記した(a)の方法では、グリス(コンパウンド)或いは熱伝導性接着剤は熱抵抗が大きいため、半導体チップ2から放熱部材4に効率よく熱伝導が行なわれないという問題点があった。 However, in the method described above (a), grease (compound) or a thermally conductive adhesive because thermal resistance is large, efficient heat conduction there is a problem that it is not performed in the heat radiating member 4 from the semiconductor chip 2 .
また、上記した(b)の方法では、半導体チップ2の熱膨張率に近い熱膨張率を有した材料として、例えば、Cu-W、カーボンとAlの複合材料等を用いるが、これらの材料は放熱性の良好なCu等と比較して熱伝導材料の熱伝導率が低くなる。 In the method of the above (b), as a material having a thermal expansion coefficient close to the thermal expansion coefficient of the semiconductor chip 2, for example, Cu-W, but using a composite material of carbon and Al or the like, these materials compared to good, Cu heat radiation thermal conductivity of the thermally conductive material is lower. このため上記の(b)の方法は、主に半導体チップ2の発熱量が比較的に低いパッケージにしか適用することができなかった。 This method of for the (b) could not be primarily heating value of the semiconductor chip 2 is applied only to a relatively low package.
【0013】 [0013]
本発明は上記の点に鑑みてなされたものであり、半導体素子で発生する熱を確実に放熱すると共に装置内部で発生する応力の低減を図り得る半導体装置を提供することを目的とする。 The present invention has been made in view of the above, and an object thereof is to provide a semiconductor equipment to obtain achieving reduction of stress generated inside the device while reliably dissipate the heat generated by the semiconductor element.
【0014】 [0014]
【課題を解決するための手段】 In order to solve the problems]
上記の課題を解決するために本発明では、次に述べる各手段を講じたことを特徴とするものである。 In the present invention in order to solve the above problems, it is characterized in that by practice of the means described below.
【0025】 [0025]
請求項1記載の発明は、 Invention of claim 1,
半導体素子と、 And the semiconductor element,
該半導体素子で発生する熱を放熱する放熱部材と、 A heat radiation member for radiating heat generated in the semiconductor element,
前記半導体素子と前記放熱部材を熱的に接続する接続部材とを有し、 Said heat radiation member and the semiconductor element and a connecting member for connecting thermally,
前記接続部材を金属により形成すると共に、変形することにより前記半導体素子と前記放熱部材との間に発生する応力を吸収する構成とし、 It said connecting member so as to form a metal, and configured to absorb the stress generated between the heat radiating member and the semiconductor element by deformation,
かつ、該接続部材と前記半導体素子とを金属接合した半導体装置であって、 And, and said and said connecting member semiconductor device a semiconductor device metal bonding,
前記接続部材を変形可能な構成とされた複数のポストを有する構成とすると共に、前記複数のポストの長さを、中心部における長さに対し、外周部における長さを長く設定したことを特徴とするものである。 With a structure having a plurality of posts and deformable constituting said connecting member, characterized in that the length of the plurality of posts, with respect to the length in the central portion was set longer length in the outer peripheral portion it is an.
【0026】 [0026]
また、請求項記載の発明は、 Further, a second aspect of the present invention,
請求項記載の半導体装置において、 The semiconductor device according to claim 1,
前記複数のポストの断面積を、中心部における断面積に対し、外周部における断面積が小さくなるよう設定したことを特徴とするものである。 The cross-sectional area of ​​said plurality of posts, with respect to the cross-sectional area at the center, and is characterized in that set so that the cross section at the outer peripheral portion becomes smaller.
【0027】 [0027]
また、請求項記載の発明は、 The invention of claim 3, wherein the
請求項1または2記載の半導体装置において、 The semiconductor device according to claim 1 or 2, wherein,
前記複数のポストの配設密度を、中心部における配設密度に対し、外周部における配設密度が低くなるよう設定したことを特徴とするものである。 The arrangement density of the plurality of posts, with respect to arrangement density in the center portion, in which the arrangement density in the outer peripheral portion, characterized in that set to be lower.
【0028】 [0028]
上記の請求項1乃至3記載の発明によれば、応力の発生量が少ない中心部においては接続部材の剛性は高く、応力の発生量が大きい外周部では接続部材の剛性は低く撓み易い。 According to the invention described in the claims 1 to 3, wherein, high rigidity of the connecting member at the center is small generation amount of stress, the stiffness of the connection member is generated a large amount of the outer peripheral portion of the stress is likely deflection low. よって、ポストは応力の発生量に対応した可撓を行なうため、半導体素子と放熱部材との間に発生する応力を効率よくかつ確実に吸収することができる。 Therefore, the posts for performing flexible corresponding to the occurrence of stress can be absorbed efficiently and reliably stress generated between the semiconductor element and the heat radiating member.
【0029】 [0029]
また、請求項記載の発明は、 The invention of claim 4, wherein the
請求項1乃至のいずれか1項に記載の半導体装置において、 The semiconductor device according to any one of claims 1 to 3,
前記接続部材を前記放熱部材と一体化したことを特徴とするものである。 Is characterized in that said connecting member is integral with the heat dissipation member.
【0030】 [0030]
上記発明によれば、接続部材と前記放熱部材とが一体化されることにより、半導体装置の構成を簡単化することができる。 According to the invention, by a connecting member and the heat radiation member are integrated, it is possible to simplify the structure of a semiconductor device.
【0033】 [0033]
【発明の実施の形態】 DETAILED DESCRIPTION OF THE INVENTION
次に本発明の実施の形態について図面と共に説明する。 It will be described in conjunction with drawings, embodiments of the present invention.
図2は、本発明の第1実施例である半導体装置10Aを示している。 Figure 2 shows a semiconductor device 10A according to a first embodiment of the present invention. 同図に示す半導体装置10AはFC−BGA構造とされており、大略すると半導体チップ12,パッケージ基板13,放熱部材14A,半田ボール15,及び接続部材16A等により構成されている。 The semiconductor device 10A shown in the figure are the FC-BGA structure, the semiconductor chip 12 when generally, the package substrate 13, a heat dissipation member 14A, solder balls 15, and the connecting member 16A and the like.
【0034】 [0034]
半導体チップ12は、パッケージ基板13の上面にバンプ17を用いてフリップチップ実装されている。 The semiconductor chip 12 is flip-chip mounted with bump 17 on the upper surface of the package substrate 13. この半導体チップ12とパッケージ基板13との間には、半導体チップ12とパッケージ基板13との熱膨張差に起因した応力がバンプ17に集中するのを防止するため、アンダーフィルレジン18が配設されている。 Between the semiconductor chip 12 and the package substrate 13, the stress caused by the difference in thermal expansion between the semiconductor chip 12 and the package substrate 13 is prevented from concentrating on the bump 17, the underfill resin 18 is disposed ing. また、半導体チップ12の背面には、図3に拡大して示すように、金属層22が形成されている。 Further, on the rear surface of the semiconductor chip 12, as shown enlarged in FIG. 3, the metal layer 22 is formed. この金属層22は、後述するポスト20が接合材23を介して接合される。 The metal layer 22 is, the post 20 to be described later is bonded via the bonding material 23.
【0035】 [0035]
パッケージ基板13は、その下面に外部接続端子として機能する半田ボール15が配設されている。 Package substrate 13, solder balls 15 are provided which function as external connection terminals on its lower surface. このパッケージ基板13は多層配線基板であり、半導体チップ2と半田ボール15は、この内部配線により電気的に接続される構成となっている。 The package substrate 13 is a multilayer wiring board, the semiconductor chip 2 and the solder balls 15 is configured to be electrically connected by the internal wiring.
【0036】 [0036]
放熱部材14Aは、熱伝導性のよい銅(Cu),アルミニウム(Al),これらをベースとした複合材料、或いはカーボン複合材料により形成されている。 Heat dissipation member 14A is good thermal conductivity of copper (Cu), aluminum (Al), is formed by a composite material, or carbon composites these are based. 本実施例では、放熱部材14Aの材料としてCuを用いている。 In this embodiment, Cu is used as the material of the heat dissipation member 14A. この際、表面の酸化を防止するため、放熱部材14Aの表面に酸化防止膜を形成する構成としてもよい。 At this time, in order to prevent the oxidation of the surface may be configured to form an antioxidant film on the surface of the heat dissipation member 14A.
【0037】 [0037]
この放熱部材14Aは、半導体チップ12を保護するリッドとして機能すると共に、半導体チップ12で発生した熱を放熱する放熱板としても機能するものである。 The heat dissipation member 14A functions as a lid for protecting the semiconductor chip 12, which also functions as a heat sink for radiating heat generated in the semiconductor chip 12. よって、放熱部材14Aの内部にはキャビティ19が形成されており、半導体チップ12及び後述する接続部材16Aは、このキャビティ19内に位置した構成となっている。 Therefore, the inside of the heat dissipation member 14A and the cavity 19 is formed, connecting member 16A on which the semiconductor chip 12 and will be described later, has a configuration which is located within the cavity 19.
【0038】 [0038]
また、放熱部材14Aは半導体チップ12で発生した熱を放熱する放熱板としても機能するものであるたため、半導体チップ12と放熱部材14とを熱的に接続する必要がある。 Further, the heat radiating member 14A is for the one in which also functions as a heat sink for radiating heat generated in the semiconductor chip 12, it is necessary to thermally connects the semiconductor chip 12 and the heat radiating member 14. 本実施例では、半導体チップ12と放熱部材14とを熱的接続部材16A(以下、単に接続部材という)を用いて熱的に接続した構成としている。 In this embodiment, the semiconductor chip 12 and the heat dissipation member 14 and the thermally connecting member 16A (hereinafter, simply referred to as connecting member) and has a configuration which is thermally connected with. よって、半導体チップ12で発生した熱は、接続部材16Aを介して放熱部材14Aに熱伝達され、放熱部材14Aにおいて放熱される。 Therefore, heat generated in the semiconductor chip 12 is thermally transferred to the heat radiating member 14A via the connecting member 16A, it is radiated in the heat dissipation member 14A.
【0039】 [0039]
本実施例に係る接続部材16Aは、放熱部材14Aに一体的に形成された複数のポスト20と、この複数のポスト20間の隙間に配設された樹脂材21とにより構成されている。 Connecting member 16A of this embodiment is constituted by a plurality of posts 20 integrally formed, the resin material 21 disposed in a gap between the plurality of posts 20 to the heat radiating member 14A. ポスト20は、前記した放熱部材14Aと一体的に形成されるため、その材質は熱伝導率の高いCuである。 Post 20 is to be the above-mentioned heat dissipation member 14A integrally formed, the material is a high thermal conductivity Cu. また、Cuは変形し易い材料でもあるため、よってポスト20も変形し易い特性を有している。 Further, Cu since also a material easily deformed, thus being posts 20 also have a easily deformable characteristics.
【0040】 [0040]
このCuよりなるポスト20の高さは、ポスト20と半導体チップ12との接合部の応力及び半導体チップ12から放熱部材14Aへの熱伝達により決定されるが、約30〜100μm程度である。 The height of the post 20 made of the Cu is determined by heat transfer to the heat dissipation member 14A from the stress and the semiconductor chip 12 of the joint between the post 20 and the semiconductor chip 12, is about 30 to 100 [mu] m. また、ポスト20の直径及びピッチは必要な熱抵抗値及び上記接続部の信頼度(寿命)によって決定する。 Further, determined by the diameter and pitch are necessary heat resistance of the posts 20 and the connecting portions of the reliability (life).
【0041】 [0041]
この熱抵抗は、ポスト20の配設密度(単位面積あたりのポスト20の配設本数)、ポスト20の断面積に反比例する。 The thermal resistance (distribution 設本 number of posts 20 per unit area) the density of arrangement of the post 20, is inversely proportional to the cross-sectional area of ​​the post 20. また信頼度は、放熱部材14Aと半導体チップ12の熱膨張差、及び半導体チップ12の発熱量等により決められる。 The reliability, the difference in thermal expansion between the heat dissipation member 14A and the semiconductor chip 12, and is determined by the heat value of the semiconductor chip 12. 通常、この信頼度の値は、ポスト20の直径のn乗数(およそ2〜3乗)、熱膨張率差のm乗(およそ2乗)、ポスト20の高さのL乗(およそ2乗)に反比例する。 Normally, the value of the reliability, n multipliers (approximately 2-3 square) of the diameter of the post 20, the m-th power of the difference in thermal expansion coefficient (about 2 square), L of the height of the post 20 th power (approximately square) It is inversely proportional to.
【0042】 [0042]
一方、樹脂材21は、BTレジン系、エポキシ系、シリコン系等の材料を用いることが可能である。 On the other hand, the resin material 21, BT resin-based, epoxy-based, it is possible to use silicon-based material or the like. この樹脂材21は、前記のようにポスト20の隙間に充填される。 The resin material 21 is filled in the gap of the post 20 as described above. このため、樹脂材21によりポスト20と半導体チップ12との接合位置を補強することができ、接続部材16Aと半導体チップ12との接合信頼性を高めることができる。 Therefore, it is possible to reinforce the joining position between the post 20 and the semiconductor chip 12 by a resin material 21, it is possible to improve the reliability of the bonding between the connection member 16A and the semiconductor chip 12.
【0043】 [0043]
また、樹脂材21としてBTレジン系、エポキシ系、シリコン系等の樹脂をそのまま用いた場合には、樹脂材21の熱膨張率が半導体チップ12の熱膨張率に対して非常に大きなものとなる。 Further, BT resin-based as the resin material 21, epoxy-based, in the case where the resin of the silicon-based is used as it is, the thermal expansion coefficient of the resin material 21 is very large with respect to the thermal expansion coefficient of the semiconductor chip 12 . このため、半導体装置10Aの加熱時(例えば、実装時)等において、半導体チップ12と樹脂材21との間で応力が発生するおそれがある。 Therefore, during the heating of the semiconductor device 10A (e.g., during mounting) In like, there is a possibility that stress is generated between the semiconductor chip 12 and the resin material 21.
【0044】 [0044]
これを防止するため、BTレジン系、エポキシ系、シリコン系等の樹脂材21の原料となる樹脂に、図4に示すように無機材料よりなるフィラー24を混合し、このフィラー24を混入した樹脂材21の熱膨張率が、半導体チップ12の熱膨張率と放熱部材14Aの熱膨張率との間の値となるよう構成してもよい。 To prevent this, BT resin-based, epoxy-based, a resin as a raw material for the resin material 21 of silicon-based, mixed filler 24 made of an inorganic material, as shown in FIG. 4, mixed with the filler 24 resin thermal expansion coefficient of the timber 21 may be configured to a value between the thermal expansion coefficient and the thermal expansion rate of the heat dissipation member 14A of the semiconductor chip 12. このフィラー24としては、例えばSiO 2 、Al 2 O 3等の粉末、或いは粘性を下げる目的から球形としたSiO 2 、Al 2 O 3等を用いることが考えられる。 As the filler 24, it is conceivable to use, for example, SiO 2, Al 2 O 3 or the like of a powder, or SiO 2 was the purpose spherical lowering the viscosity, Al 2 O 3 or the like.
【0045】 [0045]
このように樹脂材21の原料となる樹脂にフィラー24を混入することにより、樹脂材21の熱膨張率を半導体素子12の熱膨張率と放熱部材14Aの熱膨張率との間の値とすることができ、樹脂材21を設けたことに起因して半導体チップ12に応力が印加されることを防止することができる。 By incorporating a filler 24 on the resin in this manner as a raw material for the resin material 21, to a value between the thermal expansion coefficient of the resin material 21 and the thermal expansion coefficient of the semiconductor element 12 and the thermal expansion rate of the heat dissipation member 14A it can be, stress on the semiconductor chip 12 due to the provision of the resin material 21 can be prevented from being applied. また、樹脂材21に熱伝導率の高い(熱抵抗の低い)フィラー24を混入することにより、樹脂材21を介して半導体チップ12から発生する熱を放熱部材14Aに放熱することもできる。 Further, (low thermal resistance) high resin material 21 thermal conductivity by incorporating a filler 24, it is also possible to dissipate the heat generated from the semiconductor chip 12 through the resin material 21 to the heat radiating member 14A.
【0046】 [0046]
上記したように本実施例に係る半導体装置10Aによれば、熱膨張率の違いにより半導体チップ12と放熱部材14Aとの間に発生する応力は、接続部材16Aを構成するポスト20が変形することにより確実に吸収される。 According to the semiconductor device 10A according to the present embodiment as described above, stress generated between the semiconductor chip 12 by the difference in coefficient of thermal expansion between the heat dissipation member 14A is that the post 20 constituting the connecting member 16A is deformed It is reliably absorbed by. このため、半導体チップ12に印加される応力は低減され、半導体装置10Aの信頼性を向上させることができる。 Therefore, stress applied to the semiconductor chip 12 is reduced, thereby improving the reliability of the semiconductor device 10A.
【0047】 [0047]
また、ポスト20と半導体チップ12(金属層22)とが金属接合されることにより、ポスト20と半導体チップ12との間における熱伝導率を高めることができ、半導体チップ12で発生する熱を効率良く放熱することができる。 Further, by the post 20 and the semiconductor chip 12 (metal layer 22) is metal bonding, posts 20 and it is possible to enhance the thermal conductivity between the semiconductor chip 12, the efficiency of heat generated in the semiconductor chip 12 it is possible to improve heat dissipation. 更に、本実施例では接続部材16A(ポスト20)を放熱部材14Aと一体化した構成であるため、半導体装置10Aの構成を簡単化することができる。 Further, in the present embodiment for a structure integrated with the heat dissipation member 14A connecting member 16A (post 20), it is possible to simplify the structure of the semiconductor device 10A.
【0048】 [0048]
続いて、上記構成とされた半導体装置10Aの製造方法について説明する。 Next, a method for manufacturing the semiconductor device 10A having the above configuration. 尚、本発明における半導体装置10Aの製造方法は、接続部材16Aの形成方法、及び接続部材16A(ポスト20)を半導体チップ12に熱的に接続させる方法に特徴があり、他の製造工程は周知の方法を用いることができる。 The method of manufacturing a semiconductor device 10A according to the present invention, the connection method of forming a member 16A, and is characterized connecting member 16A (post 20) to a method for thermally connected to the semiconductor chip 12, the other manufacturing process known the method can be used for. このため、以下の製造方法の説明では、接続部材16Aの形成方法、及び接続部材16Aの半導体チップ12への接続方法についてのみ説明するものとする。 Therefore, in the following description of the manufacturing method, it is assumed that only explaining the connection method forming member 16A, and how to connect to the connecting member 16A semiconductor chip 12.
【0049】 [0049]
接続部材16Aを製造するには、先ず図5(A)に示す放熱部材用基材30を用意する。 In order to manufacture the connecting member 16A is first prepared 5 for heat releasing substrate 30 shown in (A). 本実施例では、図2に示した半導体装置10Aを製造する方法を例に挙げて説明しているため、この放熱部材用基材30はポスト20が形成されていない状態の放熱部材14Aとなる。 In this embodiment, since the described by way of example a method of manufacturing a semiconductor device 10A shown in FIG. 2, the heat dissipation member base material 30 becomes the heat radiating member 14A in a state where no posts 20 are formed .
【0050】 [0050]
この放熱部材用基材30上には、図5(B)に示すようにレジスト31を形成する。 On the heat dissipation member base material 30, a resist 31 as shown in FIG. 5 (B). 続いて、図5(C)に示すように、ポスト20を形成する位置におけるレジスト31を除去する。 Subsequently, as shown in FIG. 5 (C), the resist is removed 31 in the position to form the posts 20. このレジスト31の除去法は、例えば感光性レジスト材料の露光、レジスト剥離などのウエットプロセス法や、イオンミリングなどドライプロセス法などを用いる。 The resist 31 is removed methods, for example exposure of a photosensitive resist material, a wet process method and such a resist stripping, the like dry process such as ion milling.
【0051】 [0051]
ポスト形成部におけるレジスト31が除去されると、続いてCuを電解メッキすることにより、図5(D)に示すように放熱部材用基材30上にポスト20を形成する。 When the resist 31 in the post-formation section is removed, followed by electroplating Cu, to form a post 20 on the heat dissipation member base material 30 as shown in FIG. 5 (D). 前記したように、放熱部材用基材30は放熱部材14Aであり、Cuにより形成されている。 As described above, the heat dissipation member base material 30 is a heat radiating member 14A, and is formed by Cu. よって、放熱部材用基材30を電極としてポスト20が電解メッキにより形成される。 Thus, the post 20 is formed by electrolytic plating for heat releasing substrate 30 as an electrode.
【0052】 [0052]
このCuよりなるポスト20の高さは、電解メッキ時間により制御することが可能である。 The height of the post 20 made of the Cu may be controlled by electrolytic plating time. 前記のようにポスト20の高さは、ポスト20と半導体チップ12との接合部の応力及び半導体チップ12から放熱部材14Aへの熱伝達により決定されるが、例えば30〜100μm程度に設定される。 The height of the post 20 as described above, is determined by heat transfer to the heat dissipation member 14A from the stress and the semiconductor chip 12 of the joint between the post 20 and the semiconductor chip 12 is set to, for example, about 30~100μm .
【0053】 [0053]
上記のように放熱部材用基材30上にポスト20が形成されると、続いて図5(E)に示すように、放熱部材用基材30の上面全面(ポスト20及びレジスト31を含む上面全面)に半導体チップ12と金属接合するための接合材23を形成する。 Top containing the posts 20 on the heat dissipation member base material 30 is formed as described above, followed by, as shown in FIG. 5 (E), the entire upper surface (post 20 and the resist 31 of the heat dissipation member base material 30 forming a bonding material 23 to the semiconductor chip 12 and the metal bonding over the entire surface). この接合材23の材料は、主にSnなどであり、一般的なSn-Pb半田材料等も使用が可能である。 The material of the bonding material 23, and the like mainly Sn, general Sn-Pb solder materials can also be used. また、接合材23の作成方法はメッキ法により、その厚さは例えば3μm〜5μm程度である。 Also, creating a bonding material 23 by a plating method, and has a thickness of, for example, about 3Myuemu~5myuemu. 尚、接合材23の形成にあっては、ポスト20の上面のみに選択的に接合材23を形成する構成としてもよい。 Incidentally, in the formation of the bonding material 23, it may be provided with a selectively bonding material 23 only on the upper surface of the post 20.
【0054】 [0054]
上記のようにポスト20の形成が完了すると、続いてポスト20の形成のために用いたレジスト31(レジスト31上の接合材23も含む)を除去し、これにより図5(F)に示すように接続部材16A(ポスト20)の製造が完了する。 When the formation of the post 20 as described above is completed, followed resist 31 (the bonding material 23 on the resist 31 including) the removal using for the formation of the post 20, thereby as shown in FIG. 5 (F) production of the connecting member 16A (post 20) to is completed. この接続部材16Aが完成した状態において、本実施例の構成では、ポスト20は放熱部材14Aと一体化した構成となっている。 In a state where the connecting member 16A is completed, in the configuration of the present embodiment, the post 20 has a structure integrated with the heat dissipation member 14A.
【0055】 [0055]
次に、上記のように製造された接続部材16Aを用いて放熱部材14Aを半導体チップ12に熱的に接続する接続方法について説明する。 Next, a connection method for thermally connecting the heat dissipation member 14A on the semiconductor chip 12 will be described with reference to manufacturing connection member 16A as described above.
【0056】 [0056]
放熱部材14Aを半導体チップ12に熱的に接続するには、図6(G)に示すように、接続部材16Aを構成するポスト20の上部にシート状の樹脂材21(予め、上記したフィラー24が混入されている)を配設する。 The heat dissipation member 14A to thermally connected to the semiconductor chip 12, as shown in FIG. 6 (G), connecting members 16A top of the post 20 constituting the sheet-like resin member 21 (previously, the filler and the 24 There is disposed is mixed). 続いて、予備加熱を実施することにより、図6(H)に示すように、シート状の樹脂材21を接続部材16Aに仮固定する。 Subsequently, by carrying out the preheating, as shown in FIG. 6 (H), temporarily fixing the sheet-like resin member 21 to the connecting member 16A. この際、気泡の巻き込によるボイド発生を防止するために、真空中で加熱・加圧して固定する。 At this time, in order to prevent the voids caused by the winding write bubble, fixed heated and pressed in a vacuum. 例えば樹脂材21としてBTレジンを用いた場合には、70℃、10torr、10kg/cm 2で仮固定を実施する。 For example, when the resin material 21 with a BT resin is, 70 ℃, 10torr, implementing the temporarily fixed at 10 kg / cm 2.
【0057】 [0057]
また、後述するようにポスト20はこの樹脂材21を挿通して半導体チップ12に接合されることとなる。 Also, the post 20 as described later and thus is bonded to the semiconductor chip 12 by inserting the resin material 21. このため、樹脂材21の材質選定においては、ポスト20の先端に樹脂材21やフィラー24が残留してポスト20の熱抵抗が低下しないよう、硬化前の樹脂材21の粘性設計及びフィラー24の含有量の設計が重要となる。 Therefore, in the material selection of the resin material 21, so that the thermal resistance of the post 20 is not reduced resin material 21 and filler 24 to the distal end of the post 20 remains, before curing of the resin material 21 viscosity design and filler 24 the design of the content is important. 具体的には、直径がφ60〜70μmのポスト20を用いた場合の粘性設計値は、硬化前の樹脂材21の最低粘度が5000cps(センチポイズ)以下になるように設計される。 Specifically, the viscosity design value when the diameter with post 20 of φ60~70μm the minimum viscosity of the resin material 21 before curing is designed to be less than 5000 cps (centipoise). また、このときのフィラー(SiO 2 )の含有量は20%以下で、熱膨張率は60ppm程度である。 The content of the filler (SiO 2) in this case is 20% or less, the thermal expansion coefficient is about 60 ppm.
【0058】 [0058]
上記のように樹脂材21が接続部材16Aに仮固定されると、図6(I)に示すように、樹脂材21が下となるよう半導体チップ12の上部に接続部材16Aを位置決めする。 When the resin material 21 as described above, is temporarily fixed to the connecting member 16A, as shown in FIG. 6 (I), to position the connecting member 16A to the top of the semiconductor chip 12 so that the resin material 21 is lower. この際、予め半導体チップ12の背面には金属層22(メタライズ)を形成しておく。 At this time, the back of the advance semiconductor chip 12 advance to form a metal layer 22 (metallized). この金属層22としてはCu或いはAu等を用いることができる。 The metal layer 22 may be Cu or Au. 具体的な金属層22の形成方法としては、先ず半導体チップ12の背面に密着金属となるチタン(Ti)膜を5000Åの厚さで形成し、その上部にAuを0.3μmの厚さで層形成する。 As a method for forming the specific metal layer 22, first titanium as the adhesion metal at the back of the semiconductor chip 12 (Ti) film was formed to a thickness of 5000 Å, a layer formed with a thickness of 0.3μm and an Au thereon to.
【0059】 [0059]
続いて、図6(J)に示すように、接続部材16Aを半導体チップ12に金属接合する処理を行なう。 Subsequently, as shown in FIG. 6 (J), it performs a process of metal bonding connection member 16A to the semiconductor chip 12. 具体的には、ポスト20の先端に形成された接合材23を半導体チップ12の背面に形成された金属層22に金属接合する処理を行なう。 Specifically, processing for metal bonding the bonding material 23 formed at the tip of the posts 20 to the metal layer 22 formed on the back surface of the semiconductor chip 12.
【0060】 [0060]
このポスト20を金属層22に金属接合する処理は、酸化防止機能および加圧機能を有する装置を用いて実施する。 Process of metal bonded to the post 20 to the metal layer 22 is carried out by using a device having antioxidation function and pressure capabilities.
【0061】 [0061]
本実施例では、上記の二つの機能を有する装置として、真空プレス装置を用いている。 In this embodiment, as a device having the two functions described above, and using a vacuum press apparatus. また、接合条件としては、金属層22としてAuを用いた場合には、圧力を〜30kg/cm 2程度に設定し、230℃〜240℃の温度下において1秒程度でポスト20を金属層22に接合する。 As the joining conditions, the case of using Au as the metal layer 22, the pressure was set at about 30 kg / cm 2, a metal layer post 20 in about one second at a temperature of 230 ° C. to 240 ° C. 22 It joined to. また、金属層22としてCuを用いた場合には、圧力は5〜10kg/cm 2程度で、強度的に脆いSn 3 Cuを安定なSn 6 Cu 5に移行させるため、250℃で30分の加熱を行なう。 In the case of using Cu as the metal layer 22, the pressure is about 5 to 10 kg / cm 2, for shifting the strength brittle Sn 3 Cu stable Sn 6 Cu 5, a 30-minute 250 ° C. carry out the heating.
【0062】 [0062]
この際、加圧を行なう目的は、ポスト20と金属層22との接合部分の接触を図るほか、Au-Snの拡散、Cu-Snの拡散時に発生するカーケンドールボイドをつぶして、この発生を防止するためである。 In this case, the purpose of performing the pressurization, in addition to achieve contact of the joint portion of the post 20 and the metal layer 22, the diffusion of Au-Sn, crush the Kirkendall voids generated during the diffusion of Cu-Sn, the generation This is to prevent. また、樹脂材21をポスト20の間の隙間に確実に充填するためである。 Further, in order to reliably fill the resin material 21 into the gap between the post 20.
【0063】 [0063]
以上の工程を実施することにより、図6(K)に示されるように、接続部材16Aは半導体チップ12に熱的に接合された状態となる。 By performing the above steps, as shown in FIG. 6 (K), the connecting member 16A is in a state of being thermally bonded to the semiconductor chip 12. また、これと同時に、樹脂材21はポスト20の間の隙間に確実に充填される。 At the same time, the resin material 21 is securely filled into the gap between the post 20. このように、本実施例に係る製造方法によれば、ポスト20と金属層22との金属接合処理と、ポスト20間の隙間に樹脂材21を充填する処理を同時に行なうことができるため、半導体装置10Aの製造工程を簡単化することができる。 Thus, according to the manufacturing method of the present embodiment, it is possible to carry out the metal bonding process between the post 20 and the metal layer 22, the process of filling the resin material 21 into the gap between the post 20 at the same time, the semiconductor it is possible to simplify the manufacturing process of the device 10A.
【0064】 [0064]
尚、上記した製造方法の実施では、樹脂材21を接続部材16Aに仮止めした後に半導体チップ12の背面に形成された金属層22と金属接合する構成とした。 In the practice of the manufacturing method described above, it has a structure in which metal layers 22 and the metal junction formed on the back surface of the semiconductor chip 12 after temporarily fixed resin material 21 in the connecting member 16A. しかしながら、図7(A)に示すように、樹脂材21を半導体チップ12に形成された金属層22上に仮止めし、その後に図7(B)に示すように接続部材16Aを半導体チップ12に加熱下で加圧し、これにより図7(C)に示すようにポスト20(接合材23)を金属層22に金属接合する構成としてもよい。 However, as shown in FIG. 7 (A), temporarily fixing the resin material 21 on the metal layer 22 formed on the semiconductor chip 12, then the semiconductor chip 12 to the connection member 16A, as shown in FIG. 7 (B) pressurized under heating, thereby it may be configured to metal bonding to the metal layer 22 posts 20 (bonding material 23) as shown in FIG. 7 (C).
【0065】 [0065]
また、本実施例に係る製造方法では、樹脂材21としてシート状の樹脂を用いたが、樹脂材21としてゲル状の接着材料を用いることも可能である。 In the manufacturing method according to the present embodiment uses a sheet-like resin as the resin material 21, it is also possible to use a gel-like adhesive material as the resin material 21. 樹脂材21としてゲル状の接着材料を用いた場合も、上記したシート状の樹脂材21と同様に、接着材料は再溶融時の粘性低下設計がなされており、仮固定温度以上で粘性が大きく変化し、例えば5000cps程度以下になるように設計されている。 Even if the resin material 21 using a gel-like adhesive material, similarly to the sheet-like resin member 21 as described above, the adhesive materials are made viscous decrease design at the time of re-melting, increased viscosity at temporarily fixed temperature or higher changes are designed to for example below about 5000 cps. また、ゲル状の接着材料を用いた接合工程では、主に半導体チップ12の背面にゲル状の接着材料塗布した後、接続部材16Aと半導体チップ12を位置決めし、シート状の樹脂材21と同様に半導体チップ12と接続部材16Aとを加圧、加熱してポスト20を金属層22に金属接合する。 Further, in the bonding process using the gel adhesive material, mainly after gel-like adhesive material applied to the back surface of the semiconductor chip 12, positioning the connecting member 16A and the semiconductor chip 12, similar to the sheet-like resin member 21 and a semiconductor chip 12 connected members 16A pressurized, heated to metal bonding post 20 to the metal layer 22.
【0066】 [0066]
更に、本実施例に係る製造方法では、ポスト20としてCuをメッキにより成長させたが、放熱部材14Aのポスト20の形成位置に予めブロック体を一体的に形成しておき、このブロック体にスリット加工等を施すことにより分割されたポストを形成する方法を用いてもよい。 Furthermore, in the manufacturing method according to the present embodiment, grown by plating the Cu as a post 20, advance integrally formed beforehand block body forming position of the post 20 of the heat dissipation member 14A, a slit in the block body it may be used a method of forming a split post by performing machining or the like.
【0067】 [0067]
図8乃至図12は、本発明の第2乃至第6実施例である半導体装置10B〜10Fを示している。 8 to 12 show a semiconductor device 10B~10F a second to sixth embodiment of the present invention. 尚、図8乃至図12において、図2乃至図4に示した構成と同一構成については同一符号を付し、その説明を省略するものとする。 In FIG. 8 through FIG. 12 are denoted by the same reference numerals to the same constituent elements as those shown in FIGS. 2 to 4, and description thereof is omitted.
【0068】 [0068]
図8は、第2実施例である半導体装置10Bを示している。 Figure 8 shows a semiconductor device 10B according to the second embodiment. 先に図2を用いて説明した第1実施例に係る半導体装置10Aは、接続部材16Aを放熱部材14Aに一体化した構成とした。 The semiconductor device 10A according to the first embodiment described previously with reference to FIG. 2, it has a structure that integrates the connection member 16A to the heat dissipation member 14A. これに対して本実施例に係る半導体装置10Bは、接続部材16Bを放熱部材14Bとは別個の構成としたものである。 The semiconductor device 10B according to this embodiment, the connecting member 16B to the heat radiating member 14B is obtained by a separate component thereto.
【0069】 [0069]
このため、ポスト20は基板35に形成されており、また基板35は熱媒体36を介して放熱部材14Bに熱的に接続された構成となっている。 Therefore, the post 20 is made is formed on the substrate 35, also the substrate 35 and the thermally connected to each heat dissipation member 14B through the heat medium 36. この熱媒体36は、高い熱伝導率を有した材料よりなり、その熱膨張係数は放熱部材14Bと接続部材16Bとの間の熱膨張率に設定されている。 The heat medium 36 is made of material having a high thermal conductivity, its thermal expansion coefficient is set to the thermal expansion coefficient between the connecting member 16B and the heat radiating member 14B.
【0070】 [0070]
この構成とすることにより、接続部材16Bを放熱部材14Bに拘わらず形成することが可能となり、放熱部材14Bの形状に変更があったような場合においても、接続部材16Bはそのまま用いることが可能である。 With this configuration, the connecting member 16B and it is possible to form regardless radiating member 14B, in the case that there is a change in the shape of the heat dissipation member 14B also, the connecting member 16B is can be used as it is is there.
【0071】 [0071]
図9は、第3実施例である半導体装置10Cを示している。 Figure 9 shows a semiconductor device 10C according to the third embodiment. 本実施例に係る半導体装置10Cは、接続部材16Cを構成する複数のポスト20の高さを異ならせたことを特徴とするものである。 The semiconductor device 10C according to this embodiment is characterized in that having different heights of the plurality of posts 20 which constitute the connecting member 16C. 具体的には、放熱部材14Cに段部37を形成することにより、中心部におけるポスト20の長さ(図中、中心位置に配設されたポスト20bの長さを矢印Hbで示す)に対し、外周部におけるポスト20の長さ(図中、最外周部に配設されたポスト20aの長さを矢印Haで示す)を長く設定した構成としている(Ha>Hb)。 Specifically, by forming the stepped portion 37 to the heat radiating member 14C, to the length of the post 20 at the center (shown in the figure, the length of the centrally arranged position to post 20b by arrow Hb) , the length of the post 20 in the outer peripheral portion has a configuration which is set (in the figure, the length of the post 20a disposed on the outermost peripheral portion shown by the arrow Ha) long (Ha> Hb).
【0072】 [0072]
図10は、第4実施例である半導体装置10Dを示している。 Figure 10 shows a semiconductor device 10D according to a fourth embodiment. 本実施例に係る半導体装置10Dも、第3実施例に係る半導体装置10Cと同様に、接続部材16Dを構成する複数のポスト20の高さを異ならせたことを特徴とするものである。 The semiconductor device 10D according to this embodiment also, similarly to the semiconductor device 10C according to the third embodiment, is characterized in that at different heights of the plurality of posts 20 which constitute the connecting member 16D.
【0073】 [0073]
具体的には、放熱部材14Dに球面状部38を形成することにより、中心部におけるポスト20の長さ(図中、中心位置に配設されたポスト20bの長さを矢印Hbで示す)に対し、外周部におけるポスト20の長さ(図中、最外周部に配設されたポスト20aの長さを矢印Haで示す)を長く設定した構成としている(Ha>Hb)。 Specifically, by forming the spherical portion 38 to the heat radiating member 14D, the length of the post 20 in the central portion (in the figure indicates the length of the centrally arranged position to post 20b by arrow Hb) contrast, the length of the post 20 in the outer peripheral portion has a configuration which is set (in the figure, the length of the post 20a disposed in the outermost peripheral portion arrows indicated by Ha) long (Ha> Hb). このポスト20の長さの変化は、中心部から外周部に向け漸次変化するよう構成しても、段階的に変化するようにしてもよい。 The length of the change of the post 20 may be configured to gradually change toward the outer peripheral portion from the central portion may be changed stepwise.
【0074】 [0074]
図11は、第5実施例である半導体装置10Eを示している。 Figure 11 shows a semiconductor device 10E according to the fifth embodiment. 本実施例に係る半導体装置10Eは、接続部材16Cを構成する複数のポスト20の断面積を異ならせたことを特徴とするものである。 The semiconductor device 10E of this embodiment is characterized in that having different cross-sectional area of ​​the plurality of posts 20 which constitute the connecting member 16C.
【0075】 [0075]
具体的には、中心部におけるポスト20の断面積(図中、中心位置に配設されたポスト20bの断面積をSbで示す)に対し、外周部におけるポスト20の断面積(図中、最外周部に配設されたポスト20aの断面積をSaで示す)が小さくなるよう設定した構成としている(Sa<Sb)。 Specifically, the cross-sectional area of ​​the post 20 at the center with respect to (in the figure, indicated by Sb a cross-sectional area of ​​the disposed the post 20b to the center position), in the cross-sectional area (FIG post 20 in the outer peripheral portion, the outermost the cross-sectional area of ​​the disposed a post 20a on the outer peripheral portion has a configuration which is set as indicated by Sa) is smaller (Sa <Sb). このポスト20の断面積の変化は、中心部から外周部に向け漸次変化するよう構成しても、段階的に変化するようにしてもよい。 Change in cross-sectional area of ​​the post 20 may be configured to gradually change toward the outer peripheral portion from the central portion may be changed stepwise.
【0076】 [0076]
図12は、第6実施例である半導体装置10Fを示している。 Figure 12 shows a semiconductor device 10F according to the sixth embodiment. 本実施例に係る半導体装置10Fは、接続部材16Cを構成する複数のポスト20の長さ及び断面積は等しいが、ポスト20の配設密度を異ならせたことを特徴とするものである。 The semiconductor device 10F according to the present embodiment, the length and cross-sectional area of ​​the plurality of posts 20 which constitute the connecting member 16C is equal, it is characterized in that with different density of arrangement of the post 20.
【0077】 [0077]
具体的には、中心部におけるポスト20の配設密度に対し、外周部におけるポスト20の配設密度が低くなるよう設定している。 Specifically, with respect to the density of arrangement of the post 20 at the center, the density of arrangement of the post 20 is set to be lower at the outer peripheral portion. このポスト20の配設密度の変化も、中心部から外周部に向け漸次変化するよう構成しても、段階的に変化するようにしてもよい。 Changes in the density of arrangement of the post 20 may also be configured to gradually change toward the outer peripheral portion from the central portion may be changed stepwise.
【0078】 [0078]
上記した第2乃至第6実施例に係る半導体装置10B〜10Fは、応力の発生量が少ない中心部においては剛性が高く、応力の発生量が大きい外周部では剛性は低く撓み易い構成となる。 The semiconductor device 10B~10F according to the second to sixth embodiment described above, high rigidity in the central portion is small generation amount of stress, rigidity becomes easy configuration deflection low in generation of a large outer peripheral portion of the stress. 即ち、熱膨張差に起因して半導体チップ12と放熱部材14B〜14Fとの間で相対的な変位が発生した場合、中央部における変位量に対して外周部における変位量は大きくなる。 That is, when the relative displacement between the semiconductor chip 12 due to thermal expansion difference between the heat radiating member 14B~14F occurs, displacement at the outer peripheral portion with respect to the displacement amount at the central portion increases. このため、半導体チップ12と放熱部材14B〜14Fとの間で発生する応力も、中央部における応力に対して外周部における応力は大きくなる。 Therefore, stress generated between the semiconductor chip 12 and the heat dissipation member 14B~14F also stress increases in the outer peripheral portion with respect to the stress in the central portion.
【0079】 [0079]
これに対し、第2乃至第6実施例に係る半導体装置10B〜10Fは、接続部材16B〜16Fの中心部は剛性が高く、外周部では剛性は低く撓み易い構成であるため、接続部材16B〜16Fにおいて半導体チップ12と放熱部材14B〜14Fとの間で発生する応力を効率よくかつ確実に吸収することができる。 In contrast, the semiconductor device 10B~10F according to the second to sixth embodiment, since the center portion of the connecting member 16B~16F has high rigidity, the outer peripheral portion rigidity is prone configuration deflection lower connecting member 16B~ it is possible to absorb stress generated between the semiconductor chip 12 and the heat dissipation member 14B~14F efficiently and reliably in 16F.
【0080】 [0080]
以上の説明に関し、更に以下の項を開示する。 Relates above description, further discloses the following sections.
【0081】 [0081]
(付記1) 半導体素子と、 And (Supplementary Note 1) semiconductor element,
該半導体素子で発生する熱を放熱する放熱部材と、 A heat radiation member for radiating heat generated in the semiconductor element,
前記半導体素子と前記放熱部材を熱的に接続する接続部材とを有する半導体装置において、 In a semiconductor device having a connecting member connecting the heat radiating member and the semiconductor element thermally,
前記接続部材を金属により形成すると共に、変形することにより前記半導体素子と前記放熱部材との間に発生する応力を吸収する構成とし、 It said connecting member so as to form a metal, and configured to absorb the stress generated between the heat radiating member and the semiconductor element by deformation,
かつ、該接続部材と前記半導体素子とを金属接合したことを特徴とする半導体装置。 And a semiconductor device which is characterized in that the the said connecting member said semiconductor element and metal bonding.
【0082】 [0082]
(付記2) 付記1記載の半導体装置において、 The semiconductor device (Supplementary Note 2) Supplementary Note 1, wherein,
前記半導体素子の前記接続部材が金属接合される位置に、金属接合用の金属層が形成されてなることを特徴とする半導体装置。 Wherein a position where the connecting member of the semiconductor element is metal bonding, wherein a metal layer for metal bonding is formed.
【0083】 [0083]
(付記3) 付記1または2記載の半導体装置において、 In the semiconductor device (Supplementary Note 3) Appendix 1 or 2,
前記接続部材は、変形可能な構成とされた複数のポストを有することを特徴とする半導体装置。 It said connecting member is a semiconductor device characterized in that it comprises a plurality of posts and deformable structure.
【0084】 [0084]
(付記4) 付記3記載の半導体装置において、 In the semiconductor device (Supplementary Note 4) note 3, wherein,
前記ポスト間の隙間に有機材料を充填したことを特徴とする半導体装置。 Wherein a filled with organic material to the gaps between the posts.
【0085】 [0085]
(付記5) 付記4記載の半導体装置において、 In (Supplementary Note 5) The semiconductor device according to Note 4, wherein,
前記有機材料に無機材料を混合し、該無機材料を混入した有機材料の熱膨張率が、前記半導体素子の熱膨張率と前記放熱部材の熱膨張率との間の値となるよう構成したことを特徴とする半導体装置。 The mixing an inorganic material to the organic material, the thermal expansion coefficient of the organic material mixed with inorganic material, and configured to be a value between the thermal expansion coefficient and the thermal expansion coefficient of the heat radiation member of the semiconductor element wherein a.
【0086】 [0086]
(付記6) 付記3乃至5のいずれか1項に記載の半導体装置において、 The semiconductor device according to any one of (Supplementary Note 6) Appendix 3 to 5,
前記複数のポストの長さを、中心部における長さに対し、外周部における長さを長く設定したことを特徴とする半導体装置。 It said plurality of post length, to the length in the central portion, and wherein a set increase the length in the outer peripheral portion.
【0087】 [0087]
(付記7) 付記3乃至6のいずれか1項に記載の半導体装置において、 The semiconductor device according to any one of (Supplementary Note 7) Supplementary Note 3 to 6,
前記複数のポストの断面積を、中心部における断面積に対し、外周部における断面積が小さくなるよう設定したことを特徴とする半導体装置。 Wherein the plurality of the cross-sectional area of ​​the post, with respect to the cross-sectional area at the central portion, and wherein a set so that the cross section at the outer peripheral portion becomes smaller.
【0088】 [0088]
(付記8) 付記3乃至7のいずれか1項に記載の半導体装置において、 The semiconductor device according to any one of (Supplementary Note 8) Appendix 3 to 7,
前記複数のポストの配設密度を、中心部における配設密度に対し、外周部における配設密度が低くなるよう設定したことを特徴とする半導体装置。 The semiconductor device characterized by the arrangement density of said plurality of posts, with respect to arrangement density in the central portion, the arrangement density of the outer peripheral portion is set to be lower.
【0089】 [0089]
(付記9) 付記1乃至8のいずれか1項に記載の半導体装置において、 The semiconductor device according to any one of (Supplementary Note 9) Supplementary Notes 1 to 8,
前記接続部材を前記放熱部材と一体化したことを特徴とする半導体装置。 The semiconductor device, characterized in that said connecting member is integral with the heat dissipation member.
【0090】 [0090]
(付記10) 基材に対してポストを形成することにより接続部材を製造する工程と、 A step of producing a connecting member by forming a post against (Supplementary Note 10) substrate,
半導体素子の背面に金属層を形成する工程と、 Forming a metal layer on the back surface of the semiconductor element,
前記前記接続部材と前記半導体素子との間に樹脂材を配設しつつ前記ポストを前記金属層に押圧し、前記ポストと前記金属層を接合する工程とを有することを特徴とする半導体装置の製造方法。 The presses the post to the metal layer while providing the resin material between the connecting member and the semiconductor element, the semiconductor device characterized by a step of bonding the metal layer and the posts Production method.
【0091】 [0091]
(付記11) 基材上にレジストを形成する工程と、 Forming a resist on (Supplementary Note 11) substrate,
前記基材上に形成されたレジストの複数箇所のポスト形成部分を除去する工程と、 Removing the post forming part of a plurality of locations of the resist formed on the substrate,
前記レジストが除去されたポスト形成部分の基板部分にポストを形成する工程と、 Forming a post on the substrate portion of the post forming portion in which the resist has been removed,
前記ポスト上に接合材を形成する工程と、 Forming a bonding material on the post,
前記基材上のレジストを除去する工程とにより作成されることを特徴とする半導体素子用の放熱部材。 Radiation member for a semiconductor device characterized by being prepared by the steps of removing the resist on the substrate.
【0092】 [0092]
(付記12) 付記11記載の半導体素子用の放熱部材において、 In the heat dissipation member (Note 12) for a semiconductor device according to Note 11, wherein,
前記接合材の形成工程は、前記レジスト及びポスト上に接合材を形成し、 The step of forming the bonding material forms a bonding material on the resist and on the post,
前記レジストを除去する工程は、前記接合材が形成されたレジストを除去することを特徴とする半導体素子用の放熱部材。 Removing the resist, the radiation member for a semiconductor device characterized by removing the resist to the bonding material is formed.
【0093】 [0093]
【発明の効果】 【Effect of the invention】
上述の如く本発明によれば、次に述べる種々の効果を実現することができる。 According to the present invention as described above, it is possible to realize a variety of effects to be described below.
【0099】 [0099]
請求項1乃至3記載の発明によれば、ポストは応力の発生量に対応した可撓を行なうため、半導体素子と放熱部材との間に発生する応力を効率よくかつ確実に吸収することができる。 According to the invention of claims 1 to 3, wherein the post is to perform a flexible corresponding to the occurrence of stress it can be absorbed efficiently and reliably stress generated between the semiconductor element and the heat radiating member .
【0100】 [0100]
また、請求項記載の発明によれば、接続部材と前記放熱部材とが一体化されることにより、半導体装置の構成を簡単化することができる。 Further, according to the fourth aspect of the present invention, by the connecting member and the heat radiation member are integrated, it is possible to simplify the structure of a semiconductor device.
【図面の簡単な説明】 BRIEF DESCRIPTION OF THE DRAWINGS
【図1】従来の一例である半導体装置を示す図である。 1 is a diagram illustrating a semiconductor device of a conventional example.
【図2】本発明の第1実施例である半導体装置を示す図である。 2 is a diagram showing a semiconductor device according to a first embodiment of the present invention.
【図3】本発明の第1実施例である半導体装置のポスト近傍を拡大して示す図である。 Figure 3 is an enlarged view showing the post near the semiconductor device according to a first embodiment of the present invention.
【図4】樹脂材にフィーを混入した状態を示す図である。 4 is a diagram showing a state obtained by mixing fee to the resin material.
【図5】本発明の一実施例である半導体装置の製造方法を説明するための図である(その1)。 5 is a diagram for explaining a manufacturing method of a semiconductor device in an embodiment of the present invention (Part 1).
【図6】本発明の一実施例である半導体装置の製造方法を説明するための図である(その2)。 6 is a diagram for explaining a method for manufacturing a semiconductor device according to an embodiment of the present invention (Part 2).
【図7】図5及び図6に示す半導体装置の製造方法の変形例を説明するための図である。 7 is a diagram for explaining a modification of the method of manufacturing the semiconductor device shown in FIGS.
【図8】本発明の第2実施例である半導体装置を示す図である。 8 is a diagram showing a semiconductor device according to a second embodiment of the present invention.
【図9】本発明の第3実施例である半導体装置を示す図である。 9 is a diagram showing a semiconductor device according to a third embodiment of the present invention.
【図10】本発明の第4実施例である半導体装置を示す図である。 10 is a diagram showing a semiconductor device according to a fourth embodiment of the present invention.
【図11】本発明の第5実施例である半導体装置を示す図である。 11 is a diagram showing a semiconductor device according to a fifth embodiment of the present invention.
【図12】本発明の第6実施例である半導体装置を示す図である。 12 is a diagram showing a semiconductor device of a sixth embodiment of the present invention.
【符号の説明】 DESCRIPTION OF SYMBOLS
10A〜10F 半導体装置12 半導体チップ13 パッケージ基板14A〜14F 放熱部材16A〜16F 接続部材18 アンダーフィルレジン20,20a,20b ポスト21 樹脂材22 金属層23 接合材24 フィラー30 放熱部材用基材31 レジスト36 熱媒体37 段部38 球面状部 10A~10F semiconductor device 12 semiconductor chip 13 package substrate 14A~14F radiating member 16A~16F connecting member 18 underfill resin 20, 20a, 20b post 21 resin material 22 a metal layer 23 bonding material 24 filler 30 for heat releasing substrate 31 resist 36 heating medium 37 step portion 38 spherical portion

Claims (4)

  1. 半導体素子と、 And the semiconductor element,
    該半導体素子で発生する熱を放熱する放熱部材と、 A heat radiation member for radiating heat generated in the semiconductor element,
    前記半導体素子と前記放熱部材を熱的に接続する接続部材とを有し、 It said heat radiation member and the semiconductor device have a connection member for connecting thermally,
    前記接続部材を金属により形成すると共に、変形することにより前記半導体素子と前記放熱部材との間に発生する応力を吸収する構成とし、 It said connecting member so as to form a metal, and configured to absorb the stress generated between the heat radiating member and the semiconductor element by deformation,
    かつ、該接続部材と前記半導体素子とを金属接合した半導体装置であって、 And, and said and said connecting member semiconductor device comprising a semi-conductor device in which metal bonding,
    前記接続部材を変形可能な構成とされた複数のポストを有する構成とすると共に、前記複数のポストの長さを、中心部における長さに対し、外周部における長さを長く設定したことを特徴とする半導体装置。 With a structure having a plurality of posts and deformable constituting said connecting member, characterized in that the length of the plurality of posts, with respect to the length in the central portion was set longer length in the outer peripheral portion the semiconductor device according to.
  2. 請求項1記載の半導体装置において、 The semiconductor device according to claim 1,
    前記複数のポストの断面積を、中心部における断面積に対し、外周部における断面積が小さくなるよう設定したことを特徴とする半導体装置。 Wherein the plurality of the cross-sectional area of the post, with respect to the cross-sectional area at the central portion, and wherein a set so that the cross section at the outer peripheral portion becomes smaller.
  3. 請求項1または2記載の半導体装置において、 The semiconductor device according to claim 1 or 2, wherein,
    前記複数のポストの配設密度を、中心部における配設密度に対し、外周部における配設密度が低くなるよう設定したことを特徴とする半導体装置。 The semiconductor device characterized by the arrangement density of said plurality of posts, with respect to arrangement density in the central portion, the arrangement density of the outer peripheral portion is set to be lower.
  4. 請求項1乃至のいずれか1項に記載の半導体装置において、 The semiconductor device according to any one of claims 1 to 3,
    前記接続部材を前記放熱部材と一体化したことを特徴とする半導体装置。 The semiconductor device, characterized in that said connecting member is integral with the heat dissipation member.
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