JP3916407B2 - 積層型電子部品実装済部品の製造方法、電子部品実装済完成品の製造方法、及び電子部品実装済完成品 - Google Patents

積層型電子部品実装済部品の製造方法、電子部品実装済完成品の製造方法、及び電子部品実装済完成品 Download PDF

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Publication number
JP3916407B2
JP3916407B2 JP2001080441A JP2001080441A JP3916407B2 JP 3916407 B2 JP3916407 B2 JP 3916407B2 JP 2001080441 A JP2001080441 A JP 2001080441A JP 2001080441 A JP2001080441 A JP 2001080441A JP 3916407 B2 JP3916407 B2 JP 3916407B2
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Japan
Prior art keywords
electronic component
component
circuit pattern
base material
finished product
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2001080441A
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English (en)
Japanese (ja)
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JP2002280744A5 (enExample
JP2002280744A (ja
Inventor
法人 塚原
尚士 秋口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP2001080441A priority Critical patent/JP3916407B2/ja
Publication of JP2002280744A publication Critical patent/JP2002280744A/ja
Publication of JP2002280744A5 publication Critical patent/JP2002280744A5/ja
Application granted granted Critical
Publication of JP3916407B2 publication Critical patent/JP3916407B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Credit Cards Or The Like (AREA)
  • Ceramic Capacitors (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
JP2001080441A 2001-03-21 2001-03-21 積層型電子部品実装済部品の製造方法、電子部品実装済完成品の製造方法、及び電子部品実装済完成品 Expired - Fee Related JP3916407B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001080441A JP3916407B2 (ja) 2001-03-21 2001-03-21 積層型電子部品実装済部品の製造方法、電子部品実装済完成品の製造方法、及び電子部品実装済完成品

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001080441A JP3916407B2 (ja) 2001-03-21 2001-03-21 積層型電子部品実装済部品の製造方法、電子部品実装済完成品の製造方法、及び電子部品実装済完成品

Publications (3)

Publication Number Publication Date
JP2002280744A JP2002280744A (ja) 2002-09-27
JP2002280744A5 JP2002280744A5 (enExample) 2005-05-19
JP3916407B2 true JP3916407B2 (ja) 2007-05-16

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001080441A Expired - Fee Related JP3916407B2 (ja) 2001-03-21 2001-03-21 積層型電子部品実装済部品の製造方法、電子部品実装済完成品の製造方法、及び電子部品実装済完成品

Country Status (1)

Country Link
JP (1) JP3916407B2 (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003332749A (ja) 2002-01-11 2003-11-21 Denso Corp 受動素子内蔵基板、その製造方法及び受動素子内蔵基板形成用素板
JP4016810B2 (ja) * 2002-11-15 2007-12-05 株式会社デンソー スピーカ付基板及びその製造方法
JP4489411B2 (ja) * 2003-01-23 2010-06-23 新光電気工業株式会社 電子部品実装構造の製造方法
JP4660259B2 (ja) * 2004-06-10 2011-03-30 三洋電機株式会社 半導体装置の製造方法
JP2006332094A (ja) 2005-05-23 2006-12-07 Seiko Epson Corp 電子基板の製造方法及び半導体装置の製造方法並びに電子機器の製造方法
JP5147678B2 (ja) 2008-12-24 2013-02-20 新光電気工業株式会社 微細配線パッケージの製造方法
KR101084252B1 (ko) * 2010-03-05 2011-11-17 삼성전기주식회사 전자소자 내장형 인쇄회로기판 및 그 제조방법
JP5484532B2 (ja) * 2012-08-13 2014-05-07 新光電気工業株式会社 微細配線パッケージ
DE102021000556A1 (de) 2021-02-03 2022-08-04 Giesecke+Devrient Mobile Security Gmbh Verfahren zur Herstellung einer Chipkarte, Kartenkörper für eine Chipkarte und Chipkarte
CN116090496A (zh) * 2021-11-08 2023-05-09 捷德移动安全有限责任公司 制造多层芯片卡的方法及多层芯片卡

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Publication number Publication date
JP2002280744A (ja) 2002-09-27

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