JP3854233B2 - ワイヤボンディング方法 - Google Patents

ワイヤボンディング方法 Download PDF

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Publication number
JP3854233B2
JP3854233B2 JP2003038313A JP2003038313A JP3854233B2 JP 3854233 B2 JP3854233 B2 JP 3854233B2 JP 2003038313 A JP2003038313 A JP 2003038313A JP 2003038313 A JP2003038313 A JP 2003038313A JP 3854233 B2 JP3854233 B2 JP 3854233B2
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JP
Japan
Prior art keywords
bump
conductor
bonding
wire
capillary
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Expired - Lifetime
Application number
JP2003038313A
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English (en)
Japanese (ja)
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JP2004247673A (ja
Inventor
竜成 三井
広司 渡辺
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Shinkawa Ltd
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Shinkawa Ltd
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Publication date
Application filed by Shinkawa Ltd filed Critical Shinkawa Ltd
Priority to JP2003038313A priority Critical patent/JP3854233B2/ja
Priority to TW092135142A priority patent/TW200416911A/zh
Priority to KR1020040000473A priority patent/KR100577586B1/ko
Publication of JP2004247673A publication Critical patent/JP2004247673A/ja
Application granted granted Critical
Publication of JP3854233B2 publication Critical patent/JP3854233B2/ja
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/78Apparatus for connecting with wire connectors
    • EFIXED CONSTRUCTIONS
    • E04BUILDING
    • E04BGENERAL BUILDING CONSTRUCTIONS; WALLS, e.g. PARTITIONS; ROOFS; FLOORS; CEILINGS; INSULATION OR OTHER PROTECTION OF BUILDINGS
    • E04B2/00Walls, e.g. partitions, for buildings; Wall construction with regard to insulation; Connections specially adapted to walls
    • E04B2/02Walls, e.g. partitions, for buildings; Wall construction with regard to insulation; Connections specially adapted to walls built-up from layers of building elements
    • E04B2/42Walls having cavities between, as well as in, the elements; Walls of elements each consisting of two or more parts, kept in distance by means of spacers, at least one of the parts having cavities
    • EFIXED CONSTRUCTIONS
    • E04BUILDING
    • E04BGENERAL BUILDING CONSTRUCTIONS; WALLS, e.g. PARTITIONS; ROOFS; FLOORS; CEILINGS; INSULATION OR OTHER PROTECTION OF BUILDINGS
    • E04B2/00Walls, e.g. partitions, for buildings; Wall construction with regard to insulation; Connections specially adapted to walls
    • E04B2/02Walls, e.g. partitions, for buildings; Wall construction with regard to insulation; Connections specially adapted to walls built-up from layers of building elements
    • E04B2002/0256Special features of building elements
    • E04B2002/026Splittable building elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
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    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
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    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L2224/48479Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding) the connecting portion being a wedge bond, i.e. wedge on pre-ball on the semiconductor or solid-state body
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    • H01L2224/4848Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding) the connecting portion being a wedge bond, i.e. wedge on pre-ball outside the semiconductor or solid-state body
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    • H01L2224/7825Means for applying energy, e.g. heating means
    • H01L2224/783Means for applying energy, e.g. heating means by means of pressure
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    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/15786Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
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  • Engineering & Computer Science (AREA)
  • Architecture (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Civil Engineering (AREA)
  • Structural Engineering (AREA)
  • Wire Bonding (AREA)
JP2003038313A 2003-02-17 2003-02-17 ワイヤボンディング方法 Expired - Lifetime JP3854233B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2003038313A JP3854233B2 (ja) 2003-02-17 2003-02-17 ワイヤボンディング方法
TW092135142A TW200416911A (en) 2003-02-17 2003-12-12 Wire bonding method
KR1020040000473A KR100577586B1 (ko) 2003-02-17 2004-01-06 와이어본딩 방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003038313A JP3854233B2 (ja) 2003-02-17 2003-02-17 ワイヤボンディング方法

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JP2004247673A JP2004247673A (ja) 2004-09-02
JP3854233B2 true JP3854233B2 (ja) 2006-12-06

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KR (1) KR100577586B1 (enExample)
TW (1) TW200416911A (enExample)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4625858B2 (ja) * 2008-09-10 2011-02-02 株式会社カイジョー ワイヤボンディング方法、ワイヤボンディング装置及びワイヤボンディング制御プログラム

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TW200416911A (en) 2004-09-01
JP2004247673A (ja) 2004-09-02
KR20040074913A (ko) 2004-08-26
KR100577586B1 (ko) 2006-05-08
TWI302721B (enExample) 2008-11-01

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