JP3850341B2 - Wiring board - Google Patents

Wiring board Download PDF

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Publication number
JP3850341B2
JP3850341B2 JP2002176313A JP2002176313A JP3850341B2 JP 3850341 B2 JP3850341 B2 JP 3850341B2 JP 2002176313 A JP2002176313 A JP 2002176313A JP 2002176313 A JP2002176313 A JP 2002176313A JP 3850341 B2 JP3850341 B2 JP 3850341B2
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Prior art keywords
connection pad
semiconductor element
wiring board
insulating base
wiring
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JP2002176313A
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JP2004022841A (en
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拓 松寺
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Kyocera Corp
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Kyocera Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]

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  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Description

【０００１】
【発明の属する技術分野】
本発明は半導体素子が搭載収容される半導体素子収納用パッケージ等に用いられる配線基板に関するものである。
【０００２】
【従来の技術】
従来、半導体素子が搭載される配線基板は、例えば酸化アルミニウム質焼結体やガラスセラミック焼結体等の電気絶縁材料から成り、その表面に半導体素子が搭載される搭載部を有する絶縁基体と、絶縁基体の半導体素子搭載部またはその周辺から下面にかけて導出される、例えばタングステンやモリブデン等の高融点金属粉末から成る複数個の配線導体と、絶縁基体の下面に形成され、前記配線導体と電気的に接続された複数個の接続パッドとから構成されており、絶縁基体の搭載部に半導体素子をガラス、樹脂、ロウ材等から成る接着材を介して接着固定させるとともに半導体素子の各電極と配線導体とをボンディングワイヤ等の電気的接続手段を介して電気的に接続し、しかる後、必要に応じて前記半導体素子を蓋体や封止樹脂で気密封止させることによって半導体装置となる。
【０００３】
かかる半導体装置は、外部電気回路基板上に、該外部電気回路基板の回路配線と絶縁基体下面の接続パッドとが、間に錫−鉛半田等の低融点ロウ材を挟んで対向するよう載置させ、しかる後、前記低融点ロウ材を約２００℃〜３００℃の温度で過熱溶融させ、外部電気回路基板の回路配線と絶縁基体下面の接続パッドとを接合させることにより外部電気回路基板に実装され、同時に配線基板に搭載されている半導体素子の各電極が配線導体および低融点ロウ材を介して外部電気回路基板に電気的に接続されることとなる。
【０００４】
【発明が解決しようとする課題】
しかしながら、上記従来の半導体素子が搭載される配線基板は絶縁基体が酸化アルミニウム質焼結体等のセラミックス材料で形成されており、その熱膨張係数が約４×１０-6／℃〜１０×１０-6／℃であるのに対し、外部電気回路基板は一般にガラスエポキシ樹脂等の樹脂材で形成されており、その熱膨張係数が３０×１０-6／℃〜５０×１０-6／℃であり、大きく相違することから、外部電気回路基板上に半導体装置を実装した後、半導体素子の作動時に発する熱が配線基板の絶縁基体と外部電気回路基板に繰り返し作用すると、両者間に両者の熱膨張係数の差に起因して水平方向に大きな熱応力が繰り返し生じ、この熱応力の繰り返しによって接続パッドと外部電気回路基板とを接合する錫−鉛半田等の低融点ロウ材の接続パッドとの界面付近の端部から亀裂が生じるとともにこれが前記界面に沿って進行し、最終的には低融点ロウ材に破断が発生し、半導体素子と外部電気回路との電気的接続が短期間で破れてしまうという問題があった。
【０００５】
特に、低融点ロウ材として、従来の錫−鉛半田に代わり、錫−銀−ビスマス系等の鉛非含有半田が用いられるようになると、このような鉛非含有半田は、ビスマス等の成分の偏析等により接続パッドに対する接合強度が低くなりやすいため、低融点ロウ材の破断の発生がより顕著なものになる。
【０００６】
本発明は、従来の配線基板における上記問題点に鑑み案出されたもので、その目的は、絶縁基体の接続パッドと外部電気回路基板の回路配線とを接合する低融点ロウ材に破断が発生するのを有効に防止し、配線基板に搭載される半導体素子等の各電極を外部電気回路に長期間にわたり確実、強固に電気的接続することができる長期信頼性に優れた配線基板を提供することにある。
【０００７】
【課題を解決するための手段】
本発明の配線基板は、電気絶縁材料から成り、表面に半導体素子搭載部を有する絶縁基体と、該絶縁基体の下面に形成された多数の接続パッドと、前記絶縁基体の前記搭載部から前記接続パッドにかけて導出される複数個の配線導体とから成る配線基板であって、前記各接続パッドの外縁に沿った前記絶縁基体の下面に環状の凹部が形成され、該凹部の少なくとも内周側面に前記接続パッドが延出されていることを特徴とするものである。
【０００８】
本発明の配線基板によれば、接続パッドの外縁に沿った絶縁基体の下面に環状の凹部を形成するとともに、該凹部の少なくとも内周側面に前記接続パッドを延出させたことから、低融点ロウ材と接続パッドとの接合面の端部は熱応力が作用する方向に対してほぼ直角方向となり、半導体素子の作動時に発する熱が配線基板の絶縁基体と外部電気回路基板に繰り返し作用し、両者間に両者の熱膨張係数の差に起因して水平方向に大きな熱応力が繰り返し生じたとしても、低融点ロウ材と接続パッドとの接合面の端部に大きな熱応力が集中的に作用して低融点ロウ材が短期間で破断するようなことはほとんどなく、これによって接続パッドと外部電気回路基板の回路配線とを確実、強固に電気的接続することができるとともに半導体素子の外部電気回路への接続を長期信頼性に優れたものとなすことが可能となる。
【０００９】
【発明の実施の形態】
次に本発明を添付の図面を基にして詳細に説明する。
図１は、本発明の配線基板を使用した半導体素子収納用パッケージの一実施例を示す断面図であり、１は絶縁基体、２は配線導体である。この絶縁基体１と配線導体２とで半導体素子３を搭載する配線基板４が構成される。
【００１０】
前記絶縁基体１は、例えば酸化アルミニウム質焼結体、窒化アルミニウム質焼結体、ムライト質焼結体、炭化珪素質焼結体、ガラスセラミック焼結体等の電気絶縁材料から成り、その上面に半導体素子３が搭載収容される収納部１ａを有し、該収納部１ａ底面には半導体素子３がガラスや樹脂、ロウ材等の接着材を介して接着固定される。
【００１１】
前記絶縁基体１は、例えば酸化アルミニウム質焼結体から成る場合、酸化アルミニウム、酸化珪素、酸化カルシウム、酸化マグネシウム等の原料粉末に適当な有機バインダー、溶剤を添加混合して泥漿状のセラミックスラリーとなすとともに該セラミックスラリーを従来周知のドクターブレード法やカレンダーロール法等のシート成型技術を採用してシート状のセラミックグリーンシート（セラミック生シート）を得、しかる後、前記セラミックグリーンシートを切断加工や打ち抜き加工により適当な形状とするとともにこれを複数枚積層し、最後に前記積層されたセラミックグリーンシートを還元雰囲気中、約１６００℃の温度で焼成することによって製作される。
【００１２】
また前記絶縁基体１は、その収納部１ａ周辺から下面にかけて多数の配線導体２が被着形成されており、該配線導体２の収納部１ａ周辺部位には半導体素子３の各電極がボンディングワイヤ５を介して電気的に接続され、また絶縁基体１下面に導出された部位には配線導体２と電気的に接続する複数の接続パッド６が形成されている。
【００１３】
前記配線導体２および接続パッド６は、半導体素子３の電極を外部電気回路に接続する作用をなし、例えばタングステン、モリブデン、マンガン等の高融点金属粉末から成り、タングステン等の高融点金属粉末に適当な有機バインダーや溶剤を添加混合して得た金属ペーストを絶縁基体１となるセラミックグリーンシートに予め従来周知のスクリーン印刷法により所定パターンに印刷塗布しておくことによって、絶縁基体１の収納部１ａ周辺から下面にかけて被着形成される。
【００１４】
また前記接続パッド６は、配線基板４を外部電気回路基板に実装する外部端子として作用し、低融点ロウ材を介して外部電気回路基板の回路配線に接合され、これにより半導体素子３の電極が外部電気回路基板の回路配線と電気的に接続される。
【００１５】
更に、前記接続パッド６の外縁に沿った絶縁基体１下面には、図２および図３に示すように、環状の凹部６ａが形成され、該凹部６ａの少なくとも内周側面に接続パッド６が延出されている。
【００１６】
前記接続パッド６の外縁に沿った絶縁基体１下面に環状の凹部６ａを形成するとともに、該凹部６ａの少なくとも内周側面に接続パッド６を延出させておくと、低融点ロウ材と接続パッド６との接合面の端部は熱応力が作用する方向に対してほぼ直角方向となり、半導体素子３の作動時に発する熱が配線基板４の絶縁基体１と外部電気回路基板に繰り返し作用し、両者間に両者の熱膨張係数の差に起因して水平方向に大きな熱応力が繰り返し生じたとしても、低融点ロウ材と接続パッド６との接合面の端部に大きな熱応力が集中的に作用して低融点ロウ材が短期間で破断するようなことはほとんどなく、これによって接続パッド６と外部電気回路基板の回路配線とを確実、強固に電気的接続することができるとともに半導体素子３の外部電気回路への接続を長期信頼性に優れたものとなすことが可能となる。
【００１７】
なお、前記環状の凹部６ａは、その深さが２０μｍ未満になると、接続パッド６と低融点ロウ材との接合面の端部を熱応力が作用する方向に対して充分に乖離させることができず低融点ロウ材と接続パッド６との接合の信頼性が低下するおそれがある。従って、前記環状の凹部６ａは、その深さを２０μｍ以上としておくことが好ましい。
【００１８】
また前記凹部６ａは、絶縁基体１と成るセラミックグリーンシートのうち接続パッド６の外縁に相当する部位に対して、環状の金型を押圧する機械的な加工や、レーザー光の照射等によるエッチング加工等の加工を施すことにより形成される。
【００１９】
更に前記凹部６ａ内周側面に接続パッド６を延出させる方法としては、接続パッド６となる金属ペーストを絶縁基体１となるセラミックグリーンシートの表面に印刷する際、使用するスクリーン製版のパターンを接続パッド６のパターンよりも、例えば全周にわたって１０μｍ程度の幅で、大きくしておき、金属ペーストの一部が凹部の内周側面にまで供給されるようにすることによって行われる。
【００２０】
また更に前記凹部６ａの内周側面に延出された接続パッド６の延出部分は、その外周の上下端縁部分を円弧状に面取りしておくと、低融点ロウ材を接合したとき、この外周の上下端縁部分に熱応力が集中し、この部分から低融点ロウ材に亀裂等の機械的な破壊が発生することを効果的に防止することができる。従って、前記環状の凹部６ａの内周側面に延出された接続パッド６の延出部分は、その外周の上下端縁部分を円弧状に面取りしておくことが好ましい。
【００２１】
前記接続パッド６の延出部分は、１０μｍ〜４０μｍの厚みで形成すると、スクリーン印刷法等による形成時の厚み制御を容易とすることができ、また内部応力の増大等を防止し凹部内面に対する被着強度を確保することができる。従って、前記接続パッド６の凹部６ａ内への延出部分は、その厚みを１０μｍ〜４０μｍの範囲とすることが好ましい。
【００２２】
さらに前記接続パッド６の延出部分は、その下端部分が凹部６ａの底面にまで達するようにして形成しておくと、この延出部分の凹部６ａ内面に対する被着の面積と、この延出部分に接合される低融点ロウ材の接合面積とをより一層大きく確保し、接続パッドと絶縁基体との被着強度、および接続パッドと低融点ロウ材との接合強度をより大きくすることができ、配線基板と外部電気回路基板との接続の信頼性をより一層良好とすることができる。従って、前記接続パッド６の延出部分は、その下端部分が凹部６ａの底面にまで達するようにして形成しておくことが好ましい。
【００２３】
前記配線導体２および接続パッド６は、またその露出する領域に、ニッケル、銅、金等の低融点ロウ材に対する濡れ性およびボンディング性に優れた金属からなるめっき層を、例えばニッケルまたは銅を約１μｍ〜１０μｍ、金を０．０５μｍ〜５μｍの厚さで順次、被着させておくと、配線導体２および接続パッド６の酸化腐食を効果的に防ぐことができるとともに、接続パッド６に対し低融点ロウ材やボンディングワイヤ５を強固に接合、接続させることができる。従って、前記配線導体２および接続パッド６はその表面にニッケル、銅、金等のめっき層を約１μｍ〜１５μｍの厚さで被着させておくことが好ましい。
【００２４】
かくして本発明の配線基板によれば、絶縁基体１の収納部１ａ底面に半導体素子３をガラスや樹脂、ロウ材等の接着剤を介して接着固定するとともにこの半導体素子３の各電極を配線導体２にボンディングワイヤ５を介して電気的に接続し、しかる後、絶縁基体１の上面に金属やセラミックスから成る蓋体７をガラスや樹脂、ロウ材等の封止材を介して接合させ、絶縁基体１と蓋体７とから成る容器内部に半導体素子３を気密に収容することによって製品としての半導体装置が完成する。
【００２５】
なお、本発明の配線基板は上述の実施の形態に限定されるものではなく、本発明の要旨を逸脱しない範囲であれば種々の変更は可能であり、例えば、上記の実施例では本発明の配線基板を半導体素子収納用パッケージに用いた例について説明したが、これを混成集積回路基板等に用いてもよい。
【００２６】
【発明の効果】
本発明の配線基板によれば、接続パッドの外縁に沿った絶縁基体の下面に環状の凹部を形成するとともに、該凹部の少なくとも内周側面に前記接続パッドを延出させたことから、低融点ロウ材と接続パッドとの接合面の端部は熱応力が作用する方向に対してほぼ直角方向となり、半導体素子の作動時に発する熱が配線基板の絶縁基体と外部電気回路基板に繰り返し作用し、両者間に両者の熱膨張係数の差に起因して水平方向に大きな熱応力が繰り返し生じたとしても、低融点ロウ材と接続パッドとの接合面の端部に大きな熱応力が集中的に作用して低融点ロウ材が短期間で破断するようなことはほとんどなく、これによって接続パッドと外部電気回路基板の回路配線とを確実、強固に電気的接続することができるとともに半導体素子の外部電気回路への接続を長期信頼性に優れたものとなすことが可能となる。
【図面の簡単な説明】
【図１】本発明の配線基板の一実施例を示す断面図である。
【図２】図１に示す配線基板の要部拡大断面図である。
【図３】図１に示す配線基板の要部拡大平面図である。
【符号の説明】
１・・・・絶縁基体
１ａ・・・収納部
２・・・・配線導体
３・・・・半導体素子
４・・・・配線基板
５・・・・ボンディングワイヤ
６・・・・接続パッド
６ａ・・・環状の凹部
７・・・・蓋体[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a wiring board used for a semiconductor element housing package or the like on which a semiconductor element is mounted and accommodated.
[0002]
[Prior art]
Conventionally, a wiring board on which a semiconductor element is mounted is made of an electrically insulating material such as an aluminum oxide sintered body or a glass ceramic sintered body, and an insulating substrate having a mounting portion on which the semiconductor element is mounted on the surface thereof, A plurality of wiring conductors made of a refractory metal powder such as tungsten or molybdenum, which are led out from the semiconductor element mounting portion of the insulating base or its periphery to the bottom surface, and formed on the bottom surface of the insulating base, and electrically connected to the wiring conductor A plurality of connection pads connected to the semiconductor substrate, and the semiconductor element is bonded and fixed to the mounting portion of the insulating base via an adhesive made of glass, resin, brazing material, etc., and each electrode and wiring of the semiconductor element The conductor is electrically connected via an electrical connection means such as a bonding wire, and then the semiconductor element is hermetically sealed with a lid or a sealing resin as necessary. A semiconductor device by causing locked.
[0003]
Such a semiconductor device is mounted on an external electric circuit board so that the circuit wiring of the external electric circuit board and the connection pads on the lower surface of the insulating base are opposed to each other with a low melting point brazing material such as tin-lead solder interposed therebetween. After that, the low melting point brazing material is heated and melted at a temperature of about 200 ° C. to 300 ° C., and the circuit wiring of the external electric circuit board and the connection pads on the lower surface of the insulating base are joined to each other to be mounted on the external electric circuit board. At the same time, each electrode of the semiconductor element mounted on the wiring board is electrically connected to the external electric circuit board through the wiring conductor and the low melting point brazing material.
[0004]
[Problems to be solved by the invention]
However, the wiring substrate on which the conventional semiconductor element is mounted has an insulating base made of a ceramic material such as an aluminum oxide sintered body, and has a thermal expansion coefficient of about 4 × 10 −6 / ° C. to 10 × 10. The external electric circuit board is generally formed of a resin material such as a glass epoxy resin, and its thermal expansion coefficient is 30 × 10 −6 / ° C. to 50 × 10 −6 / ° C. After mounting the semiconductor device on the external electric circuit board, the heat generated during the operation of the semiconductor element repeatedly acts on the insulating substrate of the wiring board and the external electric circuit board. A large thermal stress is repeatedly generated in the horizontal direction due to the difference in the expansion coefficient, and the connection between the connection pad and the external electric circuit board due to the repetition of the thermal stress is caused between the connection pad of the low melting point solder such as tin-lead solder. World A crack is generated from an end portion in the vicinity and this proceeds along the interface, and eventually the low melting point brazing material is broken, and the electrical connection between the semiconductor element and the external electric circuit is broken in a short period of time. There was a problem.
[0005]
In particular, when a lead-free solder such as a tin-silver-bismuth system is used instead of the conventional tin-lead solder as the low melting point brazing material, such a lead-free solder is composed of components such as bismuth. Since the bonding strength to the connection pad tends to be low due to segregation or the like, the occurrence of breakage of the low melting point brazing material becomes more remarkable.
[0006]
The present invention has been devised in view of the above-mentioned problems in the conventional wiring board, and its purpose is to break the low melting point brazing material that joins the connection pad of the insulating base and the circuit wiring of the external electric circuit board. Provided is a wiring board excellent in long-term reliability, which can effectively prevent the occurrence of such a problem and can securely and firmly electrically connect each electrode such as a semiconductor element mounted on the wiring board to an external electric circuit for a long period of time. There is.
[0007]
[Means for Solving the Problems]
The wiring board of the present invention comprises an insulating base made of an electrically insulating material and having a semiconductor element mounting portion on its surface, a large number of connection pads formed on the lower surface of the insulating base, and the connection from the mounting portion of the insulating base. A wiring board comprising a plurality of wiring conductors led out over a pad, wherein an annular recess is formed on the lower surface of the insulating base along the outer edge of each connection pad, and at least an inner peripheral side surface of the recess The connection pad is extended.
[0008]
According to the wiring board of the present invention, the annular recess is formed on the lower surface of the insulating base along the outer edge of the connection pad, and the connection pad is extended to at least the inner peripheral side surface of the recess. The end portion of the bonding surface between the brazing material and the connection pad is substantially perpendicular to the direction in which the thermal stress acts, and the heat generated during the operation of the semiconductor element repeatedly acts on the insulating substrate of the wiring board and the external electric circuit board, Even if a large thermal stress is repeatedly generated in the horizontal direction due to the difference in thermal expansion coefficient between the two, a large thermal stress acts intensively at the end of the joint surface between the low melting point brazing material and the connection pad. As a result, the low melting point brazing material hardly breaks in a short period of time, so that the connection pad and the circuit wiring of the external electric circuit board can be securely and firmly connected to each other and the external electric power of the semiconductor element can be connected. It is possible to form with excellent connection to the circuit in long-term reliability.
[0009]
DETAILED DESCRIPTION OF THE INVENTION
The present invention will now be described in detail with reference to the accompanying drawings.
FIG. 1 is a cross-sectional view showing an embodiment of a package for housing a semiconductor element using a wiring board of the present invention, wherein 1 is an insulating substrate and 2 is a wiring conductor. The insulating substrate 1 and the wiring conductor 2 constitute a wiring board 4 on which the semiconductor element 3 is mounted.
[0010]
The insulating base 1 is made of an electrically insulating material such as an aluminum oxide sintered body, an aluminum nitride sintered body, a mullite sintered body, a silicon carbide sintered body, a glass ceramic sintered body, and the like on its upper surface. The semiconductor device 3 has a storage portion 1a on which the semiconductor element 3 is mounted and accommodated, and the semiconductor element 3 is bonded and fixed to the bottom surface of the storage portion 1a via an adhesive such as glass, resin, or brazing material.
[0011]
When the insulating substrate 1 is made of, for example, an aluminum oxide sintered body, an appropriate organic binder and solvent are added to and mixed with raw material powders such as aluminum oxide, silicon oxide, calcium oxide, and magnesium oxide to form a slurry ceramic slurry. At the same time, the ceramic slurry is made into a sheet-like ceramic green sheet (ceramic green sheet) by employing a conventionally known sheet molding technique such as a doctor blade method or a calender roll method, and then the ceramic green sheet is cut and processed. It is manufactured by forming a suitable shape by punching and laminating a plurality of them, and finally firing the laminated ceramic green sheets at a temperature of about 1600 ° C. in a reducing atmosphere.
[0012]
The insulating base 1 has a large number of wiring conductors 2 formed from the periphery of the housing portion 1a to the lower surface, and each electrode of the semiconductor element 3 is bonded to the bonding wire 5 around the housing portion 1a of the wiring conductor 2. A plurality of connection pads 6 that are electrically connected to each other and are electrically connected to the wiring conductor 2 are formed at a portion led out to the lower surface of the insulating base 1.
[0013]
The wiring conductor 2 and the connection pad 6 serve to connect the electrode of the semiconductor element 3 to an external electric circuit, and are made of a refractory metal powder such as tungsten, molybdenum, manganese, etc., and are suitable for a refractory metal powder such as tungsten. A metal paste obtained by adding and mixing various organic binders and a solvent is preliminarily printed and applied in a predetermined pattern on a ceramic green sheet to be the insulating substrate 1 by a well-known screen printing method. It is deposited from the periphery to the bottom surface.
[0014]
The connection pad 6 acts as an external terminal for mounting the wiring board 4 on the external electric circuit board, and is joined to the circuit wiring of the external electric circuit board through a low melting point brazing material, whereby the electrodes of the semiconductor element 3 are connected. It is electrically connected to the circuit wiring of the external electric circuit board.
[0015]
Further, as shown in FIGS. 2 and 3, an annular recess 6a is formed on the lower surface of the insulating base 1 along the outer edge of the connection pad 6, and the connection pad 6 extends at least on the inner peripheral side surface of the recess 6a. Has been issued.
[0016]
When the annular recess 6a is formed on the lower surface of the insulating base 1 along the outer edge of the connection pad 6, and the connection pad 6 is extended to at least the inner peripheral surface of the recess 6a, the low melting point brazing material and the connection pad are obtained. 6 is substantially perpendicular to the direction in which the thermal stress acts, and heat generated during the operation of the semiconductor element 3 repeatedly acts on the insulating base 1 of the wiring board 4 and the external electric circuit board. Even if a large thermal stress is repeatedly generated in the horizontal direction due to the difference in thermal expansion coefficient between them, the large thermal stress acts intensively at the end of the joint surface between the low melting point brazing material and the connection pad 6. As a result, the low melting point brazing material hardly breaks in a short period of time, so that the connection pad 6 and the circuit wiring of the external electric circuit board can be reliably and firmly electrically connected, and the semiconductor element 3 External electricity It is possible to form with excellent connection to the road in long-term reliability.
[0017]
When the depth of the annular recess 6a is less than 20 μm, the end of the joint surface between the connection pad 6 and the low melting point brazing material can be sufficiently separated from the direction in which the thermal stress acts. Therefore, the reliability of bonding between the low melting point brazing material and the connection pad 6 may be reduced. Therefore, it is preferable that the annular recess 6a has a depth of 20 μm or more.
[0018]
The concave portion 6a is formed by mechanical processing for pressing an annular mold against a portion corresponding to the outer edge of the connection pad 6 in the ceramic green sheet to be the insulating base 1, or etching processing by laser light irradiation or the like. It is formed by processing such as.
[0019]
Further, as a method of extending the connection pad 6 on the inner peripheral side surface of the recess 6a, when printing the metal paste to be the connection pad 6 on the surface of the ceramic green sheet to be the insulating base 1, the screen plate pattern to be used is connected. For example, the pattern is made larger than the pattern of the pad 6 by, for example, a width of about 10 μm over the entire circumference so that a part of the metal paste is supplied to the inner circumferential side surface of the recess.
[0020]
Further, the extending portion of the connection pad 6 extended to the inner peripheral side surface of the recess 6a is chamfered in an arc shape at the outer peripheral upper and lower edge portions, and when the low melting point brazing material is joined, It is possible to effectively prevent thermal stress from concentrating on the upper and lower edge portions of the outer periphery, and mechanical destruction such as cracks from the low melting point brazing material. Therefore, it is preferable that the extended portion of the connection pad 6 extended to the inner peripheral side surface of the annular recess 6a is chamfered in an arc shape at the upper and lower end edge portions of the outer periphery.
[0021]
If the extending portion of the connection pad 6 is formed to a thickness of 10 μm to 40 μm, it is possible to easily control the thickness during formation by a screen printing method or the like, and it is possible to prevent an increase in internal stress or the like and Wear strength can be secured. Therefore, it is preferable that the thickness of the portion of the connection pad 6 extending into the recess 6a is in the range of 10 to 40 μm.
[0022]
Furthermore, if the extension part of the connection pad 6 is formed so that the lower end part reaches the bottom surface of the recess 6a, the area of the extension part attached to the inner surface of the recess 6a, and the extension part The bonding area of the low melting point brazing material to be bonded to is further increased, the adhesion strength between the connection pad and the insulating base, and the bonding strength between the connection pad and the low melting point brazing material can be further increased. The connection reliability between the wiring board and the external electric circuit board can be further improved. Therefore, it is preferable that the extended portion of the connection pad 6 is formed so that the lower end portion reaches the bottom surface of the recess 6a.
[0023]
The wiring conductor 2 and the connection pad 6 have a plating layer made of a metal excellent in wettability and bonding property with respect to a low melting point brazing material such as nickel, copper, and gold, for example, nickel or copper. By sequentially depositing 1 μm to 10 μm and gold in a thickness of 0.05 μm to 5 μm, it is possible to effectively prevent oxidative corrosion of the wiring conductor 2 and the connection pad 6, and to reduce the connection pad 6. The melting point brazing material and the bonding wire 5 can be firmly bonded and connected. Therefore, it is preferable that a plating layer of nickel, copper, gold or the like is deposited on the surface of the wiring conductor 2 and the connection pad 6 with a thickness of about 1 μm to 15 μm.
[0024]
Thus, according to the wiring board of the present invention, the semiconductor element 3 is bonded and fixed to the bottom surface of the housing portion 1a of the insulating base 1 through an adhesive such as glass, resin, or brazing material, and each electrode of the semiconductor element 3 is connected to the wiring conductor. 2 are electrically connected to each other through a bonding wire 5, and then a lid 7 made of metal or ceramics is joined to the upper surface of the insulating substrate 1 through a sealing material such as glass, resin, or brazing material for insulation. A semiconductor device as a product is completed by housing the semiconductor element 3 in a container composed of the base 1 and the lid 7 in an airtight manner.
[0025]
The wiring board of the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the gist of the present invention. Although the example in which the wiring board is used for the package for housing semiconductor elements has been described, this may be used for a hybrid integrated circuit board or the like.
[0026]
【The invention's effect】
According to the wiring board of the present invention, the annular recess is formed on the lower surface of the insulating base along the outer edge of the connection pad, and the connection pad is extended to at least the inner peripheral side surface of the recess. The end portion of the bonding surface between the brazing material and the connection pad is substantially perpendicular to the direction in which the thermal stress acts, and the heat generated during the operation of the semiconductor element repeatedly acts on the insulating substrate of the wiring board and the external electric circuit board, Even if a large thermal stress is repeatedly generated in the horizontal direction due to the difference in thermal expansion coefficient between the two, a large thermal stress acts intensively at the end of the joint surface between the low melting point brazing material and the connection pad. As a result, the low melting point brazing material hardly breaks in a short period of time, so that the connection pad and the circuit wiring of the external electric circuit board can be securely and firmly connected to each other and the external electric power of the semiconductor element can be connected. It is possible to form with excellent connection to the circuit in long-term reliability.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing an embodiment of a wiring board according to the present invention.
FIG. 2 is an enlarged cross-sectional view of a main part of the wiring board shown in FIG.
FIG. 3 is an enlarged plan view of a main part of the wiring board shown in FIG. 1;
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Insulation base | substrate 1a ... Storage part 2 ... Wiring conductor 3 ... Semiconductor element 4 ... Wiring board 5 ... Bonding wire 6 ... Connection pad 6a ... .... Circular recess 7 ... lid

Claims (1)

電気絶縁材料から成り、表面に半導体素子搭載部を有する絶縁基体と、該絶縁基体の下面に形成された多数の接続パッドと、前記絶縁基体の前記搭載部から前記接続パッドにかけて導出される複数個の配線導体とから成る配線基板であって、前記各接続パッドの外縁に沿った前記絶縁基体の下面に環状の凹部が形成されているとともに、該凹部の少なくとも内周側面に前記接続パッドが延出されていることを特徴とする配線基板。An insulating base made of an electrically insulating material and having a semiconductor element mounting portion on its surface, a large number of connection pads formed on the lower surface of the insulating base, and a plurality of leads derived from the mounting portion of the insulating base to the connection pads A wiring board comprising a plurality of wiring conductors, wherein an annular recess is formed in a lower surface of the insulating base along an outer edge of each connection pad, and the connection pad extends at least on an inner peripheral side surface of the recess. A wiring board characterized by being provided.
JP2002176313A 2002-06-17 2002-06-17 Wiring board Expired - Fee Related JP3850341B2 (en)

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JP4581903B2 (en) * 2005-08-12 2010-11-17 株式会社村田製作所 Manufacturing method of ceramic electronic component
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