JP2003158220A - Circuit board - Google Patents
Circuit boardInfo
- Publication number
- JP2003158220A JP2003158220A JP2001358714A JP2001358714A JP2003158220A JP 2003158220 A JP2003158220 A JP 2003158220A JP 2001358714 A JP2001358714 A JP 2001358714A JP 2001358714 A JP2001358714 A JP 2001358714A JP 2003158220 A JP2003158220 A JP 2003158220A
- Authority
- JP
- Japan
- Prior art keywords
- external electric
- electric circuit
- wiring
- brazing material
- melting point
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
【０００１】
【発明の属する技術分野】本発明は半導体素子収納用パ
ッケージ等に用いられる配線基板に関し、詳しくは実装
した半導体素子の各電極を所定の外部電気回路に長期間
にわたり安定して電気的に接続させることができる配線
基板に関するものである。
【０００２】
【従来の技術】従来、半導体素子が搭載される配線基板
は、例えばアルミナセラミックス等の電気絶縁材料から
成り、その表面に半導体素子が搭載される搭載部を有す
る絶縁基体と、絶縁基体の半導体素子搭載部またはその
周辺から側面を介し下面にかけて導出される、例えばタ
ングステンやモリブデン等の高融点金属粉末から成る複
数個の配線導体と、絶縁基体の下面に形成され、前記配
線導体と電気的に接続された複数個の平面四角形状をな
す接続パッドとから構成されており、絶縁基体の搭載部
に半導体素子をガラス、樹脂、ロウ材等から成る接着剤
を介して接着固定させるとともに半導体素子の各電極と
配線導体とをボンディングワイヤ等の電気的接続手段を
介して電気的に接続し、しかる後、必要に応じて前記半
導体素子を蓋体や封止樹脂で気密封止させることによっ
て半導体装置となる。
【０００３】かかる半導体装置は、外部電気回路基板上
に、該外部電気回路基板の回路配線と絶縁基体下面の接
続パッドとが、間に錫−鉛半田等の低融点ロウ材を挟ん
で対向するよう載置させ、しかる後、前記低融点ロウ材
を約２００℃〜３００℃の温度で加熱溶融させ、外部電
気回路基板の回路配線と絶縁基体下面の接続パッドとを
接合させることにより外部電気回路基板に実装され、同
時に配線基板に搭載されている半導体素子の各電極が配
線導体および低融点ロウ材を介して外部電気回路基板に
電気的に接続されることとなる。
【０００４】
【発明が解決しようとする課題】しかしながら、上記従
来の半導体素子が搭載される配線基板は絶縁基体が酸化
アルミニウム質焼結体等のセラミックス材料で形成され
ており、その熱膨張係数が約４×１０-6／℃〜１０×１
０-6／℃であるのに対し、外部電気回路基板は一般にガ
ラスエポキシ樹脂等の樹脂材で形成されており、その熱
膨張係数が３０×１０-6／℃〜５０×１０-6／℃であ
り、大きく相異すること、接続パッドは平面四角形状で
あり、各角部に応力が集中し易いこと等から配線基板の
接続パッドと外部電気回路基板の回路配線とを低融点ロ
ウ材を介し接合させて外部電気回路基板上に半導体装置
を実装した後、半導体素子の作動時に発する熱が配線基
板の絶縁基体と外部電気回路基板に繰り返し作用する
と、両者間に両者の熱膨張係数の差に起因して大きな熱
応力が繰り返し生じるとともにこれが接続パッドの各角
部に集中して接続パッドの角部と低融点ロウ材との界面
付近に亀裂が生じ、この亀裂が接続パッドと低融点ロウ
材の界面全体に沿って進行し、最終的には低融点ロウ材
に破断が発生し、半導体素子と外部電気回路との電気的
接続が短期間で破れてしまうという問題があった。
【０００５】本発明は、従来の配線基板における上記問
題点に鑑み案出されたもので、その目的は、絶縁基体の
接続パッドと外部電気回路基板の回路配線とを接合する
低融点ロウ材に破断が発生するのを有効に防止し、半導
体素子の各電極を外部電気回路に長期間にわたり確実、
強固に電気的接続することができる長期信頼性に優れた
配線基板を提供することにある。
【０００６】
【課題を解決するための手段】本発明の配線基板は、電
気絶縁材料から成り、表面に半導体素子搭載部を有する
絶縁基体と、該絶縁基体の下面に形成された多数の接続
パッドと、前記絶縁基体の前記搭載部から前記接続パッ
ドにかけて導出される複数個の配線導体とから成る配線
基板であって、前記各接続パッドは平面が四角形状をな
し、かつ平面の各角部近傍に切り欠き部もしくは窪み部
が形成されていることを特徴とするものである。
【０００７】本発明の配線基板によれば、絶縁基体の下
面に設けた平面四角形状をなす接続パッドの各角部近傍
に切り欠き部もしくは溝部を形成したことから、接続パ
ッドを外部電気回路基板の回路配線に低融点ロウ材を介
して接合した後、低融点ロウ材に配線基板の絶縁基体と
外部電気回路基板の熱膨張係数の差に起因する熱応力が
繰り返し作用した場合、接続パッドの角部と低融点ロウ
材との接合界面付近に前記熱応力によって亀裂が生じる
が該亀裂はその進行が切り欠き部もしくは窪み部で阻止
され、その結果、低融点ロウ材が破断することはほとん
どなく、これによって接続パッドと外部電気回路基板の
回路配線とを確実、強固に電気的接続することができる
とともに半導体素子の外部電気回路への接続を長期信頼
性に優れたものとなすことが可能となる。
【０００８】
【発明の実施の形態】次に本発明を添付の図面を基にし
て詳細に説明する。図１は、本発明の配線基板を使用し
た半導体素子収納用パッケージの一実施例を示す断面図
であり、１は絶縁基体、２は配線導体である。この絶縁
基体１と配線導体２とで半導体素子３を搭載する配線基
板４が構成される。
【０００９】前記絶縁基体１は、例えば酸化アルミニウ
ム質焼結体、窒化アルミニウム質焼結体、ムライト質焼
結体、炭化珪素質焼結体、ガラスセラミック焼結体等の
電気絶縁材料から成り、その上面に半導体素子３が搭載
収容される凹部１ａを有し、該凹部１ａ底面には半導体
素子３がガラスや樹脂、ロウ材等の接着材を介して接着
固定される。
【００１０】前記絶縁基体１は、例えば酸化アルミニウ
ム質焼結体から成る場合、酸化アルミニウム、酸化珪
素、酸化カルシウム、酸化マグネシウム等の原料粉末に
適当な有機バインダー、溶剤を添加混合して泥漿状のセ
ラミックスラリーとなすとともに該セラミックスラリー
を従来周知のドクターブレード法やカレンダーロール法
等のシート成型技術を採用してシート状のセラミックグ
リーンシート（セラミック生シート）を得、しかる後、
前記セラミックグリーンシートを切断加工や打ち抜き加
工により適当な形状とするとともにこれを複数枚積層
し、最後に前記積層されたセラミックグリーンシートを
還元雰囲気中、約１６００℃の温度で焼成することによ
って製作される。
【００１１】また前記絶縁基体１は、その凹部１ａ周辺
から側面を介し下面にかけて多数の配線導体２が被着形
成されており、該配線導体２の凹部１ａ周辺部位には半
導体素子３の各電極がボンディングワイヤ５を介して電
気的に接続され、また絶縁基体１下面に導出された部位
には配線導体２と電気的に接続する複数の平面四角形状
をなす接続パッド６が形成されている。
【００１２】前記配線導体２および接続パッド６は、半
導体素子３の電極を外部電気回路に接続する作用をな
し、例えばタングステン、モリブデン、マンガン等の高
融点金属粉末から成り、タングステン等の高融点金属粉
末に適当な有機バインダーや溶剤を添加混合して得た金
属ペーストを絶縁基体１となるセラミックグリーンシー
トに予め従来周知のスクリーン印刷法により所定パター
ンに印刷塗布しておくことによって、絶縁基体１の凹部
１ａ周辺から下面にかけて被着形成される。
【００１３】また前記接続パッド６は、配線基板４を外
部電気回路基板に実装する外部端子として作用し、低融
点ロウ材７を介して外部電気回路基板８の回路配線８ａ
に接合され、これにより半導体素子３の電極が外部電気
回路基板８の回路配線８ａと電気的に接続される。
【００１４】更に前記接続パッド６は図２および図３に
示すように各角部の近傍に四角形状やＬ字形状の切り欠
き部Ａや窪み部Ｂが形成されており、該切り欠き部Ａや
窪み部Ｂは亀裂の進行を阻止する作用をなす。
【００１５】前記接続パッド６は各角部に切り欠き部Ａ
や窪み部Ｂを形成したことから、接続パッド６を外部電
気回路基板８の回路配線８ａに低融点ロウ材７を介して
接合した後、低融点ロウ材７に配線基板の絶縁基体１と
外部電気回路基板８の熱膨張係数の差に起因する熱応力
が繰り返し作用した場合、接続パッド６の角部と低融点
ロウ材７との接合界面付近に前記熱応力によって亀裂が
生じるが該亀裂はその進行が切り欠き部Ａもしくは窪み
部Ｂで阻止され、その結果、低融点ロウ材７が破断する
ことはほとんどなく、これによって接続パッド６と外部
電気回路基板８の回路配線８ａとを確実、強固に電気的
接続することができるとともに半導体素子３の外部電気
回路への接続を長期信頼性に優れたものとなすことが可
能となる。
【００１６】なお、前記切り欠き部Ａや窪み部Ｂは、例
えば、接続パッド６の各角部の近傍をエッチング加工や
レーザー加工すること等によって所定の四角形状やＬ字
形状に形成される。
【００１７】また前記切り欠き部Ａや窪み部Ｂは、その
外縁部が、各角部から１００μｍ以上離れて位置するよ
うにして形成しておくと、接続パッド６の角部と低融点
ロウ材７との接合界面付近に生じる亀裂の進行を効果的
に阻止することができる。従って、前記切り欠き部Ａや
窪み部Ｂは、その外縁部が、各角部から１００μｍ以上
離れて位置するようにして形成することが好ましく、亀
裂の進行を早期に阻止することを考慮すると各角部から
１００μｍ〜２５０μｍ離れた位置に形成することがよ
り一層好ましい。
【００１８】更に前記切り欠き部Ａや窪み部Ｂは、接続
パッド６の各角部から各辺の方向に対して１００μｍ以
上の範囲まで延在するようにして形成することが好まし
く、接続パッド６と低融点ロウ材７の界面に発生する亀
裂が接続パッド６の角部から多少ずれて発生、進行した
としても、その進行を効果的に阻止することができる。
【００１９】また更に、前記切り欠き部Ａや窪み部Ｂ
は、図３に示すように、その幅Ｗ２、Ｗ３が、形成され
る接続パッド６の幅Ｗ１に対して５％未満となると亀裂
の進行を有効に防止するのが困難となる傾向にあり、ま
た３０％を超えると接続パッド６の角部で低融点ロウ材
７の接合面積が非常に小さくなって低融点ロウ材７の接
続パッド６に対する接合強度が不十分となる危険性があ
る。従って、前記切り欠き部Ａや窪み部Ｂは、その幅Ｗ
２、Ｗ３を、形成される接続パッド６の幅Ｗ１に対して
５％〜３０％の範囲としておくことが好ましい。
【００２０】更にまた、前記切り欠き部Ａや窪み部Ｂ
は、平面および断面の各コーナー部を円弧状に成形して
おくと、このコーナー部で接続パッド６と低融点ロウ材
７との接合界面付近に熱応力が集中して低融点ロウ材７
にクラック等の欠陥が生じることを効果的に防止するこ
とができ、接続パッド６と外部電気回路基板８の回路配
線８ａとの電気的接続の信頼性をより一層優れたものと
することができる。従って、前記切り欠き部Ａや窪み部
Ｂは、平面および断面の各コーナー部を円弧状に成形し
ておくことが好ましい。
【００２１】かくして本発明の配線基板によれば、絶縁
基体１の凹部１ａ底面に半導体素子３をガラスや樹脂、
ロウ材等の接着剤を介して接着固定するとともにこの半
導体素子３の各電極を配線導体２にボンディングワイヤ
５を介して電気的に接続し、しかる後、絶縁基体１の上
面に金属やセラミックスから成る蓋体９をガラスや樹
脂、ロウ材等の封止材を介して接合させ、絶縁基体１と
蓋体９とから成る容器内部に半導体素子３を気密に収容
することによって製品としての半導体装置が完成する。
【００２２】なお、本発明の配線基板は上述の実施の形
態に限定されるものではなく、本発明の要旨を逸脱しな
い範囲であれば種々の変更は可能であり、例えば、前記
配線導体２および接続パッド６の露出する領域にニッケ
ルまたは銅を１μｍ〜１０μｍ、金を０．０５μｍ〜５
μｍの厚さで順次、被着させておくと、配線導体２およ
び接続パッド６の酸化腐蝕を効果的に防ぐことができる
とともに、接続パッド６に対し低融点ロウ材７を、配線
導体２に対しボンディングワイヤ５を強固に接合、接続
させることができる。また上述の実施例では接続パッド
６に四角形状やＬ字形状をなす切り欠き部Ａと窪み部Ｂ
を混在させて形成したが、切り欠き部Ａのみを、あるい
は窪み部Ｂのみを形成してもよい。
【００２３】
【発明の効果】本発明の配線基板によれば、絶縁基体の
下面に設けた平面四角形状をなす接続パッドの各角部近
傍に切り欠き部もしくは窪み部を形成したことから、接
続パッドを外部電気回路基板の回路配線に低融点ロウ材
を介して接合した後、低融点ロウ材に配線基板の絶縁基
体と外部電気回路基板の熱膨張係数差に起因する熱応力
が繰り返し作用した場合、接続パッドの角部と低融点ロ
ウ材との接合界面付近に前記熱応力によって亀裂が生じ
るが該亀裂はその進行が切り欠き部もしくは窪み部で阻
止され、その結果、低融点ロウ材が破断することはほと
んどなく、これによって接続パッドと外部電気回路基板
の回路配線とを確実、強固に電気的接続することができ
るとともに半導体素子の外部電気回路への接続を長期信
頼性に優れたものとなすことが可能となる。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board used for a package for accommodating a semiconductor device, and more particularly, to extend each electrode of a mounted semiconductor device to a predetermined external electric circuit. The present invention relates to a wiring board that can be electrically connected stably over a period. 2. Description of the Related Art Conventionally, a wiring board on which a semiconductor element is mounted is made of, for example, an electrically insulating material such as alumina ceramics. A plurality of wiring conductors made of a refractory metal powder such as tungsten or molybdenum, which are led out from the semiconductor element mounting portion or its periphery to the lower surface via the side surface, and formed on the lower surface of the insulating base, and are electrically connected to the wiring conductor. And a plurality of connection pads which are connected to each other in the form of a plane square, and the semiconductor element is bonded and fixed to the mounting portion of the insulating base via an adhesive made of glass, resin, brazing material or the like. Each electrode of the element is electrically connected to a wiring conductor via an electrical connection means such as a bonding wire, and then, if necessary, the semiconductor A semiconductor device is obtained by hermetically sealing the element with a lid or a sealing resin. In such a semiconductor device, on an external electric circuit board, circuit wiring of the external electric circuit board and connection pads on the lower surface of the insulating substrate face each other with a low melting point brazing material such as tin-lead solder interposed therebetween. After that, the low melting point brazing material is heated and melted at a temperature of about 200 ° C. to 300 ° C., and the circuit wiring of the external electric circuit board and the connection pads on the lower surface of the insulating base are joined to form an external electric circuit. Each electrode of the semiconductor element mounted on the board and simultaneously mounted on the wiring board is electrically connected to the external electric circuit board via the wiring conductor and the low melting point brazing material. [0004] However, in the wiring board on which the above-described conventional semiconductor element is mounted, the insulating base is formed of a ceramic material such as an aluminum oxide sintered body, and its thermal expansion coefficient is low. About 4 × 10 -6 / ° C to 10 × 1
To 0 -6 / in the range of ° C., external electric circuit board is generally formed of a resin material such as glass epoxy resin, the thermal expansion coefficient of 30 × 10 -6 / ℃ ~50 × 10 -6 / ℃ Because the connection pads are largely different from each other, and the connection pads are square in plane, and stress tends to concentrate on each corner, the connection pads of the wiring board and the circuit wiring of the external electric circuit board are made of low melting point brazing material. After the semiconductor device is mounted on the external electric circuit board through bonding, the heat generated during the operation of the semiconductor element repeatedly acts on the insulating base of the wiring board and the external electric circuit board. Large thermal stresses are repeatedly generated and concentrated on each corner of the connection pad, and a crack is generated near the interface between the corner of the connection pad and the low melting point brazing material. Along the entire material interface As a result, the low melting point brazing material eventually breaks, and there is a problem that the electrical connection between the semiconductor element and the external electric circuit is broken in a short period of time. The present invention has been devised in view of the above-mentioned problems in the conventional wiring board, and has as its object to provide a low melting point brazing material for joining a connection pad of an insulating base to a circuit wiring of an external electric circuit board. Effectively preventing breakage, ensuring that each electrode of the semiconductor element is connected to an external electric circuit for a long time,
An object of the present invention is to provide a wiring board which can be firmly connected electrically and has excellent long-term reliability. A wiring board according to the present invention is made of an electrically insulating material and has an insulating base having a semiconductor element mounting portion on a surface thereof, and a number of connection pads formed on the lower surface of the insulating base. And a plurality of wiring conductors extending from the mounting portion of the insulating base to the connection pad, wherein each connection pad has a quadrangular plane, and is near each corner of the plane. A notch or a depression is formed in the groove. According to the wiring board of the present invention, a notch or a groove is formed in the vicinity of each corner of a planar quadrangular connection pad provided on the lower surface of the insulating base, so that the connection pad can be connected to the external electric circuit board. After the low melting point brazing material is joined to the circuit wiring through the low melting point brazing material, the thermal stress caused by the difference in the thermal expansion coefficient between the insulating base of the wiring board and the external electric circuit board repeatedly acts on the low melting point brazing material. A crack is generated due to the thermal stress in the vicinity of the joint interface between the corner and the low melting point brazing material, but the progress of the crack is stopped at the notch or the depression, and as a result, it is almost impossible for the low melting point brazing material to break. Therefore, the connection pads and the circuit wiring of the external electric circuit board can be reliably and firmly electrically connected, and the connection of the semiconductor element to the external electric circuit has excellent long-term reliability. Succoth is possible. Next, the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 is a cross-sectional view showing an embodiment of a package for housing a semiconductor element using a wiring board of the present invention, wherein 1 is an insulating base, and 2 is a wiring conductor. The insulating substrate 1 and the wiring conductor 2 constitute a wiring board 4 on which the semiconductor element 3 is mounted. The insulating substrate 1 is made of an electrically insulating material such as an aluminum oxide sintered body, an aluminum nitride sintered body, a mullite sintered body, a silicon carbide sintered body, a glass ceramic sintered body, and the like. The upper surface thereof has a concave portion 1a in which the semiconductor element 3 is mounted and accommodated, and the semiconductor element 3 is bonded and fixed to the bottom surface of the concave portion 1a via an adhesive such as glass, resin, or brazing material. When the insulating substrate 1 is made of, for example, an aluminum oxide sintered body, a suitable organic binder and a solvent are added to a raw material powder such as aluminum oxide, silicon oxide, calcium oxide, magnesium oxide or the like, and the mixture is mixed to form a slurry. The ceramic slurry is formed into a ceramic green sheet (green ceramic sheet) using a sheet forming technique such as a doctor blade method or a calendar roll method, which is well known in the art.
The ceramic green sheet is manufactured by cutting and punching into an appropriate shape, laminating a plurality of the sheets, and finally firing the laminated ceramic green sheet at a temperature of about 1600 ° C. in a reducing atmosphere. You. A large number of wiring conductors 2 are formed on the insulating substrate 1 from the periphery of the concave portion 1a to the lower surface via the side surface, and each electrode of the semiconductor element 3 is provided on the peripheral portion of the concave portion 1a of the wiring conductor 2. Are electrically connected via bonding wires 5, and a plurality of planar quadrangular connection pads 6 that are electrically connected to the wiring conductor 2 are formed at portions led out to the lower surface of the insulating base 1. The wiring conductors 2 and the connection pads 6 serve to connect the electrodes of the semiconductor element 3 to an external electric circuit, and are made of a high melting point metal powder such as tungsten, molybdenum, manganese or the like. A metal paste obtained by adding and mixing an appropriate organic binder and a solvent to the powder is preliminarily printed and applied in a predetermined pattern on a ceramic green sheet serving as the insulating substrate 1 by a conventionally known screen printing method. It is formed from the periphery of the concave portion 1a to the lower surface. The connection pad 6 functions as an external terminal for mounting the wiring board 4 on an external electric circuit board, and the circuit wiring 8 a of the external electric circuit board 8 via the low melting point brazing material 7.
Thus, the electrodes of the semiconductor element 3 are electrically connected to the circuit wirings 8 a of the external electric circuit board 8. Further, as shown in FIGS. 2 and 3, the connection pad 6 has a rectangular or L-shaped notch A or a dent B formed near each corner. The recess B acts to prevent the progress of the crack. The connection pad 6 has a notch A at each corner.
Since the recess B is formed, the connection pad 6 is joined to the circuit wiring 8a of the external electric circuit board 8 via the low melting point brazing material 7, and then the insulating base 1 of the wiring board and the external When a thermal stress caused by a difference in thermal expansion coefficient of the electric circuit board 8 repeatedly acts, a crack is generated near the joint interface between the corner portion of the connection pad 6 and the low melting point brazing material 7 due to the thermal stress. The progress is prevented by the notch portion A or the depression portion B, and as a result, the low melting point brazing material 7 hardly breaks, thereby securely connecting the connection pad 6 and the circuit wiring 8a of the external electric circuit board 8. It is possible to make a strong electrical connection and to connect the semiconductor element 3 to an external electric circuit with excellent long-term reliability. The notch A and the depression B are formed in a predetermined square or L-shape, for example, by etching or laser processing the vicinity of each corner of the connection pad 6. If the notch portion A and the dent portion B are formed so that their outer edges are at least 100 μm away from each corner, the corner of the connection pad 6 and the low melting point brazing material 7 can be effectively prevented from progressing in the vicinity of the interface with the joint 7. Therefore, it is preferable that the notch A and the dent B are formed such that the outer edge thereof is located at least 100 μm away from each corner. More preferably, it is formed at a position 100 μm to 250 μm away from the corner. Further, it is preferable that the notch A and the depression B are formed so as to extend from each corner of the connection pad 6 to a range of 100 μm or more in the direction of each side. Even if cracks generated at the interface between the solder pad 7 and the low melting point brazing material 7 are slightly displaced from the corners of the connection pad 6 and progress, the progress can be effectively prevented. Further, the notch A and the depression B
As shown in FIG. 3, when the widths W2 and W3 are less than 5% of the width W1 of the connection pad 6 to be formed, it tends to be difficult to effectively prevent the progress of the crack, If it exceeds 30%, the bonding area of the low melting point brazing material 7 at the corners of the connection pad 6 becomes very small, and there is a risk that the bonding strength of the low melting point brazing material 7 to the connection pad 6 becomes insufficient. Therefore, the notch A and the depression B have the width W
2, W3 is preferably set in a range of 5% to 30% with respect to the width W1 of the connection pad 6 to be formed. Further, the notch A and the depression B
When the corners of the plane and the cross section are formed in an arc shape, thermal stress is concentrated near the joint interface between the connection pad 6 and the low melting point brazing material 7 at these corners, and the low melting point brazing material 7
Can effectively prevent defects such as cracks from occurring, and the reliability of the electrical connection between the connection pad 6 and the circuit wiring 8a of the external electric circuit board 8 can be further improved. . Therefore, it is preferable that the corners of the notch portion A and the depression portion B are formed in an arc shape in a plane and a cross section. Thus, according to the wiring board of the present invention, the semiconductor element 3 is formed on the bottom surface of the concave portion 1a of the insulating base 1 by glass or resin,
The electrodes of the semiconductor element 3 are bonded and fixed via an adhesive such as a brazing material, and are electrically connected to the wiring conductors 2 via bonding wires 5. Thereafter, the upper surface of the insulating base 1 is made of metal or ceramic. A semiconductor device as a product is obtained by joining the lid 9 made of glass, resin, brazing material or the like via a sealing material and sealingly housing the semiconductor element 3 in a container formed of the insulating base 1 and the lid 9. Is completed. The wiring board of the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the present invention. 1 μm to 10 μm of nickel or copper and 0.05 μm to 5 μm of gold in the exposed area of the connection pad 6.
When the wiring conductors 2 are successively applied with a thickness of μm, the oxidative corrosion of the wiring conductor 2 and the connection pad 6 can be effectively prevented, and the low melting point brazing material 7 is applied to the connection pad 6 with the wiring conductor 2. On the other hand, the bonding wire 5 can be firmly joined and connected. In the above-described embodiment, the connection pad 6 has a notch A and a dent B, each of which has a rectangular shape or an L shape.
However, only the notch portion A or only the depression portion B may be formed. According to the wiring board of the present invention, a notch or a depression is formed in the vicinity of each corner of a planar quadrangular connection pad provided on the lower surface of the insulating base. After bonding the pad to the circuit wiring of the external electric circuit board via the low melting point brazing material, thermal stress caused by the difference in thermal expansion coefficient between the insulating base of the wiring board and the external electric circuit board repeatedly applied to the low melting point brazing material. In this case, a crack is generated by the thermal stress in the vicinity of the joint interface between the corner of the connection pad and the low melting point brazing material, but the crack is prevented from progressing at the notch or the depression, and as a result, the low melting point brazing material There is almost no breakage, which ensures reliable and strong electrical connection between the connection pads and the circuit wiring of the external electric circuit board, and long-term reliability of the connection of the semiconductor element to the external electric circuit. It becomes possible to make it excellent.
【図面の簡単な説明】
【図１】本発明の配線基板の一実施例を示す断面図であ
る。
【図２】図１に示す配線基板の要部拡大断面図である。
【図３】図１に示す配線基板の要部拡大平面図である。
【符号の説明】
１・・・・絶縁基体
１ａ・・・凹部
２・・・・配線導体
３・・・・半導体素子
４・・・・配線基板
５・・・・ボンディングワイヤ
６・・・・接続パッド
７・・・・低融点ロウ材
８・・・・外部電気回路基板
８ａ・・・回路配線
９・・・・蓋体
Ａ・・・・切り欠き部
Ｂ・・・・窪み部BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a sectional view showing one embodiment of a wiring board of the present invention. FIG. 2 is an enlarged sectional view of a main part of the wiring board shown in FIG. FIG. 3 is an enlarged plan view of a main part of the wiring board shown in FIG. 1; [Description of Signs] 1 ... Insulating base 1a ... Recess 2 ... Wiring conductor 3 ... Semiconductor element 4 ... Wiring board 5 ... Bonding wire 6 ... Connection pad 7 Low melting point brazing material 8 External electric circuit board 8a Circuit wiring 9 Lid A Notch B Bump
Claims (1)
搭載部を有する絶縁基体と、該絶縁基体の下面に形成さ
れた多数の接続パッドと、前記絶縁基体の前記搭載部か
ら前記接続パッドにかけて導出される複数個の配線導体
とから成る配線基板であって、前記各接続パッドは平面
が四角形状をなし、かつ平面の各角部近傍に切り欠き部
もしくは窪み部が形成されていることを特徴とする配線
基板。Claims: 1. An insulating base made of an electrically insulating material and having a semiconductor element mounting portion on a surface, a number of connection pads formed on a lower surface of the insulating base, and the mounting of the insulating base. A plurality of wiring conductors led from the portion to the connection pad, wherein each connection pad has a square planar shape, and a notch or a recess near each corner of the planar surface. A wiring board characterized by being formed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001358714A JP2003158220A (en) | 2001-11-26 | 2001-11-26 | Circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001358714A JP2003158220A (en) | 2001-11-26 | 2001-11-26 | Circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2003158220A true JP2003158220A (en) | 2003-05-30 |
Family
ID=19169847
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001358714A Pending JP2003158220A (en) | 2001-11-26 | 2001-11-26 | Circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2003158220A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009224741A (en) * | 2008-03-19 | 2009-10-01 | Epson Toyocom Corp | Package for electronic component and surface-mounted electronic device |
| JP2010109833A (en) * | 2008-10-31 | 2010-05-13 | Kyocera Kinseki Corp | Piezoelectric vibrator and manufacturing method thereof |
| JP2015088506A (en) * | 2013-10-28 | 2015-05-07 | 株式会社大真空 | Base of package for electronic component and package for electronic component |
-
2001
- 2001-11-26 JP JP2001358714A patent/JP2003158220A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009224741A (en) * | 2008-03-19 | 2009-10-01 | Epson Toyocom Corp | Package for electronic component and surface-mounted electronic device |
| JP2010109833A (en) * | 2008-10-31 | 2010-05-13 | Kyocera Kinseki Corp | Piezoelectric vibrator and manufacturing method thereof |
| JP2015088506A (en) * | 2013-10-28 | 2015-05-07 | 株式会社大真空 | Base of package for electronic component and package for electronic component |
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