JP3808376B2 - Wiring board - Google Patents

Wiring board Download PDF

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Publication number
JP3808376B2
JP3808376B2 JP2002030264A JP2002030264A JP3808376B2 JP 3808376 B2 JP3808376 B2 JP 3808376B2 JP 2002030264 A JP2002030264 A JP 2002030264A JP 2002030264 A JP2002030264 A JP 2002030264A JP 3808376 B2 JP3808376 B2 JP 3808376B2
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copper
plating layer
wiring
wiring layer
layer
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JP2003234551A (en
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晶 芹野
建二郎 梁川
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Kyocera Corp
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Kyocera Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H01L2924/15172—Fan-out arrangement of the internal vias
    • H01L2924/15174—Fan-out arrangement of the internal vias in different layers of the multilayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap

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  • Parts Printed On Printed Circuit Boards (AREA)

Description

【０００１】
【発明の属する技術分野】
本発明は、酸化アルミニウム質焼結体等のセラミックスを絶縁基体とする配線基板に関し、詳細には銅を主成分とする低抵抗導体から成り、かつ絶縁基体と同時焼成によって形成された表面配線層を具備した配線基板に関するものである。
【０００２】
【従来の技術】
近年、半導体素子の高集積化に伴い、半導体装置から発生する熱も増加している。半導体装置の誤作動をなくすためには、このような熱を装置外に放出可能な配線基板が必要とされている。一方、電気的な特性としては、演算速度の高速化により、信号の遅延が問題となり、導体損失の小さい、つまり低抵抗の導体を用いることが要求されてきた。
【０００３】
このような半導体素子を搭載した配線基板としては、その信頼性の点から、酸化アルミニウム質焼結体を絶縁基体とし、その表面あるいは内部にタングステンやモリブデン等の高融点金属から成る配線層を被着形成したセラミック配線基板が多用されている。ところが、従来から多用されている高融点金属から成る配線層では、抵抗を高々８ｍΩ／□程度までしか低くできなかった。
【０００４】
これに対して、近年に至り、低抵抗導体である銅や銀と同時焼成可能な、いわゆるガラスセラミックスを用いた多層配線基板が提案されている。ところが、ガラスセラミックスの熱伝導率は高々数Ｗ／ｍ・Ｋしかなく、前記熱的問題を解決することが難しくなってきている。
【０００５】
そこで、この熱的問題と電気的問題点とを同時に解決する方法として、本出願人は先に酸化アルミニウムを主成分とし、マンガン化合物をＭｎＯ2換算で2.0〜6.0重量％の割合で含有する相対密度が95％以上のセラミックスから成る絶縁基体と、この絶縁基体の少なくとも表面にこの絶縁基体との同時焼成によって形成され、銅（Ｃｕ）を10〜70体積％、タングステン（Ｗ）および／またはモリブデン（Ｍｏ）を30〜90体積％の割合で含有し、かつ銅から成るマトリックス中にタングステンおよび／またはモリブデンを平均粒径１〜10μｍの粒子として分散含有して成る配線層とから成る配線基板を提案した（特願平10−244237号参照）。
【０００６】
この配線基板によれば、絶縁基体が酸化アルミニウム質焼結体等から成り、かつ相対密度が高く緻密であるため熱伝導性が10Ｗ／ｍ・Ｋ以上と高く、また、配線層が低抵抗の銅を含有するためシート抵抗を約４ｍΩ／□以下と低くすることができる。
【０００７】
このような配線基板は、例えば、酸化アルミニウムを主成分とし、酸化マンガン（ＭｎＯ2）を2.0〜6.0重量％の割合で含有するセラミック成分を含有するグリーンシートの表面に、銅粉末を10〜70体積％、平均粒径が１〜10μｍのタングステンおよび／またはモリブデンを30〜90体積％の割合で含有して成る導体ペーストを回路パターン状に印刷塗布した後、このグリーンシートを積層し、非酸化性雰囲気中で最高焼成温度が1200〜1500℃となる条件で焼成することによって製作される。
【０００８】
【発明が解決しようとする課題】
しかしながら、上記配線基板は配線層のシート抵抗が約４ｍΩ／□と従来品に比べ低いものの、ミリ波帯やマイクロ波帯の高周波信号を使用する半導体素子が搭載され、配線層に高周波信号が伝播された場合には電気抵抗はまだまだ大きく、伝播する高周波信号にロスを発生させてしまうためより一層低抵抗とする必要がある。
【０００９】
そこで配線層の表面に低電気抵抗の銅や金から成るめっき層を被着させておくことが考えられる。
【００１０】
しかしながら、配線層の表面に銅や金から成るめっき層を被着させた場合、配線層にはタングステンやモリブデンといった銅や金から成るめっき層に対して密着性の悪い金属が含有されており、配線層と銅や金から成るめっき層との密着強度が弱いことから外力印加によってめっき層が配線層の表面から剥がれるという欠点が誘発されてしまう。
【００１１】
また、銅および金は半田等の低融点ロウ材に対して拡散し易いことから、配線層に半導体素子を錫−鉛半田等の低融点ロウ材を介して接合したり、配線層を外部電気回路基板の配線導体に低融点ロウ材を介して接合したりする際、銅や金のめっき層が低融点ロウ材に容易に拡散吸収されて低融点ロウ材と接する配線層表面に低融点ロウ材と接合性の悪いタングステンやモリブデンが現われてしまい、その結果、低融点ロウ材の配線層に対する接合強度が劣化し、接合の信頼性が大きく低下するという欠点が誘発されてしまう。
【００１２】
本発明は上記欠点に鑑み案出されたもので、その目的は、配線基板の熱伝導性を高くし、かつ電気抵抗を高周波信号の伝播においても問題とならないような小さな値とした、ミリ波帯やマイクロ波帯の高周波信号を使用する半導体素子の搭載が可能な量産性に優れた配線基板を提供することにある。
【００１３】
【課題を解決するための手段】
本発明の配線基板は、熱伝導率が10Ｗ／ｍ・Ｋ以上のセラミックス焼結体から成る絶縁基体と、この絶縁基体との同時焼成により絶縁基体に一体的に形成されたタングステンおよび／またはモリブデンならびに銅から成る配線層とで構成された配線基板であって、前記配線層の露出表面にはニッケル−コバルトめっき層と銅または金めっき層とが順次被着されており、かつ前記配線層と前記ニッケル−コバルトめっき層とが拡散接合されていることを特徴とするものである。
【００１４】
また本発明の配線基板は、上記構成において、前記配線層と前記ニッケル−コバルトめっき層との拡散領域の厚みが0.5μｍ乃至2.0μｍであることを特徴とするものである。
【００１５】
本発明の配線基板によれば、絶縁基体を熱伝導率が10Ｗ／ｍ・Ｋ以上のセラミックス焼結体で形成したことから、得られる配線基板は熱伝導率が良好で、この配線基板を用いた半導体装置に搭載された半導体素子からの熱を装置外に効率よく放散させることができ、半導体装置を常に適温として半導体装置を長期間にわたり正常、かつ安定に作動させることができる。
【００１６】
また本発明の配線基板によれば、配線層の表面に電気抵抗が極めて小さい銅または金から成るめっき層を被着させたことから、配線層を低抵抗配線となすことができ、その結果、ミリ波帯やマイクロ波帯の高周波信号もほとんどロスを発生させることなく伝播させることが可能となる。
【００１７】
さらに本発明の配線基板によれば、タングステンおよび／またはモリブデンと銅とから成る配線層の表面にニッケル−コバルトめっき層と、銅または金めっき層とを順次被着させるとともに、配線層とニッケル−コバルトめっき層とを拡散接合させたことから、配線層とニッケル−コバルトめっき層との接合、ならびにニッケル−コバルトめっき層と銅または金めっき層との接合が極めて強固となり、外力印加によって、ニッケル−コバルトめっき層が配線層表面から、銅または金めっき層がニッケル−コバルトめっき層表面から、それぞれ容易に剥がれることはない。
【００１８】
またさらに本発明によれば、配線層の表面に低融点ロウ材との接合性が良好なニッケル−コバルトめっき層を被着し、配線層を被覆するようにしたことから、配線層に半導体素子を錫−鉛半田等の低融点ロウ材を介して接合したり、配線層を外部電気回路基板の配線導体に低融点ロウ材を介して接合したりする際、銅や金から成るめっき層が低融点ロウ材に拡散吸収されたとしても、低融点ロウ材との接合性の悪いタングステンやモリブデンが現われることはほとんどなく、低融点ロウ材をニッケル−コバルトめっき層と良好に接合させることができる。その結果、低融点ロウ材の配線層に対する接合強度が極めて強く、配線基板の外部電気回路基板に対する接合の信頼性を極めて良好なものとなすことができる。
【００１９】
【発明の実施の形態】
以下に、本発明の配線基板の実施の形態の一例について、添付の図面を基に説明する。
【００２０】
図１は本発明の配線基板を使用した半導体素子収納用パッケージの実施の形態の一例を示す断面図であり、１は絶縁基体、２は配線層である。この絶縁基体１と配線層２とで半導体素子３を搭載する配線基板４が構成される。
【００２１】
本発明の配線基板４において、絶縁基体１は半導体素子３を搭載し支持する基体として機能し、酸化アルミニウム質焼結体・窒化アルミニウム質焼結体・炭化珪素質焼結体等の熱伝導率が10Ｗ／ｍ・Ｋ以上のセラミック焼結体により形成されている。
【００２２】
また絶縁基体１は、その高熱伝導性および高強度化を達成する上では、相対密度が95％以上の高緻密体から構成されるものであることが望ましい。
【００２３】
さらに本発明の配線基板４では、絶縁基体１は、配線層２との同時焼結時における保形性を達成する上では、1200℃〜1500℃の低温で焼成することが必要となるが、本発明の配線基板４においては、このような低温での焼成においても相対密度95％以上に緻密化することが必要となる。
【００２４】
かかる観点から、本発明における絶縁基体１は、例えば、酸化アルミニウムを主成分とするもの、具体的には酸化アルミニウムを90重量％以上の割合で含有するものが好適に使用され、第２の成分として、Ｍｎ化合物をＭｎＯ2換算で2.0〜6.0重量％の割合で含有することが望ましい。すなわち、マンガン化合物が2.0重量％よりも少ないと、1200℃〜1500℃での緻密化が達成されにくく、また6.0重量％よりも多いと絶縁基体１の絶縁性が低下する。マンガン化合物の最適な範囲は、ＭｎＯ2換算で３〜５重量％である。
【００２５】
また、この絶縁基体１中には、第３の成分として、ＳｉＯ2およびＭｇＯ・ＣａＯ・ＳｒＯ等のアルカリ土類元素酸化物を銅含有導体との同時焼結性を高める上で合計で0.4〜８重量％の割合で含有せしめることが望ましい。
【００２６】
さらに第４の成分としてタングステン・モリブデン等の金属を着色成分として２重量％以下の割合で含んでもよい。
【００２７】
絶縁基体１においては、酸化アルミニウム以外の成分は、酸化アルミニウム主結晶相の粒界に非晶質相あるいは結晶相として存在するが、熱伝導性を高める上で粒界中に助剤成分を含有する結晶相が形成されていることが望ましい。
【００２８】
また、絶縁基体１を酸化アルミニウムを主成分として形成した場合は、酸化アルミニウム主結晶相は粒状または柱状の結晶として存在するが、これら主結晶相の平均結晶粒径は1.5〜5.0μｍであることが望ましい。
【００２９】
なお、主結晶相が柱状結晶からなる場合、その平均結晶粒径は、短軸径に基づくものである。この主結晶相の平均結晶粒径が1.5μｍよりも小さいと、高熱伝導化が難しく、平均粒径が5.0μｍよりも大きいと基板材料として用いる場合に要求される十分な強度が得られにくくなるためである。
【００３０】
配線層２は、配線基板４に搭載された半導体素子３の電極をボンディングワイヤ５等を介して接続させる接続パッドとして機能するとともに、この半導体素子３の電極を外部電気回路基板に錫−鉛半田等の低融点ロウ材を介して接続させるための導電路となる。
【００３１】
配線層２は、銅を10〜70体積％、タングステンおよび／またはモリブデンを30〜90体積％の割合で含有することが必要である。これは、配線層２の低抵抗化と、絶縁基体１との同時焼結性とを達成するとともに、表面の配線層２の同時焼成後の保形性を維持するためであり、銅量が10体積％よりも少なく、タングステンやモリブデン量が90体積％よりも多いと、配線層２のシート抵抗が高くなる。また、銅量が70体積％よりも多く、タングステンやモリブデン量が30体積％よりも少ないと、表面の配線層２の同時焼成後の保形性が低下し、表面の配線層２においてにじみ等が発生したり、溶融した銅によって表面の配線層２が凝集して断線が生じたりするとともに、絶縁基体１と配線層２の熱膨張係数差により配線層２の剥離が発生したりするためである。最適な組成範囲は、銅が40〜60体積％、タングステンおよび／またはモリブデンが60〜40体積％である。
【００３２】
また本発明の配線基板４においては、タングステンおよび／またはモリブデンは、平均粒径１〜10μｍの球状あるいは数個の粒子による凝集粒子として銅から成るマトリックス中に分散含有していることが望ましい。これは、この平均粒径が１μｍよりも小さい場合、表面の配線層２の保形性が悪くなるとともに組織が多孔質化し配線層２の抵抗も高くなり、10μｍを超えると銅のマトリックスがタングステンやモリブデンの粒子によって分断されてしまい配線層２の抵抗が高くなったり、銅成分が分離してにじみ等が発生するためである。タングステンおよび／またはモリブデンは平均粒径1.3〜５μｍ、特に1.3〜４μｍの大きさで分散されていることが最も望ましい。
【００３３】
また、配線層２中には、絶縁基体１との密着性を改善するために、酸化アルミニウム、または絶縁基体１と同じ成分のセラミックスを0.05〜２体積％の割合で含有させることも可能である。
【００３４】
さらに、本発明の配線基板４においては、酸化アルミニウムとの銅の融点を超える温度での同時焼成によって、配線層２中の銅成分が絶縁基体１中に拡散する場合があるが、本発明によれば、この少なくとも銅を含む配線層２の周囲の絶縁基体１のセラミックスへの銅の拡散距離が20μｍ以下、特に10μｍ以下であることが望ましい。これは、銅のセラミックス中への拡散距離が20μｍを超えると、配線層２間の絶縁性が低下し、配線基板４としての信頼性が低下するためである。
【００３５】
この銅の拡散距離を20μｍ以下とすることにより、配線層２のうち、同一平面内に形成された配線層２間の最小線間距離を100μｍ以下、特に90μｍ以下の高密度配線化を図ることができる。また、同様に図１に示すように、１つの絶縁層内に複数のビアホール導体６が形成される場合、そのビアホール導体６間の最小離間距離も上記と同様な理由から100μｍ以下、特に90μｍ以下に制御することが可能である。
【００３６】
さらにまた、本発明の配線基板４は、焼成温度および雰囲気を制御して焼成することによって、絶縁基体１の表面の中心線平均粗さＲａを１μｍ以下、特に0.7μｍ以下の平滑性に優れた表面を形成できるものであり、その結果、絶縁基体１の表面に配線層２を形成する場合に、絶縁基体１の表面に研磨加工等を施す必要がないことも大きな特徴である。
【００３７】
本発明の配線基板４は、例えば酸化アルミニウムを主成分とするセラミックス焼結体から成る場合であれば、以下のようにして形成される。すなわち、
まず、絶縁基体１を形成するために、セラミックス焼結体の主成分となる酸化アルミニウム原料粉末として、平均粒径が0.5〜2.5μｍ、特に0.5μｍ〜2.0μｍの粉末を用いる。これは、平均粒径が0.5μｍよりも小さいと、粉末の取扱が難しく、また粉末のコストが高くなり、2.5μｍよりも大きいと、1500℃以下の温度で焼成することが難しくなるためである。
【００３８】
そして、この酸化アルミニウム粉末に対して、第２成分として、ＭｎＯ2を2.0〜6.0重量％、特に3.0〜5.0重量％の割合で添加する。また適宜、第３の成分として、ＳｉＯ2・ＭｇＯ・ＣａＯ・ＳｒＯ2粉末等を0.4〜８重量％、第４の成分として、Ｗ・Ｍｏ・Ｃｒ等の遷移金属の金属粉末や酸化物粉末を着色成分として金属換算で２重量％以下の割合で添加する。
【００３９】
なお、このような酸化物の添加にあたっては、酸化物粉末以外に、焼成によって酸化物を形成し得る炭酸塩・硝酸塩・酢酸塩等として添加してもよい。
【００４０】
そして次に、この混合粉末を用いて絶縁基体１を形成するためのシート状成形体を作製する。シート状成形体は、周知の成形方法によって作製することができる。例えば、この混合粉末に有機バインダや溶媒を添加してスラリーを調整した後、ドクターブレード法によって形成したり、混合粉末に有機バインダを加え、プレス成形・圧延成形等により所定の厚みのシート状成形体を作製できる。
【００４１】
このようにして作製したシート状成形体に対して、導体成分として、平均粒径が１〜10μｍの銅含有粉末を10〜70体積％、特に40〜60体積％と、平均粒径が１〜10μｍのタングステンおよび／またはモリブデンを30〜90体積％、特に40〜60体積％との割合で含有してなる導体ペーストを調整し、この導体ペーストを各シート状成形体にスクリーン印刷・グラビア印刷等の手法によって印刷塗布する。
【００４２】
なお、この導体ペースト中には、絶縁層との密着性を高めるために、酸化アルミニウム粉末や、絶縁層を形成する酸化物セラミックス成分と同一の組成物粉末を0.05〜２体積％の割合で添加することも可能である。
【００４３】
そして最後に、導体ペーストを印刷塗布したシート状成形体を位置合わせして積層圧着した後、この積層体を、非酸化性雰囲気中にて、焼成最高温度が1200〜1500℃の温度となる条件で焼成する。
【００４４】
このときの焼成温度が1200℃より低いと、通常の原料を用いた場合において、酸化アルミニウム絶縁基体が相対密度95％以上まで緻密化できず、熱伝導性や強度が低下してしまい、1500℃よりも高いと、タングステンあるいはモリブデン自体の焼結が進み、銅との均一組織を維持できなくなって、ひいては低抵抗を維持することが困難となりシート抵抗が高くなってしまう。また、酸化物セラミックスの主結晶相の粒径が大きくなり異常粒成長が発生したり、銅がセラミックス中へ拡散するときのパスである粒界の長さが短くなるとともに拡散速度も速くなる結果、拡散距離を30μｍ以下に抑制することが困難となるためである。好適には1250〜1400℃の範囲がよい。
【００４５】
また、この焼成時の非酸化性雰囲気としては、窒素、あるいは窒素と水素との混合雰囲気であることが望ましいが、特に、配線層２中の銅の拡散を抑制する上では、水素および窒素を含み露点＋10℃以下、特に−10℃以下の非酸化性雰囲気であることが望ましい。なお、この雰囲気には所望により、アルゴンガス等の不活性ガスを混入してもよい。焼成時の露点が＋10℃より高いと、焼成中に酸化物セラミックスと雰囲気中の水分とが反応し酸化膜を形成し、この酸化膜と銅含有導体の銅が反応してしまい、導体の低抵抗化の妨げとなるのみではなく、銅の拡散を助長してしまうためである。
【００４６】
また配線基板４は、図２に要部断面図で示す如く、配線層２の露出表面にニッケル−コバルト（Ｎｉ−Ｃｏ）めっき層７と、銅または金めっき層８とが順次被着され、ニッケル−コバルトめっき層７は配線層２と拡散接合されている。拡散接合により、配線層２とニッケル−コバルトめっき層７との間にニッケル−コバルトめっき層／銅の拡散領域７ａが形成され、この拡散領域７ａを介して配線層２とニッケル−コバルトめっき層７とが強固に接合している。
【００４７】
ニッケル−コバルトめっき層７は、配線層２や銅または金めっき８に対する接合を強固なものとするため、ニッケル含有量を50重量％〜90重量％とすることが好ましい。
【００４８】
このニッケル−コバルトめっき層７は、銅または金めっき層８との密着性も良好であることから、配線層２に銅または金めっき層８を強固に被着させるための下地金属層として作用する。
【００４９】
このため、配線層２とニッケル−コバルトめっき層７との接合、ならびにニッケル−コバルトめっき層７と銅または金めっき層８との接合が極めて強固となり、外力印加によって各めっき層が（ニッケル−コバルトめっき層７が配線層２表面から、および銅または金めっき層８がニッケル−コバルトめっき層７表面から）容易に剥がれることはない。
【００５０】
この場合、タングステンおよび／またはモリブデンならびに銅から成る配線層２とニッケル−コバルトめっき層７との拡散領域７ａは、その厚みが0.5μｍ未満では配線層２にニッケル−コバルトめっき層７を強固に被着・接合させることが困難となり、2.0μｍを超えると拡散領域７ａに内在する応力によりニッケル−コバルトめっき層７の配線層２に対する接合の信頼性が劣化するおそれがあり、また配線層２の電気抵抗を大きく上昇させる傾向がある。従って、配線層２とニッケル−コバルトめっき層７との拡散領域７ａの厚みは0.5μｍ〜2.0μｍの範囲としておくことが好ましい。
【００５１】
また、配線層２とニッケル−コバルトめっき層７との間の拡散接合は、銅とニッケル−コバルトとが相互拡散し易いことから、例えば、配線層２の表面にニッケル−コバルトめっき層７を被着させた後、配線基板４を、非酸化雰囲気中にて、約650℃〜750℃の比較的低い温度で熱処理することにより行なうことができる。
【００５２】
また、この熱処理条件、例えば最高処理温度のキープ時間を適宜調整することにより、拡散領域７ａの厚みを制御することができる。
【００５３】
ニッケル−コバルトめっき層７上には銅または金めっき層８が被着形成されている。
【００５４】
この銅または金めっき層８は、配線基板４の配線層２に電気信号を伝播させる主導体として作用し、低抵抗の銅または金から成ることから、配線層２の電気抵抗を、ミリ波帯やマイクロ波帯の高周波信号を伝播させる場合であっても問題とならないような小さな値となす機能を有する。
【００５５】
銅または金めっき層８は、例えば、銅から成る場合であれば、硫酸銅10ｇ／リットル，ＥＤＴＡ−２Ｎａ30ｇ／リットル，ホルムアルデヒド（37％液）３ｃｍ3／リットル，および若干のビピリジルおよびポリエチレングリコール等から成る無電解めっき液を準備するとともに、配線層２（実際には配線層２に被着させたニッケル−コバルトめっき層７）に対して脱脂・酸処理等の周知のめっき前処理を施した後、ニッケル−コバルトめっき層７の露出面をこの無電解銅めっき液中に所定時間浸漬させることによってニッケル−コバルトめっき層７上に所定厚みに被着される。
【００５６】
また、金から成る場合であれば、例えば、金化合物であるシアン化金カリウムおよび錯化剤であるエチレンジアミン四酢酸を主成分とし、シアン化カリウム・リン酸二水素カリウム等を添加して成る置換型の無電解金めっき液と、金化合物であるシアン化金カリウムおよび還元剤である水素化ホウ素ナトリウムとを主成分とする還元型の無電解金めっき液とを準備し、配線層２（実際には配線層２に被着させたニッケル−コバルトめっき層７）に対して脱脂・酸処理等の周知のめっき前処理を施した後、ニッケル−コバルトめっき層７の露出面を、この置換型の無電解金めっき液、次に還元型の無電解金めっき液の順に所定時間浸漬させることによってニッケル−コバルトめっき層７上に所定厚みに被着される。
【００５７】
この場合、銅または金めっき層８は、ニッケル−コバルトめっき層７に対する密着性が良好であることから、ニッケル−コバルトめっき層７上に良好に接合するとともに、このニッケル−コバルトめっき層７およびニッケル−コバルト／銅の拡散領域７ａを介して、配線層２に強固に接合することができる。
【００５８】
なお、銅または金めっき層８は、銅から成る場合には、銅めっき層８の表面にさらに被覆用の金めっき層（不図示）を被着させておくと、銅めっき層８およびニッケル−コバルトめっき層７ならびに配線層２の酸化腐食を有効に防ぐことができるとともに、配線層２に対する低融点ロウ材の濡れ性をより一層有効に高めることができる。従って、前記銅または金めっき層８は、銅から成る場合には、さらにその表面に被覆用の金めっき層（不図示）を、例えば、0.05μｍ〜３μｍの厚みで被着させておくことが好ましい。
【００５９】
銅めっき層８上に被着させる被覆用の金めっき層（不図示）は、例えば、上述の金めっき層８と同様の手順、つまり、銅めっき層８の露出面を置換型の無電解金めっき液、次に還元型の無電解金めっき液の順に所定時間浸漬させることによって、銅めっき層８上に所定厚みに形成することができる。
【００６０】
かくして本発明の配線基板４によれば、絶縁基体１の半導体素子搭載部上に半導体素子３を搭載するとともにこの半導体素子３の各電極を配線層２にボンディングワイヤ５を介して電気的に接続し、しかる後、絶縁基体１の上面に金属やセラミックスから成る椀状の蓋体９をガラスや樹脂・ロウ材等の封止材を介して接合させ、絶縁基体１と蓋体９とから成る容器内部に半導体素子３を気密に収容することによって製品としての半導体装置が完成し、半導体素子３は配線層２等を介して外部電気回路に接続されることとなる。
【００６１】
なお、本発明は上述の実施の形態の例に限定されるものではなく、本発明の要旨を逸脱しない範囲であれば種々の変更は可能である。例えば、上述の実施の形態の例では本発明の配線基板を半導体素子収納用パッケージに適用したが、混成集積回路基板等の他の用途に適用してもよい。
【００６２】
【発明の効果】
本発明の配線基板によれば、絶縁基体を熱伝導率が10Ｗ／ｍ・Ｋ以上のセラミックス焼結体で形成したことから、得られる配線基板は熱伝導率が良好で、この配線基板を用いた半導体装置に搭載された半導体素子からの熱を装置外に効率よく放散させることができ、半導体装置を常に適温として半導体装置を長期間にわたり正常、かつ安定に作動させることができる。
【００６３】
また本発明の配線基板によれば、配線層の表面に電気抵抗が極めて小さい銅または金から成るめっき層を被着させたことから、配線層を低抵抗配線となすことができ、その結果、ミリ波帯やマイクロ波帯の高周波信号もほとんどロスを発生させることなく伝播させることが可能となる。
【００６４】
さらに本発明の配線基板によれば、タングステンおよび／またはモリブデンと銅とから成る配線層の表面にニッケル−コバルトめっき層と、銅または金めっき層を順次被着させるとともに、配線層とニッケル−コバルトめっき層とを拡散接合させたことから、配線層とニッケル−コバルトめっき層との接合、ならびにニッケル−コバルトめっき層と銅または金めっき層との接合が極めて強固となり、外力印加によって、各めっき層が配線層表面から容易に剥がれることはない。
【００６５】
またさらに本発明によれば、配線層の表面にニッケル−コバルトめっき層を被着・被覆するようにし、このニッケル−コバルトめっき層と低融点ロウ材との接合性が良好であることから、配線層に半導体素子を錫−鉛半田等の低融点ロウ材を介して接合したり、配線層を外部電気回路基板の配線導体に低融点ロウ材を介して接合したりする際、銅や金のめっき層が低融点ロウ材に拡散吸収されたとしても、低融点ロウ材との接合性の悪いタングステンやモリブデンが現われることはほとんどなく、その結果、低融点ロウ材の配線層に対する接合強度が極めて強く、接合の信頼性を極めて良好なものとなすことができる。
【図面の簡単な説明】
【図１】本発明の配線基板を半導体素子を収容する半導体素子収納用パッケージに適用した場合の実施の形態の一例を示す断面図である。
【図２】本発明の配線基板の実施の形態の一例を示す要部断面図である。
【符号の説明】
１・・・・・絶縁基体
２・・・・・配線層
３・・・・・半導体素子
４・・・・・配線基板
５・・・・・ボンディングワイヤ
６・・・・・ビアホール導体
７・・・・・ニッケル−コバルトめっき層
７ａ・・・・配線層とニッケル−コバルトめっき層との拡散領域
８・・・・・銅または金めっき層
９・・・・・蓋体[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a wiring board having an insulating base made of ceramics such as an aluminum oxide sintered body, and more specifically, a surface wiring layer made of a low-resistance conductor mainly composed of copper and formed by simultaneous firing with the insulating base. It is related with the wiring board provided with.
[0002]
[Prior art]
In recent years, heat generated from a semiconductor device has been increased with higher integration of semiconductor elements. In order to eliminate the malfunction of the semiconductor device, a wiring substrate capable of releasing such heat to the outside of the device is required. On the other hand, as an electrical characteristic, signal delay becomes a problem due to an increase in calculation speed, and it has been required to use a conductor having a small conductor loss, that is, a low resistance.
[0003]
As a wiring board on which such a semiconductor element is mounted, from the viewpoint of reliability, an aluminum oxide sintered body is used as an insulating base and a wiring layer made of a refractory metal such as tungsten or molybdenum is covered on the surface or inside thereof. A formed ceramic wiring board is often used. However, in a wiring layer made of a refractory metal that has been widely used in the past, the resistance can only be lowered to about 8 mΩ / □.
[0004]
On the other hand, in recent years, multilayer wiring boards using so-called glass ceramics that can be fired simultaneously with copper and silver which are low resistance conductors have been proposed. However, since the thermal conductivity of glass ceramics is only a few W / m · K, it is difficult to solve the thermal problem.
[0005]
Therefore, as a method for simultaneously solving the thermal problem and the electrical problem, the present applicant has previously made aluminum oxide as a main component and manganese compound as MnO. 2 An insulating base made of ceramics having a relative density of 95% or more and contained in a ratio of 2.0 to 6.0% by weight in terms of conversion, and at least the surface of this insulating base is formed by co-firing with this insulating base, and 10% of copper (Cu) is formed. -70% by volume, tungsten (W) and / or molybdenum (Mo) in a proportion of 30-90% by volume, and tungsten and / or molybdenum as particles having an average particle diameter of 1 to 10 μm in a copper matrix We proposed a wiring board consisting of a wiring layer with dispersed content ( Special application 10-244237).
[0006]
According to this wiring board, the insulating base is made of an aluminum oxide sintered body and the like, and since the relative density is high and dense, the thermal conductivity is as high as 10 W / m · K or more, and the wiring layer has a low resistance. Since it contains copper, the sheet resistance can be lowered to about 4 mΩ / □ or less.
[0007]
Such a wiring board has, for example, aluminum oxide as a main component and manganese oxide (MnO 2 ) On the surface of a green sheet containing a ceramic component containing 2.0 to 6.0% by weight of copper, 10 to 70% by volume of copper powder, and 30 to 90% of tungsten and / or molybdenum having an average particle size of 1 to 10 μm % Of the conductive paste is printed and applied in a circuit pattern, and then the green sheet is laminated and fired in a non-oxidizing atmosphere at a maximum firing temperature of 1200-1500 ° C. Is done.
[0008]
[Problems to be solved by the invention]
However, although the wiring board has a sheet resistance of about 4 mΩ / □, which is lower than that of the conventional product, a semiconductor element that uses high-frequency signals in the millimeter wave band or microwave band is mounted, and high-frequency signals propagate through the wiring layer. In such a case, the electric resistance is still large, and a loss is generated in the propagating high-frequency signal. Therefore, it is necessary to further reduce the resistance.
[0009]
Therefore, it is conceivable to deposit a plating layer made of copper or gold having a low electric resistance on the surface of the wiring layer.
[0010]
However, when a plating layer made of copper or gold is deposited on the surface of the wiring layer, the wiring layer contains a metal having poor adhesion to the plating layer made of copper or gold, such as tungsten or molybdenum. Since the adhesion strength between the wiring layer and the plating layer made of copper or gold is weak, a defect that the plating layer is peeled off from the surface of the wiring layer by applying external force is induced.
[0011]
In addition, since copper and gold easily diffuse into low melting point solder such as solder, a semiconductor element can be joined to the wiring layer via a low melting point solder such as tin-lead solder, or the wiring layer can be When bonding to the wiring conductor of a circuit board via a low melting point brazing material, the copper or gold plating layer is easily diffused and absorbed by the low melting point brazing material, and the low melting point brazing is applied to the surface of the wiring layer in contact with the low melting point brazing material. As a result, tungsten or molybdenum having poor bonding properties to the material appears, and as a result, the bonding strength of the low melting point brazing material to the wiring layer is deteriorated, and the defect that the reliability of bonding is greatly reduced is induced.
[0012]
The present invention has been devised in view of the above-mentioned drawbacks, and its purpose is to increase the thermal conductivity of the wiring board and to reduce the electrical resistance to such a low value that does not cause a problem in the propagation of high-frequency signals. An object of the present invention is to provide a wiring substrate excellent in mass productivity that can be mounted with a semiconductor element using a high-frequency signal in a band or microwave band.
[0013]
[Means for Solving the Problems]
The wiring board of the present invention includes an insulating base made of a ceramic sintered body having a thermal conductivity of 10 W / m · K or more, and tungsten and / or molybdenum integrally formed on the insulating base by simultaneous firing of the insulating base. And a wiring board made of copper, wherein an exposed surface of the wiring layer is sequentially coated with a nickel-cobalt plating layer and a copper or gold plating layer, and the wiring layer The nickel-cobalt plating layer is diffusion bonded.
[0014]
The wiring board according to the present invention is characterized in that, in the above configuration, the thickness of the diffusion region between the wiring layer and the nickel-cobalt plating layer is 0.5 μm to 2.0 μm.
[0015]
According to the wiring board of the present invention, since the insulating base is formed of a ceramic sintered body having a thermal conductivity of 10 W / m · K or more, the obtained wiring board has a good thermal conductivity. The heat from the semiconductor element mounted on the semiconductor device can be efficiently dissipated outside the device, and the semiconductor device can be operated at a proper temperature for a long period of time in a normal and stable manner.
[0016]
In addition, according to the wiring board of the present invention, since the plating layer made of copper or gold having an extremely low electrical resistance is deposited on the surface of the wiring layer, the wiring layer can be a low resistance wiring, and as a result, High-frequency signals in the millimeter wave band and microwave band can be propagated with almost no loss.
[0017]
Furthermore, according to the wiring board of the present invention, the nickel-cobalt plating layer and the copper or gold plating layer are sequentially deposited on the surface of the wiring layer made of tungsten and / or molybdenum and copper, and the wiring layer and the nickel- Since the cobalt plating layer is diffusion bonded, the bonding between the wiring layer and the nickel-cobalt plating layer and the bonding between the nickel-cobalt plating layer and the copper or gold plating layer are extremely strong. The cobalt plating layer is not easily peeled off from the wiring layer surface, and the copper or gold plating layer is not easily peeled off from the nickel-cobalt plating layer surface.
[0018]
Furthermore, according to the present invention, a nickel-cobalt plating layer having a good bondability to the low melting point brazing material is deposited on the surface of the wiring layer so as to cover the wiring layer. Are bonded via a low melting point brazing material such as tin-lead solder or a wiring layer is bonded to a wiring conductor of an external electric circuit board via a low melting point brazing material. Even if it is diffused and absorbed by the low melting point brazing material, tungsten or molybdenum having poor bondability with the low melting point brazing material hardly appears, and the low melting point brazing material can be satisfactorily joined to the nickel-cobalt plating layer. . As a result, the bonding strength of the low melting point brazing material to the wiring layer is extremely strong, and the bonding reliability of the wiring board to the external electric circuit board can be made extremely good.
[0019]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, an exemplary embodiment of a wiring board according to the present invention will be described with reference to the accompanying drawings.
[0020]
FIG. 1 is a cross-sectional view showing an example of an embodiment of a package for housing a semiconductor element using a wiring board of the present invention, wherein 1 is an insulating substrate, and 2 is a wiring layer. The insulating substrate 1 and the wiring layer 2 constitute a wiring board 4 on which the semiconductor element 3 is mounted.
[0021]
In the wiring board 4 of the present invention, the insulating substrate 1 functions as a substrate on which the semiconductor element 3 is mounted and supported, and the thermal conductivity of an aluminum oxide sintered body, an aluminum nitride sintered body, a silicon carbide sintered body, or the like. Is formed of a ceramic sintered body of 10 W / m · K or more.
[0022]
In order to achieve high thermal conductivity and high strength, the insulating substrate 1 is preferably composed of a highly dense body having a relative density of 95% or more.
[0023]
Furthermore, in the wiring board 4 of the present invention, the insulating substrate 1 needs to be fired at a low temperature of 1200 ° C. to 1500 ° C. in order to achieve shape retention during simultaneous sintering with the wiring layer 2. The wiring board 4 of the present invention needs to be densified to a relative density of 95% or higher even when firing at such a low temperature.
[0024]
From this point of view, the insulating base 1 in the present invention is preferably, for example, one having aluminum oxide as a main component, specifically, one containing aluminum oxide in a proportion of 90% by weight or more. Mn compound as MnO 2 It is desirable to contain it in a ratio of 2.0 to 6.0% by weight in terms of conversion. That is, if the manganese compound is less than 2.0% by weight, densification at 1200 ° C. to 1500 ° C. is difficult to achieve, and if it exceeds 6.0% by weight, the insulating properties of the insulating substrate 1 are lowered. The optimal range of manganese compounds is MnO 2 It is 3 to 5% by weight in terms of conversion.
[0025]
Further, in this insulating substrate 1, as a third component, SiO 2 In addition, it is desirable to add an alkaline earth element oxide such as MgO.CaO.SrO or the like in a proportion of 0.4 to 8% by weight in total in order to enhance the co-sinterability with the copper-containing conductor.
[0026]
Further, a metal such as tungsten / molybdenum may be contained as a coloring component in a proportion of 2% by weight or less as a fourth component.
[0027]
In the insulating substrate 1, the components other than aluminum oxide exist as an amorphous phase or a crystalline phase at the grain boundary of the aluminum oxide main crystal phase, but contain an auxiliary component in the grain boundary in order to improve thermal conductivity. It is desirable that a crystal phase is formed.
[0028]
When the insulating substrate 1 is formed mainly of aluminum oxide, the aluminum oxide main crystal phase exists as a granular or columnar crystal, and the average crystal grain size of these main crystal phases is 1.5 to 5.0 μm. Is desirable.
[0029]
In addition, when the main crystal phase is composed of columnar crystals, the average crystal grain size is based on the minor axis diameter. When the average crystal grain size of this main crystal phase is smaller than 1.5 μm, it is difficult to achieve high thermal conductivity, and when the average grain size is larger than 5.0 μm, it is difficult to obtain sufficient strength required for use as a substrate material. Because.
[0030]
The wiring layer 2 functions as a connection pad for connecting the electrode of the semiconductor element 3 mounted on the wiring board 4 via the bonding wire 5 and the like, and the electrode of the semiconductor element 3 is tin-lead soldered to the external electric circuit board. It becomes a conductive path for connection via a low melting point brazing material such as.
[0031]
The wiring layer 2 needs to contain 10 to 70% by volume of copper and 30 to 90% by volume of tungsten and / or molybdenum. This is to achieve low resistance of the wiring layer 2 and simultaneous sintering with the insulating substrate 1 and to maintain shape retention after simultaneous firing of the wiring layer 2 on the surface. If the amount is less than 10% by volume and the amount of tungsten or molybdenum is more than 90% by volume, the sheet resistance of the wiring layer 2 is increased. Further, if the amount of copper is more than 70% by volume and the amount of tungsten or molybdenum is less than 30% by volume, the shape retention after the co-firing of the surface wiring layer 2 is deteriorated, and the surface wiring layer 2 is blurred. The wiring layer 2 on the surface aggregates due to the molten copper and disconnection occurs, and peeling of the wiring layer 2 occurs due to a difference in thermal expansion coefficient between the insulating substrate 1 and the wiring layer 2. is there. The optimum composition range is 40-60% by volume of copper and 60-40% by volume of tungsten and / or molybdenum.
[0032]
In the wiring board 4 of the present invention, it is desirable that tungsten and / or molybdenum be dispersed and contained in a matrix made of copper as spherical particles having an average particle diameter of 1 to 10 μm or aggregated particles of several particles. This is because when the average particle diameter is smaller than 1 μm, the shape retention of the wiring layer 2 on the surface is deteriorated and the structure becomes porous and the resistance of the wiring layer 2 is increased. When the average particle diameter exceeds 10 μm, the copper matrix becomes tungsten. This is because the resistance of the wiring layer 2 is increased due to the separation by the particles of molybdenum and molybdenum, or the copper component is separated and bleeding occurs. Most preferably, tungsten and / or molybdenum is dispersed with an average particle size of 1.3 to 5 μm, particularly 1.3 to 4 μm.
[0033]
Further, in order to improve the adhesion to the insulating substrate 1, the wiring layer 2 can contain aluminum oxide or ceramics having the same component as that of the insulating substrate 1 in a proportion of 0.05 to 2% by volume. .
[0034]
Furthermore, in the wiring board 4 of the present invention, the copper component in the wiring layer 2 may diffuse into the insulating substrate 1 by simultaneous firing at a temperature exceeding the melting point of copper with aluminum oxide. Accordingly, it is desirable that the copper diffusion distance to the ceramic of the insulating base 1 around the wiring layer 2 containing at least copper is 20 μm or less, particularly 10 μm or less. This is because if the diffusion distance of copper into the ceramic exceeds 20 μm, the insulation between the wiring layers 2 is lowered and the reliability as the wiring board 4 is lowered.
[0035]
By making the copper diffusion distance 20 μm or less, the minimum wiring distance between the wiring layers 2 formed in the same plane in the wiring layer 2 is 100 μm or less, particularly 90 μm or less. Can do. Similarly, as shown in FIG. 1, when a plurality of via-hole conductors 6 are formed in one insulating layer, the minimum separation distance between the via-hole conductors 6 is also 100 μm or less, particularly 90 μm or less for the same reason as described above. It is possible to control.
[0036]
Furthermore, the wiring substrate 4 of the present invention is excellent in smoothness with a center line average roughness Ra of 1 μm or less, particularly 0.7 μm or less, by firing by controlling the firing temperature and atmosphere. The surface can be formed, and as a result, when the wiring layer 2 is formed on the surface of the insulating base 1, it is not necessary to perform polishing or the like on the surface of the insulating base 1.
[0037]
For example, if the wiring board 4 of the present invention is made of a ceramic sintered body mainly composed of aluminum oxide, it is formed as follows. That is,
First, in order to form the insulating substrate 1, a powder having an average particle size of 0.5 to 2.5 μm, particularly 0.5 μm to 2.0 μm is used as the aluminum oxide raw material powder that is the main component of the ceramic sintered body. This is because if the average particle size is smaller than 0.5 μm, it is difficult to handle the powder, and the cost of the powder becomes high, and if it is larger than 2.5 μm, it is difficult to fire at a temperature of 1500 ° C. or less. .
[0038]
And for this aluminum oxide powder, as the second component, MnO 2 Is added in a proportion of 2.0-6.0% by weight, in particular 3.0-5.0% by weight. As appropriate, as the third component, SiO 2 ・ MgO ・ CaO ・ SrO 2 0.4 to 8 wt% of powder or the like is added as a fourth component, and a metal powder or oxide powder of a transition metal such as W, Mo or Cr is added as a coloring component in a proportion of 2 wt% or less in terms of metal.
[0039]
In addition to the oxide powder, such an oxide may be added as carbonate, nitrate, acetate, or the like capable of forming an oxide by firing.
[0040]
Next, a sheet-like molded body for forming the insulating substrate 1 is produced using this mixed powder. The sheet-like molded body can be produced by a known molding method. For example, an organic binder or solvent is added to this mixed powder to adjust the slurry, and then formed by a doctor blade method, or an organic binder is added to the mixed powder, and sheet-like molding with a predetermined thickness is performed by press molding, rolling molding, or the like. The body can be made.
[0041]
With respect to the sheet-like molded body thus produced, 10 to 70% by volume, particularly 40 to 60% by volume of copper-containing powder having an average particle diameter of 1 to 10 μm as a conductor component, and an average particle diameter of 1 to A conductor paste containing 10-μm tungsten and / or molybdenum in a proportion of 30 to 90% by volume, particularly 40 to 60% by volume, is prepared, and this conductor paste is screen-printed / gravure-printed, etc. The printing is applied by the above method.
[0042]
In this conductor paste, 0.05 to 2% by volume of aluminum oxide powder or the same composition powder as the oxide ceramic component forming the insulating layer is added in order to improve adhesion to the insulating layer. It is also possible to do.
[0043]
Finally, after aligning and laminating and pressure-bonding the sheet-like molded body on which the conductive paste is printed and applied, the laminated body is subjected to conditions under which the firing maximum temperature is 1200 to 1500 ° C. in a non-oxidizing atmosphere. Bake with.
[0044]
When the firing temperature at this time is lower than 1200 ° C., when using ordinary raw materials, the aluminum oxide insulating substrate cannot be densified to a relative density of 95% or more, and the thermal conductivity and strength are reduced to 1500 ° C. If it is higher than that, the sintering of tungsten or molybdenum itself proceeds, it becomes impossible to maintain a uniform structure with copper, and it becomes difficult to maintain low resistance, and sheet resistance becomes high. In addition, the grain size of the main crystal phase of the oxide ceramics increases and abnormal grain growth occurs, and the grain boundary length, which is the path when copper diffuses into the ceramics, becomes shorter and the diffusion speed increases. This is because it becomes difficult to suppress the diffusion distance to 30 μm or less. The range of 1250-1400 ° C is preferred.
[0045]
The non-oxidizing atmosphere at the time of firing is preferably nitrogen or a mixed atmosphere of nitrogen and hydrogen. In particular, in order to suppress the diffusion of copper in the wiring layer 2, hydrogen and nitrogen are used. A non-oxidizing atmosphere with a dew point of + 10 ° C. or lower, particularly −10 ° C. or lower is desirable. In addition, you may mix inert gas, such as argon gas, in this atmosphere if desired. If the dew point during firing is higher than + 10 ° C, oxide ceramics react with moisture in the atmosphere during firing to form an oxide film, and this oxide film reacts with copper in the copper-containing conductor, resulting in a low conductor. This is because it not only hinders resistance, but also promotes copper diffusion.
[0046]
In addition, as shown in the cross-sectional view of the main part in FIG. 2, the wiring substrate 4 has a nickel-cobalt (Ni—Co) plating layer 7 and a copper or gold plating layer 8 sequentially deposited on the exposed surface of the wiring layer 2. The nickel-cobalt plating layer 7 is diffusion bonded to the wiring layer 2. By diffusion bonding, a nickel-cobalt plating layer / copper diffusion region 7a is formed between the wiring layer 2 and the nickel-cobalt plating layer 7, and the wiring layer 2 and the nickel-cobalt plating layer 7 are formed via the diffusion region 7a. Are firmly joined.
[0047]
The nickel-cobalt plating layer 7 preferably has a nickel content of 50 wt% to 90 wt% in order to strengthen the bonding to the wiring layer 2 and copper or gold plating 8.
[0048]
Since the nickel-cobalt plating layer 7 has good adhesion to the copper or gold plating layer 8, the nickel-cobalt plating layer 7 acts as a base metal layer for firmly attaching the copper or gold plating layer 8 to the wiring layer 2. .
[0049]
For this reason, the bonding between the wiring layer 2 and the nickel-cobalt plating layer 7 and the bonding between the nickel-cobalt plating layer 7 and the copper or gold plating layer 8 become extremely strong. The plating layer 7 is not easily peeled from the surface of the wiring layer 2 and the copper or gold plating layer 8 is from the surface of the nickel-cobalt plating layer 7).
[0050]
In this case, the diffusion region 7a of the wiring layer 2 made of tungsten and / or molybdenum and copper and the nickel-cobalt plating layer 7 is firmly covered with the nickel-cobalt plating layer 7 if the thickness is less than 0.5 μm. If the thickness exceeds 2.0 μm, the reliability of the bonding of the nickel-cobalt plating layer 7 to the wiring layer 2 may be deteriorated by the stress existing in the diffusion region 7a. There is a tendency to increase resistance significantly. Therefore, the thickness of the diffusion region 7a between the wiring layer 2 and the nickel-cobalt plating layer 7 is preferably in the range of 0.5 μm to 2.0 μm.
[0051]
In addition, since the diffusion bonding between the wiring layer 2 and the nickel-cobalt plating layer 7 is easy for copper and nickel-cobalt to diffuse each other, for example, the surface of the wiring layer 2 is covered with the nickel-cobalt plating layer 7. After the deposition, the wiring board 4 can be heat-treated at a relatively low temperature of about 650 ° C. to 750 ° C. in a non-oxidizing atmosphere.
[0052]
Further, the thickness of the diffusion region 7a can be controlled by appropriately adjusting the heat treatment conditions, for example, the keeping time of the maximum processing temperature.
[0053]
A copper or gold plating layer 8 is deposited on the nickel-cobalt plating layer 7.
[0054]
The copper or gold plating layer 8 functions as a main conductor for propagating an electric signal to the wiring layer 2 of the wiring board 4 and is made of low resistance copper or gold. Therefore, the electric resistance of the wiring layer 2 is reduced to the millimeter wave band. And has a function of reducing the value so as not to cause a problem even when a microwave high-frequency signal is propagated.
[0055]
If the copper or gold plating layer 8 is made of copper, for example, copper sulfate 10 g / liter, EDTA-2Na 30 g / liter, formaldehyde (37% solution) 3 cm Three / Liter, and an electroless plating solution composed of some bipyridyl and polyethylene glycol, etc., and degreasing / acidifying the wiring layer 2 (actually, the nickel-cobalt plating layer 7 deposited on the wiring layer 2). After performing a known plating pretreatment such as a treatment, the exposed surface of the nickel-cobalt plating layer 7 is immersed in the electroless copper plating solution for a predetermined time to be deposited on the nickel-cobalt plating layer 7 to a predetermined thickness. Is done.
[0056]
Further, in the case of gold, for example, a substitution type comprising, as a main component, potassium gold cyanide which is a gold compound and ethylenediaminetetraacetic acid which is a complexing agent, and potassium cyanide, potassium dihydrogen phosphate and the like are added. An electroless gold plating solution and a reduced electroless gold plating solution mainly composed of potassium gold cyanide as a gold compound and sodium borohydride as a reducing agent are prepared, and wiring layer 2 (actually After the nickel-cobalt plating layer 7) deposited on the wiring layer 2 is subjected to a known plating pretreatment such as degreasing and acid treatment, the exposed surface of the nickel-cobalt plating layer 7 is exposed to this substitution type The nickel-cobalt plating layer 7 is deposited to a predetermined thickness by immersing the electrolytic gold plating solution and then the reduced electroless gold plating solution for a predetermined time.
[0057]
In this case, since the copper or gold plating layer 8 has good adhesion to the nickel-cobalt plating layer 7, the copper or gold plating layer 8 is well bonded onto the nickel-cobalt plating layer 7. It can be firmly bonded to the wiring layer 2 through the cobalt / copper diffusion region 7a.
[0058]
In the case where the copper or gold plating layer 8 is made of copper, a copper plating layer 8 and a nickel- The oxidative corrosion of the cobalt plating layer 7 and the wiring layer 2 can be effectively prevented, and the wettability of the low melting point brazing material to the wiring layer 2 can be further effectively improved. Therefore, when the copper or gold plating layer 8 is made of copper, a coating gold plating layer (not shown) may be further deposited on the surface thereof, for example, with a thickness of 0.05 μm to 3 μm. preferable.
[0059]
The coating gold plating layer (not shown) to be deposited on the copper plating layer 8 is, for example, the same procedure as the gold plating layer 8 described above, that is, the exposed surface of the copper plating layer 8 is replaced with electroless gold. By immersing the plating solution and then the reduced electroless gold plating solution in order for a predetermined time, the copper plating layer 8 can be formed to a predetermined thickness.
[0060]
Thus, according to the wiring substrate 4 of the present invention, the semiconductor element 3 is mounted on the semiconductor element mounting portion of the insulating base 1 and each electrode of the semiconductor element 3 is electrically connected to the wiring layer 2 via the bonding wires 5. Thereafter, a bowl-like lid 9 made of metal or ceramic is joined to the upper surface of the insulating base 1 via a sealing material such as glass, resin, or brazing material, and the insulating base 1 and the lid 9 are formed. A semiconductor device as a product is completed by airtightly housing the semiconductor element 3 in the container, and the semiconductor element 3 is connected to an external electric circuit via the wiring layer 2 and the like.
[0061]
Note that the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the present invention. For example, in the example of the above-described embodiment, the wiring board of the present invention is applied to a package for housing semiconductor elements, but may be applied to other uses such as a hybrid integrated circuit board.
[0062]
【The invention's effect】
According to the wiring board of the present invention, since the insulating base is formed of a ceramic sintered body having a thermal conductivity of 10 W / m · K or more, the obtained wiring board has a good thermal conductivity. The heat from the semiconductor element mounted on the semiconductor device can be efficiently dissipated outside the device, and the semiconductor device can be operated at a proper temperature for a long period of time in a normal and stable manner.
[0063]
In addition, according to the wiring board of the present invention, since the plating layer made of copper or gold having an extremely low electrical resistance is deposited on the surface of the wiring layer, the wiring layer can be a low resistance wiring, and as a result, High-frequency signals in the millimeter wave band and microwave band can be propagated with almost no loss.
[0064]
Further, according to the wiring board of the present invention, the nickel-cobalt plating layer and the copper or gold plating layer are sequentially deposited on the surface of the wiring layer made of tungsten and / or molybdenum and copper, and the wiring layer and the nickel-cobalt. Since the plating layer is diffusion-bonded, the bonding between the wiring layer and the nickel-cobalt plating layer, and the bonding between the nickel-cobalt plating layer and the copper or gold plating layer are extremely strong. Is not easily peeled off from the surface of the wiring layer.
[0065]
Furthermore, according to the present invention, the surface of the wiring layer is coated with a nickel-cobalt plating layer, and the bonding property between the nickel-cobalt plating layer and the low melting point brazing material is good. When bonding a semiconductor element to a layer via a low melting point solder such as tin-lead solder, or bonding a wiring layer to a wiring conductor of an external electric circuit board via a low melting point brazing material Even if the plating layer is diffused and absorbed by the low melting point brazing material, tungsten or molybdenum having poor bonding properties to the low melting point brazing material hardly appears, and as a result, the bonding strength of the low melting point brazing material to the wiring layer is extremely high. It is strong and the reliability of joining can be made extremely good.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing an example of an embodiment in which a wiring board of the present invention is applied to a package for housing a semiconductor element that houses a semiconductor element.
FIG. 2 is a cross-sectional view of an essential part showing an example of an embodiment of a wiring board according to the present invention.
[Explanation of symbols]
1 ... Insulating substrate
2. Wiring layer
3. Semiconductor device
4 ... Wiring board
5 ... Bonding wire
6 ... via hole conductor
7. Nickel-cobalt plating layer
7a... Diffusion region between wiring layer and nickel-cobalt plating layer
8: Copper or gold plating layer
9: Lid

Claims (2)

熱伝導率が１０Ｗ／ｍ・Ｋ以上のセラミックス焼結体から成る絶縁基体と、該絶縁基体との同時焼成により絶縁基体に一体的に形成されたタングステンおよび／またはモリブデンならびに銅から成る配線層とで構成された配線基板であって、前記配線層の露出表面にはニッケル−コバルトめっき層と銅または金めっき層とが順次被着されており、かつ前記配線層と前記ニッケル−コバルトめっき層とが拡散接合されていることを特徴とする配線基板。An insulating base made of a ceramic sintered body having a thermal conductivity of 10 W / m · K or more, and a wiring layer made of tungsten and / or molybdenum and copper integrally formed on the insulating base by simultaneous firing with the insulating base; A nickel-cobalt plating layer and a copper or gold plating layer are sequentially deposited on the exposed surface of the wiring layer, and the wiring layer and the nickel-cobalt plating layer A wiring board characterized by being bonded by diffusion bonding. 前記配線層と前記ニッケル−コバルトめっき層との拡散領域の厚みが０．５μｍ乃至２．０μｍであることを特徴とする請求項１記載の配線基板。2. The wiring board according to claim 1, wherein a thickness of a diffusion region between the wiring layer and the nickel-cobalt plating layer is 0.5 μm to 2.0 μm.
JP2002030264A 2002-02-07 2002-02-07 Wiring board Expired - Fee Related JP3808376B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002030264A JP3808376B2 (en) 2002-02-07 2002-02-07 Wiring board

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