JP3789827B2 - Ｉｃチップ実装方法とｉｃチップ付き包装体およびｉｃチップ付き包装体の製造方法 - Google Patents

Ｉｃチップ実装方法とｉｃチップ付き包装体およびｉｃチップ付き包装体の製造方法 Download PDF

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Publication number
JP3789827B2
JP3789827B2 JP2002026256A JP2002026256A JP3789827B2 JP 3789827 B2 JP3789827 B2 JP 3789827B2 JP 2002026256 A JP2002026256 A JP 2002026256A JP 2002026256 A JP2002026256 A JP 2002026256A JP 3789827 B2 JP3789827 B2 JP 3789827B2
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Japan
Prior art keywords
chip
package
concave hole
base film
antenna pattern
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Expired - Lifetime
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JP2002026256A
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English (en)
Japanese (ja)
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JP2003229456A5 (enExample
JP2003229456A (ja
Inventor
茂 中野
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Dai Nippon Printing Co Ltd
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Dai Nippon Printing Co Ltd
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Priority to JP2002026256A priority Critical patent/JP3789827B2/ja
Publication of JP2003229456A publication Critical patent/JP2003229456A/ja
Publication of JP2003229456A5 publication Critical patent/JP2003229456A5/ja
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/95053—Bonding environment
    • H01L2224/95085—Bonding environment being a liquid, e.g. for fluidic self-assembly
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/9512—Aligning the plurality of semiconductor or solid-state bodies
    • H01L2224/95136—Aligning the plurality of semiconductor or solid-state bodies involving guiding structures, e.g. shape matching, spacers or supporting members
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01019—Potassium [K]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Credit Cards Or The Like (AREA)
  • Packages (AREA)
  • Wire Bonding (AREA)
JP2002026256A 2002-02-04 2002-02-04 Ｉｃチップ実装方法とｉｃチップ付き包装体およびｉｃチップ付き包装体の製造方法 Expired - Lifetime JP3789827B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002026256A JP3789827B2 (ja) 2002-02-04 2002-02-04 Ｉｃチップ実装方法とｉｃチップ付き包装体およびｉｃチップ付き包装体の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002026256A JP3789827B2 (ja) 2002-02-04 2002-02-04 Ｉｃチップ実装方法とｉｃチップ付き包装体およびｉｃチップ付き包装体の製造方法

Publications (3)

Publication Number Publication Date
JP2003229456A JP2003229456A (ja) 2003-08-15
JP2003229456A5 JP2003229456A5 (enExample) 2005-08-18
JP3789827B2 true JP3789827B2 (ja) 2006-06-28

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Family Applications (1)

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JP2002026256A Expired - Lifetime JP3789827B2 (ja) 2002-02-04 2002-02-04 Ｉｃチップ実装方法とｉｃチップ付き包装体およびｉｃチップ付き包装体の製造方法

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JP (1) JP3789827B2 (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI263403B (en) 2004-01-22 2006-10-01 Murata Manufacturing Co Electronic component manufacturing method
US7687277B2 (en) * 2004-12-22 2010-03-30 Eastman Kodak Company Thermally controlled fluidic self-assembly
JP4992465B2 (ja) * 2007-02-22 2012-08-08 富士通株式会社 Ｒｆｉｄタグおよびｒｆｉｄタグの製造方法
JP2008247418A (ja) * 2007-03-30 2008-10-16 Ckd Corp Ｐｔｐシート及びｐｔｐ包装機
KR101031931B1 (ko) 2009-09-04 2011-04-29 김충웅 포장상자에 있어서 알에프아이디의 부착구조
GB2554952A (en) * 2016-10-17 2018-04-18 Parkside Flexibles Europe Ltd Electronic identifier for packaging
WO2018216686A1 (ja) * 2017-05-26 2018-11-29 株式会社村田製作所 パッケージ用板紙およびその製造方法
DE102018009472A1 (de) * 2018-12-03 2020-06-04 Giesecke+Devrient Currency Technology Gmbh Aufbringung und Befestigung einer bestimmten Anzahl von Einzelelementen auf einer Substratbahn

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Publication number Publication date
JP2003229456A (ja) 2003-08-15

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