JP3722760B2 - Wiring board wiring inspection method and wiring board manufacturing method - Google Patents

Wiring board wiring inspection method and wiring board manufacturing method Download PDF

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JP3722760B2
JP3722760B2 JP2002038934A JP2002038934A JP3722760B2 JP 3722760 B2 JP3722760 B2 JP 3722760B2 JP 2002038934 A JP2002038934 A JP 2002038934A JP 2002038934 A JP2002038934 A JP 2002038934A JP 3722760 B2 JP3722760 B2 JP 3722760B2
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wiring
wiring board
circuit
current
board
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JP2002329947A (en
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耕三 山崎
秀雄 佐藤
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NGK Spark Plug Co Ltd
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NGK Spark Plug Co Ltd
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Description

【0001】
【産業上の利用分野】
本発明は、配線基板に設けられた配線の処理及び検査の方法、並びにかかる処理に適する処理回路に関する。更に詳しくは、配線基板に形成された配線の内、欠陥を有しているものの導通検査や抵抗値検査等では確実には検出できず、市場において開放不良となる危険性のある欠陥を、配線基板の製造段階等で強制的に開放不良に変化させて、導通検査等で欠陥を検出できるようにする配線基板の配線の検査方法およびこれを用いる配線基板の製造方法に関する。
【0002】
【従来の技術】
一般にセラミック配線基板は、以下のような方法により制作される。まず、アルミナ等のセラミック粉末に有機樹脂等のバインダーと溶剤および可塑剤等を粉砕混合し泥漿を得た後、ドクターブレード法等によりグリーンテープに成形される。次に、これらのグリーンテープを所望の形状に打ち抜いた後、このテープ上に回路配線及び必要によりビアホールを形成する。その後、テープを積層圧着して成形し、焼成炉で溶剤やバインダーを除去した後に焼結され、内部及び表面に配線を有するセラミック配線基板となる。中には、更にこのセラミック配線基板の表面上に、厚膜印刷技術、薄膜形成技術やフォトリソグラフィー技術等により、ガラスやポリイミド等からなる絶縁層及び銅や銀等からなる内部及び表面の配線を形成して、単層あるいは多層配線層を設ける場合もある。また、内層となるグリーンテープには回路配線を形成しないためにセラミック基板内部には配線が無く、セラミック表面にのみ単層や多層の配線層を形成するものもある。
【0003】
ところで、上記のグリーンテープ上の回路配線の形成は、一般にコストや製造の容易さなどから、メタライズペーストを用いたスクリーン印刷法、即ち厚膜印刷法が用いられる。例えば、最も一般的なアルミナセラミックの場合はメタライズ成分としてタングステンやモリブテンを含有したペーストが用いられる。一方、近年の半導体部品等の高集積化や高密度実装化に伴い、印刷する厚膜配線の幅や配線ピッチはますます微細化が進み、印刷条件や印刷環境によっては、印刷された厚膜配線の断線あるいは隣接配線との短絡などが生じる場合がある。即ち、印刷スクリーンの目詰りや乾燥、ペースト中の異物等によるペーストのかすれやにじみ、グリーンテープ上に付着したごみ、ほこり等の異物、セラミックとペーストとの焼成収縮率の差による配線のクラックなどによる厚膜配線の断線や隣接配線間の短絡が生じる場合がある。
【0004】
かかる厚膜配線の欠陥が有る場合には、正常に集積回路等が動作しない。従って、セラミック配線基板の製造工程等において、厳しく検査・選別除去されることとなる。この厚膜配線欠陥の検査および選別方法としては、例えば、焼成後のセラミック配線基板の厚膜配線部分の導通の有無や抵抗値を検査したり、厚膜配線間の静電容量を測定したり、あるいは、特開昭63−202997号公報に示されているように、導通していれば配線上に電解メッキが可能であることを利用して、電解メッキによるメッキ膜形成の有無により判定する方法などが、一般に利用されている。
【0005】
【発明が解決しようとする課題】
上記に例示した検査方法は、厚膜配線が途中で完全に切れた状態の開放(完全断線)状態や隣接配線間の短絡に対しては有効である。ところで、例えば図11に示すように、異物の大きさ等によっては、セラミック配線基板103上に設けられた厚膜配線104の一部104aが欠落して、その部分の幅が狭小となっているが、全体としては依然として導通が取れている状態(以下、疑似断線状態という)となっている場合がある。この疑似断線状態は、この他にスクリーンの目詰りやかすれ、クラックが厚膜配線の途中まで進行している場合等にも発生すると考えられる。かかる疑似断線状態の厚膜配線は、セラミック配線基板に集積回路等を搭載するときなどにかかる熱や、集積回路等の動作時に発生する熱、厚膜配線に電流が流れる時に発生する熱、あるいは基板にかかる応力などにより、集積回路等を組付ける工程や市場において断線し、動作不具合を生じる危険性がある。
【0006】
しかし、厚膜配線が疑似断線状態になっているだけでは、厚膜配線の導通が保たれている。したがって、単に導通・非導通を検査する導通検査では、導通即ち合格と判定されるので、これを検出できない。また、同様に配線間の静電容量を測定しても、正常な場合と同じ静電容量値が表示されるので、これを検出できない。そこで、狭小部分は抵抗が他の部分よりも高くなるので、厚膜配線の抵抗値を精密に測定して判別する方法も考えられるが、厚膜配線のごく一部にのみ狭小部分がある等の欠陥では、欠陥部分の抵抗値が全体の厚膜配線の抵抗値に及ぼす影響は小さい。しかも、正常な厚膜配線であっても、厚膜配線の抵抗値には10〜20%程度のばらつきがあるため、確実に疑似断線状態の厚膜配線だけを検出することは困難であり、完全を期しがたい。
【0007】
また上記問題点は、厚膜印刷による厚膜配線形成において疑似断線状態となっている平面的な厚膜配線のみに特有ではない。即ち、配線基板の内部や表面に形成されたビアホールやスルーホール自体の欠陥やこれらと厚膜配線との接続、厚膜配線と薄膜配線との接続、薄膜配線の欠陥、薄膜配線とビアホールとの接続等の配線基板の表面や内部、あるいは配線基板上に形成された多層配線層などに存在する配線全体について同様なことが起こりうる。例えば、ビアホールへのメタライズペーストの充填不十分のために厚膜配線との接続が不確実である場合や薄膜配線形成時の異物付着の場合等が挙げられる。かかる場合には、いずれも欠陥部分は導通が制限されるため、正常な場合よりも抵抗が高い。従って、以下、疑似断線状態や接続不良状態等となっている欠陥部分を、異常高抵抗部分ということとする。
【0008】
本発明は、上記した問題点に鑑みてなされたものであって、潜在化していて検出困難な疑似断線状態等の異常高抵抗部分を、簡易な方法により顕在化させて、確実で簡易に検査・選別するための配線検査方法を提供し、もって市場に提供される配線基板の配線の信頼性を向上させる事を目的とする。また他の目的は、かかる配線の検査方法を用いることにより、正常な配線を有する配線基板を容易に選別できる配線基板の製造方法を提供することにある。
【0009】
【課題を解決するための手段】
しかしてその手段は、配線が接する絶縁層が有機絶縁材料からなる配線基板に設けられた前記配線において、前記配線基板に搭載する回路素子との接続端部を前記配線の一端とし、該配線における外部回路との接続端部を該配線の他端とし、コンデンサの一方の極を前記配線基板の前記配線の一端に接続し、該コンデンサの他方の極を該配線基板の該配線の他端に接続することにより、電流を流して該配線中の異常高抵抗部分を開放状態とする工程と、その後に該配線の導通を検査する工程と、からなる、配線基板の配線検査方法(請求項1)にある。
これよれば、上記配線に電流を流すための処理回路との接続部分が回路素子及び外部回路との接続端部として配線基板の外部に露出しているため接続が容易である。しかも、上記配線中の異常高抵抗部分を開放状態とする電流をこの配線に流す、上記した配線基板の配線処理用回路にあっては、回路構成が簡単で安価に回路を作製できる効果を有する
【0010】
更に、前記コンデンサを充電し、このコンデンサに蓄積した電荷を、配線基板の配線中の異常高抵抗部分を開放状態とする電流に用いる、配線基板の配線検査方法(請求項2)にあっては、コンデンサに蓄えた電荷量を適当に制御することにより、配線に流れる総電荷量、即ち配線に加えられるエネルギーをコントロールすることが出来る
【0011】
また、複数の回路素子との接続端部を導電性部材で導通し、この複数の回路素子との接続端部のうちの1つを配線の一端とし、この配線における外部回路との接続端部をこの配線の他端とし、この配線のこの一端とこの他端間に電流を流し、その後に複数の回路素子との接続端部のうちの他の1つを他の配線の一端とし、この他の配線における外部回路との他の接続端部をこの他の配線の他端とし、この他の配線のこの他の一端とこの他の他端間に電流を流す(請求項4)配線基板の配線検査方法も含まれる。この場合には、一般に接続端部の間隔が狭く、また損傷しやすく、損傷により回路素子との接続性が悪くなり易い回路素子との接続端部を、一度に複数個まとめて導電性部材と接続して導通を取るため、この回路素子との接続端部の損傷がすくなくなり、また細かく位置決めして導通接続する必要が無く、処理が容易となって好ましい
【0012】
ここで、配線の少なくとも一部がセラミック配線基板の内部配線である場合には、この内部配線部分では外観検査によって配線の欠陥を検出することは困難であるので、本発明を適用することは特に好ましい。また、配線が接する絶縁層がセラミックまたはガラスからなる場合には、電流が流れるときに生ずる熱によって、絶縁層が変質することが少ないため、流す電流を大きくでき、処理の確実性が増して好ましい
【0013】
また、少なくとも電流制限回路及び配線両端間電圧制限回路のいずれかを介して電流を配線基板の配線へ流す配線基板の配線検査方法(請求項5)にあっては、配線に加えられる電流または電圧を制限して正常な配線が劣化したり断線したりするのを防止できる。
更に、以上のような配線検査方法により配線に欠陥を有する配線基板を検査し、選別する、配線基板の製造方法(請求項6)も本発明に含まれる
【0014】
【作用】
前記したように配線基板の配線中の疑似断線状態や接続不良状態等の欠陥部分は、正常部分に比較して抵抗値が高くなる。即ちこのような欠陥部分は、異常高抵抗を示す。しかし、このような配線について導通試験を行っても、導通有りと判定されて欠陥を有する配線(従って、配線基板)を除去することは出来ない。また、配線の抵抗値測定しても、極端に高い抵抗を示す配線は欠陥有りとして除去出来るが、欠陥が僅かな場合には抵抗はさほど変わらず、欠陥有りと判定することは困難である。
【0015】
ところで、このような欠陥部分を有する配線に電流を流すと、この配線の中でも正常な部分に比べ、欠陥部分では高い抵抗成分による発熱が多くなる。従って、十分に大きい電流を流せば、発熱により異常高抵抗部分が焼き切れ(焼損し)て、異常高抵抗部分を有する配線は、開放(完全断線)状態となる。即ち、疑似断線状態等であった配線を、電流により完全断線状態に変化することが出来る。さすれば、焼き切れる前には多少抵抗が高い程度で、欠陥の有無の判定が困難で欠陥が潜在していた配線が、焼き切れた後には欠陥が顕在化して、導通試験により簡単に開放(断線)と判定できる。即ち、簡易で安価な導通検査回路にて欠陥を有する配線、従って欠陥を有する配線基板を検査・選別することが可能となる。
【0016】
ここで、配線に電流を流すための2ヶ所の端子としては、その間の配線中に欠陥の有無を調査したい部分を含むならば、配線中のいずれの場所を選んでも良い。しかし、電流を流すための端子として配線の途中部分を用いるとすると、通常の配線においては、一般に処理回路のプローブ(電流導入端子)を接触させる配線即ち端子部分が細いので、接触のための位置決めが困難である。更に、プローブで配線を傷つけた場合に断線を引き起こす可能性が高くなる。また、本発明により処理・検査しようとする配線が外部に露出していない内部配線の場合には、プローブとの接続のためにのみ配線の一部を外部に露出させることは、配線基板の設計上配線を複雑にして、コストアップや特性低下等の原因となる。
【0017】
そこで、処理する配線の一端として、集積回路やその他の回路素子と配線とを接続するために配線の端部に設けられるボンディングパッドやフリップチップ接続用のパッド、バンプ等の接続端部を用いることが好ましい。かかる部分は、その性質上、配線基板の表面に露出して形成され、しかもその大きさが配線の途中部分よりも大きいことが多いので、プローブの位置決めが容易で接触しやすく、また接触のために別段の設計変更等を要せず、傷ついて断線等する可能性も低いからである。ここで、本発明による配線の処理・検査は上記接続端部をNiやAuメッキする前に行うことが好ましい。プローブの接触によって接続端部が傷ついたとしても、検査後にNiやAuメッキをするので、ボンディング性等の低下が少ないからである。しかもこの場合には、メッキという付加価値をつけ加える前に欠陥を有する配線基板を除去することが出来るので結局コストダウンにもなる。更に、集積回路等との接続端部であるボンディングパッドなどは、隣接するパッド間の距離が短く密集しているため、例えば導電性ゴム等の導電性部材をプローブとして用いて、一度に複数のパッド(回路素子との接続端部)を、接触・導通すれば、他端を適宜選択することで、パッド側(回路素子との接続端部側)は、1回づつ位置決め(移動)してパッドを接触しなくとも複数の配線を処理でき、更には処理のための時間を短縮できる利点もある。
【0018】
また、配線の他端としては、外部回路との接続端部、例えばピンやリード、ボールボンディング用パッド等の接続端子やこれらを形成するためのパッド、リードレスチップキャリヤ等における外部接続端部などを用いることが好ましい。かかる外部回路との接続端部も、その性質上、配線基板の表面に露出して形成されるものであり、しかもその大きさが配線の途中部分よりも大きいのが通常である。従って、プローブでの接触が容易で、プローブとの接触のために別段の設計変更も要しないからである。特に、本発明による処理をピンやリードを固着する前に行えば、ピン等の固着、更にはピン等のメッキなどの付加価値をつける前に欠陥を有する配線基板を除去できて、結果としてよりコストダウンになる。
【0019】
その他、異常高抵抗部分を有する配線に電流を流す回路として、コンデンサに蓄積(充電)した電荷を配線に流すようにすると、コンデンサに蓄積する電荷量は、コンデンサの端子間電圧でコントロールできるので、配線に加えるエネルギーを容易にコントロールできる。また、コンデンサの内部抵抗は低いので、電流の最大値がこの内部抵抗に影響されることが少なく、一時に比較的大きな電流を配線に流すことが出来て、異常高抵抗部分を開放状態とするのに適当である。なお、ここに用いるコンデンサとしては、必要な静電容量と耐電圧を有していれば足りるが、瞬間的に放電をするため、及び端子間電圧が大きく変動するため、フィルムコンデンサや金属フィルムコンデンサなどの、充放電に適し内部抵抗の小さいコンデンサが好ましい。また、その回路の一例としては、コンデンサの一方の極を配線の一端に、他方の極を配線の他端に接続するものが挙げられる。かかる回路は、最も簡単に回路構成が出来て、処理用回路として安価に提供できる。更に、配線へ過剰な電流が流れると、正常な配線を有している場合も熱により配線や絶縁層が損傷(劣化)して、信頼性の低下をきたすことが考えられるため、配線に流す電流の制限回路や配線の両端間にかかる電圧の制限回路を設けることで、処理後の配線基板の信頼性を高めることができる。
【0020】
【実施例】
以下に、本発明の実施例について説明する。本発明は、印刷の不具合等に起因する配線の疑似断線状態等に適用されるものであるが、かかる状態となっているかどうかを配線基板を破壊せずに判断し、しかもある程度の数量まとめて疑似断線状態等になっている配線基板を入手することは困難である。従って、以下においては配線基板の製造工程中において、人工的に疑似断線状態を起こさせたものを製作し、そのサンプルについて調査した。
【0021】
まず、アルミナ90%のセラミック粉末に有機樹脂等のバインダーと溶剤および可塑剤を粉砕混合し泥漿を得た後、ドクターブレード法によりシート成形し、所定の形状に打ち抜いてグリーンテープ1を得た。次に、メタライズ成分としてタングステンを用い、この粉末に樹脂および有機溶剤を混合したメタライズペーストを得た後、これをスクリーン印刷法を用いてグリーンテープ上に配線2を印刷する。(図1参照)その後、図2に示すように、配線2の内から選択した特定の配線2a1の中央部に、▲1▼欠損無し(配線残り率100%)、▲2▼欠損率30%(配線残り率70%)、▲3▼欠損率50%(配線残り率50%)、▲4▼欠損率70%(配線残り率30%)、▲5▼欠損率90%(配線残り率10%)となるように、配線長手方向に矩形状にナイフで削って切り欠き2b1を設け、人工的に印刷不良状態を再現した。なお、この配線及び切り欠き部分は、焼成収縮により、焼成時に約20%収縮するが、配線の長手方向および幅方向ともに同一割合で収縮するため、焼成後も欠損率(配線残り率)は変化しない。
【0022】
次に、これらのグリーンシートを積層し、所定形状に切断・圧着等の加工をし、バインダーを除去した後に、温度1550℃の還元雰囲気にて3時間焼成し、図3および4に示すように、内部配線4を有するセラミック配線基板3を得た。尚、セラミック配線基板3は、略正方形で、一方の面の中央部には凹部3aが集積回路(図示しない)を固着するために設けられている。この凹部3aの側面3bは階段状にされ、階段部3b上面には内部配線4が延在するようにしてボンディングパッド部4c(長さ1.5mm、幅0.15mm、隣接間隔0.08mm)が露出して多数設けられている。また、セラミック配線基板3の凹部3aの周囲部(外周部)3cには、外部回路との接続ピンを固着するために、セラミック配線基板に設けられたピン接続用パッド4d(1.5mmφ)がビアホール4eを介して多数設けられている。
【0023】
ここで、前記した切り欠きを設けた配線2a1は、図5に示すように焼成後には内部配線4a1となり配線5a1の一部となる(他の配線については記載を省略する)。この内部配線4a1は、長さ15mm、幅0.15mmで、前記凹部3aの階段部3b上面に形成されたボンディングパッド4c1を端部として有し、その途中に疑似断線状態となる長手方向の長さ約0.85mmで、欠損率(配線残り率)がそれぞれ前記した割合の切り欠き部4b1を有している。そしてこの配線5a1は更にφ0.2mm×高さ0.5mmのビアホール4e1を通じてピン接合用パッド4d1を他方の端部としている。
【0024】
図6は、検査の対象となる配線14に電流を流すために、本発明で用いる検査用回路である。定電圧電源11のプラス極11a及びマイナス極11bは、静電容量Cの金属フィルムコンデンサ12の2つの極12a、12bに接続している。更に、コンデンサ12のプラス極12aは、スイッチ(リレー)13を介して配線14の一方の端部にプローブ15aを接触して接続する。また、コンデンサ12のマイナス極12bは、処理しようとするセラミック配線基板3の配線14の他方の端部にプローブ15bを接触して接続する。ここで、電流を流すには、まず、スイッチ13をオフにして状態で、コンデンサ12を定電圧電源11により電圧Eに充電する。その後、スイッチ13をオン(投入)して、コンデンサに蓄積した電荷を内部配線14に流す。
【0025】
このときの、配線14を流れる電流I(A)の様子を図7に示す。ここで、定電圧電源11の特性は、出力電圧E=5V、最大出力電流Ip=0.2Aであり、負荷が小さいために最大出力電流Ipより多くの電流が流れうる場合には、最大出力電流(=0.2A)で定電流動作に移るようにされている。コンデンサ12の静電容量C=4700μF、配線14の有する抵抗をR=2Ωとし、コンデンサ12の内部抵抗及び回路配線及びプローブ15の抵抗を無視すれば、スイッチ13投入の瞬間(t=t0)には、I=E/R=2.5Aの電流が流れ、時定数τ=CR=0.01(sec)のカーブで減衰し、スイッチ13の投入から5τ=0.05(sec)程度でほぼコンデンサの電荷は放電され、これ以降は、定電圧電源からの最大出力電流Ip=0.2Aのみが流れる。
【0026】
かかる放電により、配線14が正常である場合とその一部に異常高抵抗部分がある場合とでは、以下の違いが生ずる。即ち、正常である場合には、配線の一部に抵抗の高い部分が存在しないので、電流Iにより配線14全体が発熱するため、一部に熱が集中せず、配線14は断線や劣化する事がない。一方、配線の一部に異常高抵抗部分がある場合には、電流Iが流れると、この欠陥部分が特に発熱する。この熱は電流を流した一瞬(上記例では0.05sec程度の時間)のみ発生するが、蓄積した電荷が十分多ければ、発熱によって配線14のメタライズは欠陥部分のみ局所的に融けるかあるいは蒸発して、発熱部分から除去される。即ち、配線が焼き切れると考えられる。これにより、配線の異常高抵抗部分は、電流Iにより疑似断線状態等から完全断線(開放)状態に変化することとなる。従って、かかる方法により、疑似断線状態等の欠陥を有する配線を処理すれば、検査の容易な完全断線(開放)状態に変えることが出来る。
【0027】
これを確認するため、処理の対象となる配線14として、切り欠きにより人工的に疑似断線状態を有する上記内部配線4a1を有する配線5a1について、上記回路にて電流を流す処理を1回のみ行った。電源11の電圧E=5Vとして、切り欠きによって残された配線残り率(%)と初期抵抗値、及び処理後の状態について、各状態のサンプル各30ケについて調査した。結果を表1に示す。表1より、本実施例の場合においては、4700μFのコンデンサを5Vに充電し、この電荷を配線に流せば、配線残り率50%(=欠損率50%)の状態までの配線の欠陥に関しては、疑似断線状態を完全断線(開放)状態に変化させ得ることが確認できた。
【0028】
表1において初期抵抗値を比べると、正常な場合(配線残り率100%)に対して、欠陥の有る場合(配線残り率50%以下)には、約13%高い(2.42/2.14×100=113)が、その差が少ない上、絶対値が2Ω程度といずれも低いため、初期抵抗値のみで欠陥の有無を明確に判断することは困難である。その上、本実施例では、切り欠きの長さを0.85mmと比較的長く取ったが、実際の印刷工程における印刷不良等に起因する切り欠き等の欠陥はもっと短く、従って、配線全体の抵抗に与える影響が少ない場合も多いと考えられる。このような場合には、抵抗値で判断することはますます困難となると予想される。一方、本発明によれば、欠陥部分が小さいほど発熱部分が集中して、欠陥部分が焼き切れ易くなる。従って、本発明によれば、判断の困難で不確実な抵抗値検査を行わなくとも、簡単で安価な装置で足りる導通検査のみで容易に判断できるように、配線の異常高抵抗部分を変化させることが出来る。尚、本発明による検査を行った後に抵抗値検査や静電容量検査を行っても同様に検査できることは明らかである。
【0029】
ところで、配線残り率70%の場合は、電流を流しても非断線となり、正常な配線と同様になった。かかる場合には、欠陥のある配線を有するセラミック配線基板が検査によっても正常品として混入することを示しているように見える。しかし、本実施例に用いた配線5a1のような配線は信号配線であって、大きな電流が流れることはなく、その値は例えば数10mA程度である。一方、本実施例では配線5a1(従って内部配線4a1)にその10倍以上の電流を流している。従って、十分に大きい電流を流しても断線しない程度の欠陥は、セラミック配線基板に集積回路等が組み付けられ、市場で使用されても、これらの場合に掛かる熱や応力によっては断線しない程度の僅かな欠陥に過ぎないと理解して良い。即ち、かかるセラミック配線基板は、市場等において断線等の不具合を起こすことは無いと考えられる。
【0030】
本実施例においては、図8に示すように、配線5a1の接続端部として、一端はボンディングパッド4c1を使用し、他端はピン接続用パッド4d1を使用した。またボンディングパッド4c1と前記検査用回路との接続のためのプローブ15aは、前記したセラミック配線基板3に形成された凹部3aにはまり合う凸形状とした導電性ゴムシート15a’を用いた。この導電性ゴムシートからなるプローブ15a’によれば、凹部3aに形成された複数のボンディングパッド4cを一挙に接触・導通できるようになる。一方、ピン接続用パッド4d1と処理用回路との接続のためのプローブ15bは、先端が半球状でφ0.8×25mmのコンタクトプローブを用い、ピン接合用パッド4d1と接触させて用いた。このようにすることで、ピン接合用パッド4d1に比べて寸法の小さいボンディングパッド4c1に正確に位置決めしてプローブ15a(コンタクトプローブ)を接触させる必要が無くなる。また、プローブ15aによりボンディングパッドを傷つけることも無くなるので、傷によりワイヤボンディング性が低下する危険性も無くなる。尚、プローブ15a’には、導電性ゴムシート以外に導電性プラスチックシートや金属とプラスチック等との複合材を用いても同様な利点を得ることが出来る。一方、ピン接合用パッド4d(4d1)の寸法は、比較的大きいので位置決めもしやすく、多少の傷が生じたとしても、ピンをろう付けする事でこの傷は埋められてしまうので都合が良い。
【0031】
次いで、正常な(欠陥のない)配線に本発明による電流を流すことで、抵抗値の劣化等の悪影響が生じないがどうかについて、繰り返し電流を流した後に抵抗値を測定してその影響を調査した。図9に正常な内部配線4a1(配線残り率100%)を含む配線5a1に、印加した電圧の波形を示す。前述の検査用回路を用い、最高電圧E=5Vとし、0.05秒間スイッチ13をオンして、配線5a1にコンデンサ12に充電した電荷を流し、次いで0.2秒間スイッチ13をオフする。この間定電圧電源11からコンデンサ12に充電する。これを繰り返した後、配線5a1の抵抗値を測定して、その変化を調査した。その結果を表2に示す。表2の結果より、この程度の電圧・電流を印加しても、正常な内部配線4a1の抵抗値は変化が無く、配線が劣化する等の問題は無いことが判った。従って、本発明により、疑似断線状態を有する配線を完全断線に変化することができ、しかも正常な配線に影響を及ぼすことはないことが確認された。
【0032】
尚、以上において本発明の実施例について説明したが、本発明はこうした実施例に何ら限定されるものではなく、本発明の要旨を逸脱しない範囲において、様々なる態様にて実施しうる事は勿論である。例えば、実施例では配線基板として凹部を有するPGA型集積回路パッケージを示したが、配線基板の形態は平板状等のものであっても良い。また、欠陥として配線の幅が局所的に狭くなった場合を人工的に再現して、調査を行ったが、実際の欠陥には、配線の幅が局所的に狭くなる場合の他、配線のかすれや、配線の厚みが局所的に薄くなる場合や、ビアホールと配線との接続不十分、その他の場合も考えられる。しかし本発明は配線の抵抗値が局所的に高くなる場合ならばいずれの場合にも適用できることは明らかである。
【0033】
尚、本発明は、例えば配線基板の表面にポリイミド(有機絶縁材料)からなる絶縁層とCuやAg等からなる配線でもって形成した多層配線層を有する配線基板に適用される
また、実施例では印加電圧を5Vとし、従って最高で約2.5A(=5V/2Ω)程度の電流を流したが、これに限定されるものではなく、配線の材質や幅、厚み等、配線の有する抵抗値、絶縁層の材質、通常の使用によって配線に用いられる電圧や電流等によって適宜選択されるべきものであり、潜在している異常高抵抗部分を有する配線を、電流を流すことによって完全断線状態として顕在化させるものであれば良い。
さらには、内部配線に欠陥がある場合について調査を行ったが、配線基板の表面のみや表面と内部の両方に形成された配線に適用しても良い。多層配線層における欠陥が有る場合に、同様にこれを除去できることは明らかだからである。
【0034】
配線に電流を流すには、直流あるいは交流電源を検査したい配線につなげば良い。しかし、直流定電圧電源によってコンデンサを充電しておき、この電荷を用いて配線に電流を流せば、電圧によりコンデンサに蓄積する電荷即ち配線に流すエネルギーを簡便にコントロールできるので都合が良い。しかも、比較的時間をかけて徐々にエネルギーをコンデンサに蓄えてき、配線には電流を比較的短時間に流せる。従って、電源の最大出力電流が小さくとも足りるので、小さな電源即ち安価な電源で足りる点でも都合がよい。また、かかる方法としては、本発明の実施例のように、コンデンサと直流定電圧電源は接続しておいて、スイッチのオン・オフにより配線とコンデンサ及び電源を接続・断線する方法でも良いが、コンデンサをスイッチにより電源と配線に交互に接続するようにしても良い。尚、これらの処理回路において、配線に流す電流や印加する電圧を制限するために電流制限回路や電圧制限回路を介して配線に接続するようにすることが好ましい。この電流制限回路および電圧制限回路としては、通常用いられている回路構成で足り、例えば、図10に示すように、トランジスタのベース入力を直流増幅器で適当な値にすることで、トランジスタを流れる電流を制御する回路とか、配線の両端子間に並列にアレスタや定電圧ダイオードを挿入する等の回路構成が挙げられる。
【0035】
【表1】

Figure 0003722760
【0036】
【表2】
Figure 0003722760
【0037】
【発明の効果】
上記より明らかなように、配線の一部に異常高抵抗部分が有る場合に、電流を流すことにより、正常品には影響を与えることなく、かかる欠陥部分を焼き切って完全断線(開放)状態に変化させることが出来る。また、配線に電流を流すための検査用回路との接続部分が、回路素子および外部回路との接続端部として配線基板の外部に露出しているため接続が容易であるしかも、前記コンデンサに蓄えた電荷量を適当に制御することにより、配線に流れる総電荷量即ち配線に加えられるエネルギーをコントロールすることもできる更に、上記配線中の異常高抵抗部分を開放状態とする電流をこの配線に流す、上記した配線基板の配線検査用回路にあっては、回路構成が簡単で安価に回路を作製できる
従って、検査前には判別困難であったものを、簡単に判別でき、もって市場等において断線不良となることの無い、信頼性の高い配線基板が提供できる。また、正常な配線に影響を与えることなく配線の処理ができるうえ、簡単で安価な配線検査用回路を提供すること出来る。
【図面の簡単な説明】
【図1】グリーンシートにペーストで配線を形成した状態を示す斜視図である。
【図2】配線に人工的に狭小部分を形成した状態を示す平面図である。
【図3】セラミック配線基板の外観斜視図である。
【図4】図3に示したセラミック配線基板のA−A’断面図である。
【図5】図3、4に示したセラミック配線基板の内部配線の様子を示す斜視拡大図である。
【図6】配線に電流を流す処理用回路の回路図である
【図7】配線に流れる電流の様子を示すグラフである。
【図8】プローブとして導電性ゴムシートを使用したときのセラミック配線基板の様子を示す断面図である。
【図9】配線に繰り返して電流を流すときの電圧の様子を示すグラフである。
【図10】電流制限回路を介して配線に電流を流す場合の回路の一例を示す回路図である。
【図11】配線の幅が狭小となっている部分を示す斜視図である。
【符号の説明】
1、グリーンシート
2、焼成前の配線
2b1、配線中の狭小部分(欠陥部分)
3、セラミック配線基板
3a、凹部
3b、凹部の側面
4、4a1、内部配線
4b1、狭小部分(欠陥部分)
4c、4c1、ボンディングパッド
4d、4d1、ピンパッド
4e、4e1ビアホール
5a1、配線
11、直流定電圧電源
12、コンデンサ
13、スイッチ(リレー)
14、配線
15、プローブ
103、セラミック配線基板
104、配線
104a、配線中の狭小部分[0001]
[Industrial application fields]
The present invention relates to a method for processing and inspecting wiring provided on a wiring board, and a processing circuit suitable for such processing. In more detail, among the wirings formed on the wiring board, although there are defects, the defects that could not be reliably detected by continuity inspection or resistance value inspection, etc., and that could cause open defects in the market, Forcibly change to open failure at the board manufacturing stage, etc., so that defects can be detected by continuity inspection etc. Wiring board wiring inspection method and wiring board manufacturing method using the same About.
[0002]
[Prior art]
In general, a ceramic wiring board is manufactured by the following method. First, a ceramic powder such as alumina is pulverized and mixed with a binder such as an organic resin, a solvent, a plasticizer, and the like to obtain a slurry, which is then formed into a green tape by a doctor blade method or the like. Next, after these green tapes are punched into a desired shape, circuit wiring and, if necessary, via holes are formed on the tape. Thereafter, the tape is laminated and pressure-bonded to be formed, and after the solvent and binder are removed in a baking furnace, the tape is sintered and becomes a ceramic wiring substrate having wiring inside and on the surface. In addition, an insulating layer made of glass, polyimide, etc., and internal and surface wiring made of copper, silver, etc. are formed on the surface of the ceramic wiring board by thick film printing technology, thin film forming technology, photolithography technology, etc. In some cases, a single layer or a multilayer wiring layer is provided. In addition, since there is no circuit wiring in the green tape as the inner layer, there is no wiring inside the ceramic substrate, and there is a type in which a single layer or a multilayer wiring layer is formed only on the ceramic surface.
[0003]
By the way, in order to form the circuit wiring on the green tape, a screen printing method using a metallized paste, that is, a thick film printing method is generally used because of cost and ease of manufacture. For example, in the case of the most common alumina ceramic, a paste containing tungsten or molybdenum as a metallizing component is used. On the other hand, with the recent high integration and high-density mounting of semiconductor parts, etc., the width and wiring pitch of printed thick film wiring are becoming increasingly finer, and depending on the printing conditions and printing environment, the printed thick film There may be a case where the wiring is disconnected or a short circuit with an adjacent wiring occurs. In other words, clogging and drying of the printing screen, blurring and blurring of the paste due to foreign matter in the paste, foreign matter such as dust and dust adhering to the green tape, cracks in the wiring due to the difference in firing shrinkage between the ceramic and paste, etc. In some cases, disconnection of thick film wiring or short circuit between adjacent wirings may occur.
[0004]
When there is a defect in such a thick film wiring, the integrated circuit or the like does not operate normally. Therefore, it is strictly inspected and selected and removed in the manufacturing process of the ceramic wiring board. As an inspection and selection method for this thick film wiring defect, for example, the presence / absence of conduction or resistance value of the thick film wiring part of the fired ceramic wiring substrate is inspected, or the capacitance between the thick film wirings is measured. Alternatively, as disclosed in Japanese Patent Laid-Open No. 63-202997, it is determined based on whether or not a plating film is formed by electrolytic plating by utilizing the fact that electrolytic plating is possible on the wiring if it is conductive. Methods are generally used.
[0005]
[Problems to be solved by the invention]
The inspection method exemplified above is effective for an open (completely disconnected) state in which the thick film wiring is completely cut halfway and for a short circuit between adjacent wirings. By the way, as shown in FIG. 11, for example, depending on the size of the foreign matter, a portion 104a of the thick film wiring 104 provided on the ceramic wiring substrate 103 is missing, and the width of the portion is narrow. However, as a whole, there may be a state in which conduction is still achieved (hereinafter referred to as a pseudo disconnection state). In addition to this, this pseudo disconnection state is considered to occur also when the screen is clogged or faint and the crack has progressed partway through the thick film wiring. Such a pseudo-disconnected thick film wiring is heat generated when an integrated circuit or the like is mounted on a ceramic wiring board, heat generated when an integrated circuit is operated, heat generated when a current flows through the thick film wiring, or There is a risk that due to the stress applied to the substrate, the integrated circuit or the like is disconnected in the process or market, causing malfunction.
[0006]
However, the continuity of the thick film wiring is maintained only by the thick film wiring being in a pseudo-disconnection state. Accordingly, in the continuity test in which the continuity / non-conduction is simply inspected, it is determined as continuity, that is, passed, so this cannot be detected. Similarly, even if the capacitance between the wirings is measured, the same capacitance value as that in the normal case is displayed, so that it cannot be detected. Therefore, since the resistance of the narrow portion is higher than that of the other portions, a method of accurately measuring and discriminating the resistance value of the thick film wiring may be considered, but only a small portion of the thick film wiring has a narrow portion, etc. In this defect, the influence of the resistance value of the defective portion on the resistance value of the entire thick film wiring is small. Moreover, even with a normal thick film wiring, since there is a variation of about 10 to 20% in the resistance value of the thick film wiring, it is difficult to reliably detect only the thick film wiring in the pseudo disconnection state, It's hard to be perfect.
[0007]
Further, the above problem is not unique only to planar thick film wiring that is in a pseudo-disconnection state in thick film wiring formation by thick film printing. That is, defects in via holes or through holes themselves formed in or on the wiring board, connections between these and thick film wiring, connections between thick film wiring and thin film wiring, defects in thin film wiring, thin film wiring and via holes The same thing can occur with respect to the entire wiring existing on the surface and inside of the wiring board such as connection, or in a multilayer wiring layer formed on the wiring board. For example, there may be a case where the connection with the thick film wiring is uncertain due to insufficient filling of the metallized paste into the via hole, or a case where foreign matter adheres when forming the thin film wiring. In such a case, since the conduction of the defective portion is limited in all cases, the resistance is higher than in a normal case. Therefore, hereinafter, a defective portion in a pseudo disconnection state, a poor connection state, or the like is referred to as an abnormally high resistance portion.
[0008]
The present invention has been made in view of the above-described problems, and makes it possible to reveal an abnormally high resistance portion such as a pseudo disconnection state that is latent and difficult to detect by a simple method, and is reliably and easily inspected.・ Arrangement for sorting Line inspection It is an object of the present invention to provide an inspection method and to improve the wiring reliability of a wiring board provided to the market. Another purpose is to use such wiring. Wiring board manufacturing method capable of easily selecting wiring boards having normal wiring by using an inspection method Is to provide.
[0009]
[Means for Solving the Problems]
But , The means is The insulating layer that contacts the wiring is made of an organic insulating material. Provided on the wiring board Said wiring In this case, the connection end with the circuit element mounted on the wiring board is one end of the wiring, the connection end with the external circuit in the wiring is the other end of the wiring, and one pole of the capacitor is on the wiring board. By connecting to one end of the wiring and connecting the other pole of the capacitor to the other end of the wiring of the wiring board, Open an abnormally high resistance part in the wiring by passing a current. And a step for inspecting the continuity of the wiring thereafter. Wiring of wiring board Inspection Method (Claim 1) It is in.
According to this, since the connection part with the processing circuit for flowing an electric current through the wiring is exposed to the outside of the wiring board as the connection end part with the circuit element and the external circuit, the connection is easy. In addition, the circuit for wiring processing of the wiring board described above, in which a current for opening the abnormally high resistance portion in the wiring is opened, has the effect that the circuit configuration is simple and the circuit can be manufactured at low cost. .
[0010]
Further, in the wiring board wiring inspection method (claim 2), the capacitor is charged, and the electric charge accumulated in the capacitor is used as a current for opening an abnormally high resistance portion in the wiring of the wiring board. By properly controlling the amount of charge stored in the capacitor, the total amount of charge flowing in the wiring, that is, the energy applied to the wiring can be controlled. .
[0011]
Further, the connection end portion with the plurality of circuit elements is made conductive by the conductive member, and one of the connection end portions with the plurality of circuit elements is used as one end of the wiring, and the connection end portion with the external circuit in this wiring Is used as the other end of the wiring, and a current is passed between the one end of the wiring and the other end, and then the other one of the connection ends to the plurality of circuit elements is used as one end of the other wiring. The other connection end of the other wiring to the external circuit is the other end of the other wiring, and a current flows between the other end of the other wiring and the other end. This wiring inspection method is also included. In this case, in general, the interval between the connection end portions is narrow and easily damaged, and a plurality of connection end portions with circuit elements that are liable to deteriorate the connectivity with the circuit element due to the damage are collected together with the conductive member. Since connection and electrical connection are established, damage to the connection end with this circuit element is reduced, and there is no need for fine positioning and electrical connection, which facilitates processing and is preferable. .
[0012]
Here, when at least a part of the wiring is an internal wiring of the ceramic wiring board, it is difficult to detect a wiring defect by an appearance inspection in the internal wiring portion, and therefore it is particularly preferable to apply the present invention. preferable. In addition, when the insulating layer in contact with the wiring is made of ceramic or glass, the insulating layer is rarely altered by heat generated when the current flows, so that the flowing current can be increased, and the reliability of the processing is increased, which is preferable. .
[0013]
Also, Current flows through the wiring of the wiring board through at least one of the current limiting circuit and the voltage limiting circuit between both ends of the wiring. , Wiring of wiring board Inspection method (Claim 5) In this case, it is possible to prevent the normal wiring from being deteriorated or disconnected by limiting the current or voltage applied to the wiring.
Furthermore, A wiring board manufacturing method (Claim 6) in which a wiring board having defects in wiring is inspected and sorted by the wiring inspection method as described above is also included in the present invention. .
[0014]
[Action]
As described above, the resistance value of the defective portion such as the pseudo disconnection state or the poor connection state in the wiring of the wiring board is higher than that of the normal portion. That is, such a defective portion exhibits an abnormally high resistance. However, even if a continuity test is performed on such a wiring, it is not possible to remove a wiring that is determined to have continuity and therefore has a defect (thus, a wiring board). Further, even if the resistance value of the wiring is measured, the wiring showing extremely high resistance can be removed as having a defect, but if there are few defects, the resistance does not change so much and it is difficult to determine that there is a defect.
[0015]
By the way, when a current is passed through a wiring having such a defective portion, heat generated by a high resistance component is increased in the defective portion compared to a normal portion of the wiring. Therefore, if a sufficiently large current is supplied, the abnormally high resistance portion is burned out (burned out) due to heat generation, and the wiring having the abnormally high resistance portion is opened (completely disconnected). That is, the wiring that has been in the pseudo disconnection state or the like can be changed to a complete disconnection state by the current. In other words, the wiring that had a certain level of resistance before it was burned out and was difficult to determine the presence or absence of a defect was exposed, but after the burnout, the defect became obvious and was easily opened by a continuity test. (Disconnection) can be determined. That is, it is possible to inspect and select a wiring having a defect, and hence a wiring board having a defect, with a simple and inexpensive continuity inspection circuit.
[0016]
Here, as the two terminals for supplying current to the wiring, any part in the wiring may be selected as long as the wiring between the terminals includes a portion to be examined for the presence or absence of defects. However, if the middle part of the wiring is used as a terminal for supplying current, in general wiring, the wiring for contacting the probe (current introduction terminal) of the processing circuit, that is, the terminal portion is generally thin. Is difficult. Furthermore, there is a high possibility of causing disconnection when the wiring is damaged by the probe. In addition, when the wiring to be processed / inspected according to the present invention is an internal wiring that is not exposed to the outside, a part of the wiring is exposed to the outside only for connection with the probe. Complicating the upper wiring causes cost increase and characteristic deterioration.
[0017]
Therefore, as one end of the wiring to be processed, a connection end such as a bonding pad, a flip chip connection pad, or a bump provided at the end of the wiring to connect the integrated circuit or other circuit element to the wiring is used. Is preferred. Such a part is formed by being exposed on the surface of the wiring board due to its nature, and its size is often larger than the middle part of the wiring, so that the probe can be easily positioned and easily contacted. This is because there is no possibility of breakage or disconnection due to the need for a design change. Here, the processing / inspection of the wiring according to the present invention is preferably performed before the connection end portion is plated with Ni or Au. This is because even if the connection end is damaged by the contact of the probe, Ni or Au plating is performed after the inspection, so that there is little decrease in bonding properties and the like. In addition, in this case, since the defective wiring board can be removed before adding the added value of plating, the cost is eventually reduced. Furthermore, since the bonding pads, which are connection ends with the integrated circuit, etc., have a short distance between adjacent pads, the conductive pads such as conductive rubber are used as a probe. If the pad (connection end with the circuit element) is brought into contact / conduction, the other side is appropriately selected, and the pad side (connection end with the circuit element) is positioned (moved) once. There is also an advantage that a plurality of wirings can be processed without touching the pads, and further, the processing time can be shortened.
[0018]
In addition, as the other end of the wiring, a connection end to an external circuit, for example, a connection terminal such as a pin or lead, a ball bonding pad, a pad for forming these, an external connection end in a leadless chip carrier, etc. Is preferably used. The connection end with the external circuit is also formed so as to be exposed on the surface of the wiring board due to its nature, and is usually larger in size than the middle part of the wiring. Therefore, the contact with the probe is easy, and the design change is not required for the contact with the probe. In particular, if the treatment according to the present invention is performed before fixing the pins and leads, the defective wiring board can be removed before adding the added value such as fixing of the pins and the like, and further plating of the pins and the like. Cost reduction.
[0019]
In addition, as a circuit that allows current to flow in a wiring having an abnormally high resistance portion, if the charge accumulated (charged) in the capacitor is allowed to flow in the wiring, the amount of charge stored in the capacitor can be controlled by the voltage across the capacitor. The energy applied to the wiring can be easily controlled. Also, since the internal resistance of the capacitor is low, the maximum value of the current is less affected by this internal resistance, allowing a relatively large current to flow through the wiring at a time, leaving the abnormally high resistance portion open. It is suitable for. Note that the capacitor used here is sufficient if it has the required capacitance and withstand voltage. However, since it discharges instantaneously and the voltage between terminals varies greatly, a film capacitor or a metal film capacitor A capacitor having a small internal resistance suitable for charging and discharging is preferable. As an example of the circuit, there is a circuit in which one pole of a capacitor is connected to one end of the wiring and the other pole is connected to the other end of the wiring. Such a circuit has the simplest circuit configuration and can be provided at a low cost as a processing circuit. Furthermore, if an excessive current flows through the wiring, even if a normal wiring is present, the wiring and the insulating layer may be damaged (deteriorated) by heat, leading to a decrease in reliability. By providing a current limiting circuit and a voltage limiting circuit across the wiring, the reliability of the processed wiring board can be improved.
[0020]
【Example】
Examples of the present invention will be described below. The present invention is applied to a pseudo disconnection state of a wiring due to a printing defect or the like, but it is determined whether or not the state is in such a state without destroying the wiring board, and a certain amount is collected. It is difficult to obtain a wiring board that is in a pseudo disconnection state or the like. Therefore, in the following, an artificially broken state was produced during the manufacturing process of the wiring board, and the sample was investigated.
[0021]
First, a binder such as an organic resin, a solvent, and a plasticizer were pulverized and mixed with ceramic powder of 90% alumina to obtain a slurry, then formed into a sheet by a doctor blade method, and punched into a predetermined shape to obtain a green tape 1. Next, after using tungsten as a metallizing component and obtaining a metallized paste in which a resin and an organic solvent are mixed with this powder, the wiring 2 is printed on the green tape using a screen printing method. (See FIG. 1) Then, as shown in FIG. 2, at the center of the specific wiring 2a1 selected from among the wiring 2, (1) no defect (wiring remaining rate 100%), (2) the defect rate 30% (Remaining wiring rate 70%), (3) deficiency rate 50% (wiring remaining rate 50%), (4) deficiency rate 70% (wiring remaining rate 30%), (5) deficiency rate 90% (wiring remaining rate 10) %), A notch 2b1 was formed by cutting with a knife in a rectangular shape in the longitudinal direction of the wiring to artificially reproduce the printing failure state. Note that the wiring and the cut-out portion shrink about 20% during firing due to firing shrinkage, but the shrinkage rate (wiring remaining rate) changes even after firing because the wire shrinks at the same rate in both the longitudinal and width directions. do not do.
[0022]
Next, after laminating these green sheets, processing them into a predetermined shape such as cutting and pressure bonding, removing the binder, and firing for 3 hours in a reducing atmosphere at a temperature of 1550 ° C., as shown in FIGS. A ceramic wiring board 3 having the internal wiring 4 was obtained. The ceramic wiring board 3 has a substantially square shape, and a recess 3a is provided at the center of one surface for fixing an integrated circuit (not shown). The side surface 3b of the recess 3a is stepped, and the bonding wire 4c (length 1.5 mm, width 0.15 mm, adjacent interval 0.08 mm) is formed so that the internal wiring 4 extends on the top surface of the step 3b. There are many exposed. Further, a pin connection pad 4d (1.5 mmφ) provided on the ceramic wiring board is provided on the peripheral part (outer peripheral part) 3c of the recess 3a of the ceramic wiring board 3 in order to fix the connection pins with the external circuit. A large number of via holes 4e are provided.
[0023]
Here, the wiring 2a1 provided with the above-described notch becomes the internal wiring 4a1 and becomes a part of the wiring 5a1 after firing as shown in FIG. 5 (the description of other wirings is omitted). The internal wiring 4a1 has a length of 15 mm and a width of 0.15 mm, and has a bonding pad 4c1 formed on the upper surface of the stepped portion 3b of the concave portion 3a as an end, and a longitudinal length that becomes a pseudo-disconnection state in the middle. It has a notch portion 4b1 of about 0.85 mm and a defect rate (wiring remaining rate) of the aforementioned ratio. The wiring 5a1 further has a pin bonding pad 4d1 as the other end through a via hole 4e1 of φ0.2 mm × height 0.5 mm.
[0024]
FIG. , Inspection In order to pass a current through the wiring 14 to be subject to In addition, for inspection used in the present invention Circuit. The positive electrode 11 a and the negative electrode 11 b of the constant voltage power supply 11 are connected to the two electrodes 12 a and 12 b of the metal film capacitor 12 having the capacitance C. Furthermore, the positive electrode 12 a of the capacitor 12 is connected to the probe 15 a in contact with one end portion of the wiring 14 via a switch (relay) 13. The negative electrode 12b of the capacitor 12 is connected to the probe 15b in contact with the other end of the wiring 14 of the ceramic wiring board 3 to be processed. Here, in order to pass the current, first, the capacitor 12 is charged to the voltage E by the constant voltage power supply 11 with the switch 13 turned off. Thereafter, the switch 13 is turned on (turned on), and the charge accumulated in the capacitor is caused to flow through the internal wiring 14.
[0025]
FIG. 7 shows the state of current I (A) flowing through the wiring 14 at this time. Here, the characteristics of the constant voltage power supply 11 are the output voltage E = 5 V and the maximum output current Ip = 0.2 A. When the load is small and a current larger than the maximum output current Ip can flow, the maximum output A constant current operation is performed with a current (= 0.2 A). If the capacitance C of the capacitor 12 is 4700 μF, the resistance of the wiring 14 is R = 2Ω, and the internal resistance of the capacitor 12, the circuit wiring and the resistance of the probe 15 are ignored, the moment the switch 13 is turned on (t = t0). Current of I = E / R = 2.5A flows, decays with a curve of time constant τ = CR = 0.01 (sec), and is about 5τ = 0.05 (sec) after the switch 13 is turned on. Since the capacitor is discharged, only the maximum output current Ip = 0.2 A from the constant voltage power source flows thereafter.
[0026]
Due to such discharge, the following difference occurs between when the wiring 14 is normal and when there is an abnormally high resistance portion in a part thereof. That is, when normal, there is no part with high resistance in a part of the wiring, and therefore the entire wiring 14 generates heat due to the current I, so heat does not concentrate on a part, and the wiring 14 is disconnected or deteriorated. There is nothing. On the other hand, when there is an abnormally high resistance portion in a part of the wiring, when the current I flows, this defective portion particularly generates heat. This heat is generated only for a moment when a current is applied (in the above example, a time of about 0.05 sec). However, if the accumulated charge is sufficiently large, the metallization of the wiring 14 is locally melted or evaporated due to heat generation. Removed from the exothermic part. That is, the wiring is considered to burn out. As a result, the abnormally high resistance portion of the wiring is changed from the pseudo disconnection state or the like to the complete disconnection (open) state by the current I. Therefore, if a wiring having a defect such as a pseudo disconnection state is processed by such a method, it can be changed to a complete disconnection (open) state that can be easily inspected.
[0027]
In order to confirm this, as the wiring 14 to be processed, the wiring 5a1 having the internal wiring 4a1 that is artificially disconnected by the notch is subjected to a process of passing a current only once in the circuit. . Assuming that the voltage E of the power supply 11 is 5V, the remaining wiring ratio (%) and the initial resistance value left after the cutout, and the state after the processing were investigated for 30 samples in each state. The results are shown in Table 1. From Table 1, in the case of the present embodiment, if a 4700 μF capacitor is charged to 5 V and this charge is caused to flow through the wiring, the wiring defects up to a state where the wiring remaining rate is 50% (= 50% defective) It was confirmed that the pseudo disconnection state can be changed to a complete disconnection (open) state.
[0028]
Comparing the initial resistance values in Table 1, when there is a defect (wiring remaining rate of 50% or less) compared to the normal case (wiring remaining rate of 100%), it is about 13% higher (2.42 / 2.14 × 100 = 113), however, the difference is small and the absolute value is as low as about 2Ω, so it is difficult to clearly determine the presence or absence of a defect only by the initial resistance value. In addition, in this embodiment, the length of the notch is relatively long, 0.85 mm, but the defects such as notches due to printing defects in the actual printing process are shorter, and therefore the entire wiring In many cases, the effect on resistance is small. In such a case, it is expected that it will become increasingly difficult to determine the resistance value. On the other hand, according to the present invention, the smaller the defect portion, the more the heat generation portion is concentrated, and the defect portion is easily burned out. Therefore, according to the present invention, it is possible to change the abnormally high resistance portion of the wiring so that it can be easily determined by only a continuity test that is sufficient with a simple and inexpensive device without performing a difficult and uncertain resistance value test. I can do it. According to the present invention Inspection It is obvious that the same inspection can be performed by performing a resistance value inspection or a capacitance inspection after performing the above.
[0029]
By the way, when the wiring remaining ratio was 70%, even when a current was passed, it was not disconnected, and it was the same as normal wiring. In such a case, it seems to indicate that a ceramic wiring board having defective wiring is mixed as a normal product by inspection. However, the wiring such as the wiring 5a1 used in this embodiment is a signal wiring, and a large current does not flow, and its value is, for example, about several tens of mA. On the other hand, in this embodiment, a current 10 times or more is passed through the wiring 5a1 (and therefore the internal wiring 4a1). Therefore, a defect that does not break even when a sufficiently large current is applied is a slight defect that does not break due to heat or stress applied in these cases even if an integrated circuit or the like is assembled on the ceramic wiring board and used in the market. You can understand that this is just a flaw. That is, it is considered that such a ceramic wiring board does not cause problems such as disconnection in the market.
[0030]
In this embodiment, as shown in FIG. 8, a bonding pad 4c1 is used as one end of the wiring 5a1, and a pin connection pad 4d1 is used as the other end. Bonding pad 4c1 and Inspection As the probe 15a for connection to the circuit, a conductive rubber sheet 15a ′ having a convex shape that fits into the concave portion 3a formed on the ceramic wiring board 3 was used. According to the probe 15a ′ made of this conductive rubber sheet, the plurality of bonding pads 4c formed in the recess 3a can be brought into contact / conduction at once. On the other hand, the probe 15b for connecting the pin connection pad 4d1 and the processing circuit is a contact probe having a hemispherical tip and φ0.8 × 25 mm, and is used in contact with the pin bonding pad 4d1. By doing so, it is not necessary to accurately position the bonding pad 4c1 that is smaller in size than the pin bonding pad 4d1 and to contact the probe 15a (contact probe). In addition, since the bonding pad is not damaged by the probe 15a, there is no risk of the wire bonding property being lowered due to the damage. Note that the probe 15a ′ can obtain the same advantages even when a conductive plastic sheet or a composite material of metal and plastic is used in addition to the conductive rubber sheet. On the other hand, since the dimensions of the pin bonding pad 4d (4d1) are relatively large, positioning is easy, and even if some scratches are generated, it is convenient that the scratches are filled by brazing the pins.
[0031]
Next, the present invention is applied to normal (defect-free) wiring. by Whether or not there was an adverse effect such as deterioration of the resistance value due to the current flow, the resistance value was measured after the current flow repeatedly, and the influence was investigated. FIG. 9 shows a waveform of a voltage applied to the wiring 5a1 including the normal internal wiring 4a1 (wiring remaining rate 100%). The above Inspection The circuit 13 is used, the maximum voltage E is set to 5 V, the switch 13 is turned on for 0.05 seconds, the charge charged in the capacitor 12 is caused to flow through the wiring 5a1, and then the switch 13 is turned off for 0.2 seconds. During this time, the capacitor 12 is charged from the constant voltage power supply 11. After repeating this, the resistance value of the wiring 5a1 was measured and the change was investigated. The results are shown in Table 2. From the results of Table 2, it was found that even when such a voltage / current was applied, the resistance value of the normal internal wiring 4a1 did not change and there was no problem such as deterioration of the wiring. Therefore, according to the present invention, it was confirmed that the wiring having the pseudo disconnection state can be changed to the complete disconnection, and that the normal wiring is not affected.
[0032]
In addition, although the Example of this invention was described above, this invention is not limited to such an Example at all, Of course, in the range which does not deviate from the summary of this invention, it can implement in various aspects. It is. For example, in the embodiments, a PGA type integrated circuit package having a recess as a wiring board is shown, but the wiring board may have a flat plate shape or the like. In addition, the case where the width of the wiring was locally narrowed as a defect was artificially reproduced and investigated, but the actual defect was not limited to the case where the width of the wiring was locally narrowed. There are also cases where the thickness of the wiring is locally thinned, the connection between the via hole and the wiring is insufficient, and other cases. However, it is obvious that the present invention can be applied to any case where the resistance value of the wiring is locally increased.
[0033]
The present invention is applied to a wiring board having, for example, an insulating layer made of polyimide (organic insulating material) and a multilayer wiring layer formed of wiring made of Cu, Ag, or the like on the surface of the wiring board. .
In the embodiment, the applied voltage is 5 V, and a current of about 2.5 A (= 5 V / 2Ω) is applied at the maximum. However, the present invention is not limited to this, and the wiring material, width, thickness, etc. The resistance value of the wiring, the material of the insulating layer, the voltage and current used for the wiring in normal use, etc. should be selected as appropriate, and the current flows through the wiring that has an abnormally high resistance portion. As long as it is made to manifest as a complete disconnection state.
Furthermore, although the case where the internal wiring has a defect was investigated, the present invention may be applied only to the surface of the wiring board or to the wiring formed on both the surface and the inside. This is because it is clear that if there is a defect in the multilayer wiring layer, it can be removed as well.
[0034]
In order to pass a current through the wiring, a DC or AC power supply may be connected to the wiring to be inspected. However, if the capacitor is charged by a DC constant voltage power source and a current is passed through the wiring using this charge, the charge accumulated in the capacitor by the voltage, that is, the energy flowing through the wiring can be conveniently controlled. In addition, energy is gradually stored in the capacitor over a relatively long time, and a current can flow through the wiring in a relatively short time. Therefore, since the maximum output current of the power supply is sufficient, a small power supply, that is, an inexpensive power supply is sufficient. In addition, as such a method, as in the embodiment of the present invention, a capacitor and a DC constant voltage power supply may be connected, and a wiring, a capacitor, and a power supply may be connected / disconnected by turning on / off the switch, You may make it connect a capacitor | condenser with a power supply and wiring alternately with a switch. In these processing circuits, it is preferable to connect to the wiring via a current limiting circuit or a voltage limiting circuit in order to limit the current flowing through the wiring or the voltage to be applied. As the current limiting circuit and the voltage limiting circuit, a circuit configuration usually used is sufficient. For example, as shown in FIG. 10, the current flowing through the transistor is set by setting the base input of the transistor to an appropriate value with a DC amplifier. And a circuit configuration in which an arrester or a constant voltage diode is inserted in parallel between both terminals of the wiring.
[0035]
[Table 1]
Figure 0003722760
[0036]
[Table 2]
Figure 0003722760
[0037]
【The invention's effect】
As is clear from the above, when there is an abnormally high resistance part in a part of the wiring, the defective part is burned out and completely disconnected (opened) by flowing current without affecting the normal product Can be changed. In addition, the connection portion with the circuit for inspection for passing a current through the wiring is exposed to the outside of the wiring board as a connection end with the circuit element and the external circuit, so that the connection is easy. . Moreover, by appropriately controlling the amount of charge stored in the capacitor, the total amount of charge flowing in the wiring, that is, the energy applied to the wiring can be controlled. . Furthermore, in the wiring inspection circuit for a wiring board described above, in which a current for opening an abnormally high resistance portion in the wiring is opened, the circuit configuration is simple and the circuit can be manufactured at low cost. .
Therefore, Before inspection Therefore, it is possible to provide a highly reliable wiring board that can easily discriminate what has been difficult to discriminate, and does not cause disconnection failure in the market. In addition, the wiring can be processed without affecting the normal wiring, and it is simple and inexpensive. For wiring inspection Providing circuit Also I can do it.
[Brief description of the drawings]
FIG. 1 is a perspective view showing a state in which wiring is formed with paste on a green sheet.
FIG. 2 is a plan view showing a state in which a narrow portion is artificially formed in the wiring.
FIG. 3 is an external perspective view of a ceramic wiring board.
4 is a cross-sectional view taken along the line AA ′ of the ceramic wiring board shown in FIG. 3;
5 is an enlarged perspective view showing a state of internal wiring of the ceramic wiring board shown in FIGS. 3 and 4. FIG.
FIG. 6 is a circuit diagram of a processing circuit for passing a current through a wiring.
FIG. 7 is a graph showing a state of a current flowing through a wiring.
FIG. 8 is a cross-sectional view showing a state of a ceramic wiring board when a conductive rubber sheet is used as a probe.
FIG. 9 is a graph showing a state of a voltage when a current is repeatedly passed through a wiring.
FIG. 10 is a circuit diagram showing an example of a circuit in the case where a current is passed through a wiring through a current limiting circuit.
FIG. 11 is a perspective view showing a portion where the width of the wiring is narrow.
[Explanation of symbols]
1. Green sheet
2. Wiring before firing
2b1, Narrow part (defect part) in wiring
3. Ceramic wiring board
3a, recess
3b, side of recess
4, 4a1, internal wiring
4b1, narrow part (defect part)
4c, 4c1, bonding pad
4d, 4d1, pin pad
4e, 4e1 via hole
5a1, wiring
11. DC constant voltage power supply
12. Capacitor
13. Switch (relay)
14. Wiring
15. Probe
103, ceramic wiring board
104, wiring
104a, narrow part in wiring

Claims (6)

配線が接する絶縁層が有機絶縁材料からなる配線基板に設けられた前記配線において、前記配線基板に搭載する回路素子との接続端部を前記配線の一端とし、該配線における外部回路との接続端部を該配線の他端とし、コンデンサの一方の極を前記配線基板の前記配線の一端に接続し、該コンデンサの他方の極を該配線基板の該配線の他端に接続することにより、電流を流して該配線中の異常高抵抗部分を開放状態とする工程と、
その後に該配線の導通を検査する工程とからなる
ことを特徴とする配線基板の配線検査方法。
In the insulating layer wiring is in contact is provided on the wiring board made of an organic insulating material the wires, said the connection end portion of a circuit element mounted on the wiring board and one end of the wiring, the connecting end of the external circuit in the wiring The other end of the wiring, one pole of the capacitor is connected to one end of the wiring of the wiring board, and the other pole of the capacitor is connected to the other end of the wiring of the wiring board. Flowing an abnormally high resistance portion in the wiring to open state,
A step of examining the continuity of the wiring thereafter, consisting,
A wiring inspection method for a wiring board.
前記コンデンサを充電し、該コンデンサに蓄積した電荷を、前記配線基板の前記配線中の異常高抵抗部分を開放状態とする電流に用いる、
ことを特徴とする請求項1に記載の配線基板の配線検査方法。
The capacitor is charged, and the electric charge accumulated in the capacitor is used as a current for opening an abnormally high resistance portion in the wiring of the wiring board.
The wiring board wiring inspection method according to claim 1, wherein:
前記配線の少なくとも一部が前記配線基板の内部配線である、
ことを特徴とする請求項1または2に記載の配線基板の配線検査方法。
At least part of the wiring is internal wiring of the wiring board;
A wiring inspection method for a wiring board according to claim 1 or 2 .
複数の前記回路素子との接続端部を導電性部材で導通し、該複数の回路素子との接続端部のうちの1つを前記配線の一端とし、該配線における前記外部回路との接続端部を該配線の他端とし、該配線の該一端と該他端間に前記電流を流し、その後に該複数の回路素子との接続端部のうちの他の1つを他の前記配線の一端とし、該他の配線における前記外部回路との他の接続端部を該他の配線の他端とし、該他の配線の該他の一端と該他の他端間に前記電流を流す
ことを特徴とする請求項1乃至3のいずれか一項に記載の配線基板の配線検査方法。
Conductive connection portions with the plurality of circuit elements are made by a conductive member, and one of the connection end portions with the plurality of circuit elements is one end of the wiring, and the connection end with the external circuit in the wiring The other end of the wiring, the current flows between the one end and the other end of the wiring, and then the other one of the connection ends to the plurality of circuit elements is connected to the other wiring. One end, the other connection end of the other wiring with the external circuit is the other end of the other wiring, and the current flows between the other end of the other wiring and the other other end ,
The wiring board wiring inspection method according to any one of claims 1 to 3 , wherein the wiring board wiring inspection method is performed.
少なくとも電流制限回路及び配線両端間電圧制限回路のいずれかを介して前記電流を前記配線基板の前記配線へ流す
ことを特徴とする請求項1乃至4のいずれか一項に記載の配線基板の配線検査方法。
Flowing the current to the wiring of the wiring board through at least one of a current limiting circuit and a voltage limiting circuit between both ends of the wiring ;
The wiring board wiring inspection method according to claim 1, wherein the wiring board wiring inspection method is a wiring board inspection method.
請求項1ないし請求項のいずれか一項に記載の配線基板の配線検査方法により配線に欠陥を有する配線基板を検査し、選別する
ことを特徴とする配線基板の製造方法。
Inspection and selection of wiring boards having defects in wiring by the wiring board wiring inspection method according to any one of claims 1 to 5 .
A method for manufacturing a wiring board.
JP2002038934A 2002-02-15 2002-02-15 Wiring board wiring inspection method and wiring board manufacturing method Expired - Lifetime JP3722760B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Application Number Priority Date Filing Date Title
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Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP17944094A Division JP3297965B2 (en) 1994-07-06 1994-07-06 Wiring inspection method for ceramic wiring board

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JP3722760B2 true JP3722760B2 (en) 2005-11-30

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JP2006278762A (en) * 2005-03-29 2006-10-12 Tdk Corp Inspection method and inspection apparatus for multilayered substrate
JP5400823B2 (en) * 2011-03-28 2014-01-29 住友電気工業株式会社 Printed wiring board and printed wiring board manufacturing method

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