JP2006278762A - Inspection method and inspection apparatus for multilayered substrate - Google Patents

Inspection method and inspection apparatus for multilayered substrate Download PDF

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JP2006278762A
JP2006278762A JP2005096136A JP2005096136A JP2006278762A JP 2006278762 A JP2006278762 A JP 2006278762A JP 2005096136 A JP2005096136 A JP 2005096136A JP 2005096136 A JP2005096136 A JP 2005096136A JP 2006278762 A JP2006278762 A JP 2006278762A
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Takemi Hasegawa
武美 長谷川
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TDK Corp
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<P>PROBLEM TO BE SOLVED: To provide an inspection method and an inspection apparatus for a multilayered substrate, whereby the defect of the multilayered substrate that might otherwise be discriminated to be a non-defective product can be found out, using a simple method. <P>SOLUTION: Resistance measurement for detecting a partial defect and a joining abnormity or the like of connection holes 8 formed to each layer and an inter-layer insulation layer 6 is carried out twice, with a measurement current of several mA and a measurement current from several tens of times to several hundreds of times of the several mA. Since the resistance change of the local resistance abnormality location due to heat generation is greater than that of normal positions, the resistance abnormality location 20 can easily be detected, by checking a difference of measured values conducted twice by changing the measurement current. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、たとえば多層基板のパターン層の部分欠損や接合異常、あるいは層間絶縁膜に形成された接続孔の部分欠損や接合異常などの欠陥を検出する多層基板の検査方法および検査方法に関する。   The present invention relates to a multilayer substrate inspection method and an inspection method for detecting defects such as partial defects or bonding abnormalities in pattern layers of a multilayer substrate, or partial defects or bonding abnormalities in connection holes formed in an interlayer insulating film.

製造された多層基板の検査を行うために、多層基板に形成された一対のパッド部に検査測定装置の端子を接触させ、これらの一対のパッド部間の抵抗を測定し、パッド部間の導通経路に欠陥が無いかを検査する場合がある。単一の多層基板には、多数のパッド部が形成してあるために、検査においては、異なる一対のパッド部間で、このような抵抗の測定を繰り返すことになる。   In order to inspect the manufactured multilayer substrate, the terminals of the inspection and measurement device are brought into contact with a pair of pad portions formed on the multilayer substrate, the resistance between the pair of pad portions is measured, and the continuity between the pad portions is measured. There are cases where the path is inspected for defects. Since a large number of pad portions are formed on a single multilayer substrate, such resistance measurement is repeated between a pair of different pad portions in the inspection.

従来の検査方法では、計測された抵抗の値が、基準値を満足するか否かにより、良品と不良品との区別を行っていた。ところが、多層基板における検査すべき一対のパッド部間の抵抗は、たとえば3mΩ程度に微小な値であり、欠陥の種類によっては、判別が困難であり、不良品を良品として判断するおそれがあった。すなわち、数mA程度の微弱な測定電流を流し、その間の電圧を計測することにより微細な抵抗を測定するために、所定の基準値を満足するものであっても、内部に欠陥が隠れて存在する可能性があった。   In the conventional inspection method, a good product and a defective product are distinguished depending on whether or not the measured resistance value satisfies a reference value. However, the resistance between the pair of pad portions to be inspected in the multilayer substrate is a very small value of, for example, about 3 mΩ, and depending on the type of defect, it is difficult to discriminate and there is a possibility that a defective product is judged as a good product. . That is, in order to measure a minute resistance by passing a weak measurement current of about several mA and measuring the voltage between them, even if it satisfies a predetermined reference value, a defect is hidden inside. There was a possibility.

たとえば抵抗の基準値を設けたとしても、製造工程のロット毎にもバラツキがあり、一律に同じ基準値で、良品と不良品の判断を行うと、良品と判断されたものの中に、不良品が混入する可能性があった。   For example, even if a reference value for resistance is set, there is variation among lots in the manufacturing process, and if a good product and a defective product are judged with the same reference value, the defective product There was a possibility of mixing.

なお、下記の特許文献1に記載するように、二種類の測定電流を流すことにより、測定用端子とパッド部との接触抵抗の影響を排除して、微小な抵抗を正確に測定することにより、導通不良などを検出する方法が知られている。しかしながら、この方法では、正確な抵抗を検出することが可能であるが、良品か否かを判断する際には、従来と同様に、抵抗が、所定の基準値を満足するか否かで、導通不良などを検出するために、良品と判断されたものの中に、欠陥が隠れて存在する可能性が依然としてあった。すなわち、正確に抵抗を求めたとしても、一律に基準値を決めて選別する従来の方法では、良品と判断されたものの中に、欠陥が隠れて存在するおそれがあった。
特開2004−279270号公報
In addition, as described in the following Patent Document 1, by passing two types of measurement currents, the influence of the contact resistance between the measurement terminal and the pad portion is eliminated, and the minute resistance is accurately measured. A method for detecting a conduction failure or the like is known. However, in this method, it is possible to detect an accurate resistance, but when determining whether or not it is a non-defective product, it is determined whether or not the resistance satisfies a predetermined reference value, as in the past. In order to detect a continuity failure or the like, there was still a possibility that a defect was hidden in what was judged as a good product. That is, even if the resistance is obtained accurately, the conventional method of uniformly determining and selecting the reference value may cause defects to be hidden in what is determined to be a non-defective product.
JP 2004-279270 A

本発明は、このような実状に鑑みてなされ、従来では良品と判断されるおそれがある欠陥を、簡便な方法で見つけることが可能な電子部品の検査方法(特に、多層基板の検査方法)および検査装置を提供することを目的とする。   The present invention has been made in view of such a situation, and an electronic component inspection method (in particular, a multilayer substrate inspection method) capable of finding a defect that may be judged as a non-defective product by a simple method, and An object is to provide an inspection device.

上記目的を達成するために、本発明に係る電子部品の検査(特に、多層基板の検査、以下同様)方法は、
第1パッド部と、前記第1パッド部に対して導通経路を通して接続してある第2パッド部とを少なくとも有する電子部品を検査する方法であって、
前記第1パッド部と第2パッド部との間に、第1電流を流し、これらのパッド部の間に生じる第1電圧を測定し、前記第1電流および第1電圧に基づき、これらのパッド部の間の第1抵抗(R1)を算出する工程と、
前記第1パッド部と第2パッド部との間に、前記第1電流よりも、20倍以上大きな第2電流を流し、これらのパッド部の間に生じる第2電圧を測定し、前記第2電流および第2電圧に基づき、これらのパッド部の間の第2抵抗(R2)を算出する工程と、
前記第2抵抗(R2)と第1抵抗(R1)との関係に基づき、欠陥を検出する工程とを有する。
In order to achieve the above object, the method of inspecting an electronic component according to the present invention (in particular, inspection of a multilayer substrate, the same applies hereinafter)
A method for inspecting an electronic component having at least a first pad part and a second pad part connected to the first pad part through a conduction path,
A first current is passed between the first pad portion and the second pad portion, a first voltage generated between these pad portions is measured, and these pads are based on the first current and the first voltage. Calculating a first resistance (R1) between the sections;
A second current that is 20 times greater than the first current is passed between the first pad portion and the second pad portion, a second voltage generated between these pad portions is measured, and the second current is measured. Calculating a second resistance (R2) between these pad portions based on the current and the second voltage;
And detecting a defect based on the relationship between the second resistor (R2) and the first resistor (R1).

また、本発明に係る電子部品の検査装置は、
第1パッド部と、前記第1パッド部に対して導通経路を通して接続してある第2パッド部とを少なくとも有する電子部品を検査する検査装置であって、
前記第1パッド部と第2パッド部との間に、第1電流を流し、これらのパッド部の間に生じる第1電圧を測定し、前記第1電流および第1電圧に基づき、これらのパッド部の間の第1抵抗(R1)を算出する第1抵抗算出手段と、
前記第1パッド部と第2パッド部との間に、前記第1電流よりも、20倍以上大きな第2電流を流し、これらのパッド部の間に生じる第2電圧を測定し、前記第2電流および第2電圧に基づき、これらのパッド部の間の第2抵抗(R2)を算出する第2抵抗算出手段と、
前記第2抵抗(R2)と第1抵抗(R1)との関係に基づき、欠陥を検出する欠陥検出手段とを有する。
In addition, an electronic component inspection apparatus according to the present invention includes:
An inspection apparatus for inspecting an electronic component having at least a first pad part and a second pad part connected to the first pad part through a conduction path,
A first current is passed between the first pad portion and the second pad portion, a first voltage generated between these pad portions is measured, and these pads are based on the first current and the first voltage. First resistance calculating means for calculating a first resistance (R1) between the sections;
A second current that is 20 times greater than the first current is passed between the first pad portion and the second pad portion, a second voltage generated between these pad portions is measured, and the second current is measured. Second resistance calculating means for calculating a second resistance (R2) between these pad portions based on the current and the second voltage;
Defect detecting means for detecting a defect based on the relationship between the second resistor (R2) and the first resistor (R1).

本発明に係る電子部品の検査方法および検査装置では、検査すべき一対のパッド部間の抵抗の値を求め、その値が基準値に対して差異があるかを判断するのではない。本発明では、第1パッド部と第2パッド部との間に、第1電流よりも、20倍以上、好ましくは50倍以上、さらに好ましくは100倍以上、特に好ましくは500倍以上の大きな第2電流を流す。これにより、第1パッド部と第2パッド部との間に、部分的に欠陥箇所がある場合には、部分的に抵抗が高いため、欠陥の部分での発熱が通常個所に比べて大きくなる。抵抗温度係数は抵抗材料によってほぼ定まり、単体金属の場合は温度の上昇に伴って格子振動が増大し電子が散乱されるため抵抗は増大する。   In the electronic component inspection method and inspection apparatus according to the present invention, the resistance value between the pair of pad portions to be inspected is not determined, and it is not determined whether the value is different from the reference value. In the present invention, between the first pad portion and the second pad portion, the first current is 20 times or more, preferably 50 times or more, more preferably 100 times or more, particularly preferably 500 times or more larger than the first current. Pass two currents. As a result, when there is a partially defective portion between the first pad portion and the second pad portion, the resistance is partially high, so that heat generation at the defective portion is larger than that at the normal location. . The temperature coefficient of resistance is substantially determined by the resistance material, and in the case of a single metal, the lattice vibration increases as the temperature rises and electrons are scattered, so that the resistance increases.

したがって、パッド部間に欠陥がある部品は、大電流(第2電流)を流した場合に局所発熱により抵抗が通常品よりも高くなる。このことから小電流(第1電流)時の抵抗と大電流時の抵抗の変化を見れば、欠陥があるものは、通常品よりも抵抗の変化が大きくなる。この事で、欠陥の有無を検出することができる。すなわち、第2電流印加時に欠陥箇所に発熱が生じると、測定される第2抵抗が、発熱が生じていない状態(第1電流印加時)の第1抵抗と異なってくる。   Therefore, a component having a defect between the pad portions has a higher resistance than a normal product due to local heat generation when a large current (second current) is passed. Therefore, if a change in resistance at a small current (first current) and a change in resistance at a large current are observed, a change in resistance is greater in a defective one than in a normal product. This makes it possible to detect the presence or absence of defects. That is, when heat is generated at the defective portion when the second current is applied, the measured second resistance is different from the first resistance in a state where no heat is generated (when the first current is applied).

本発明の方法では、この抵抗の変化(差または割合)が所定値以上か否かを判断し、この変化が所定値以上である場合に、欠陥が存在すると判断するのである。抵抗の変化(差または割合)が所定値以上の場合には、欠陥箇所に発熱が生じていると予測される。また逆に、抵抗の変化(差または割合)が所定値以下の場合には、発熱がなく、欠陥箇所がないと判断できる。このため、本発明の方法では、従来では検出できなかった欠陥を極めて容易に検出することができる。   In the method of the present invention, it is determined whether or not the change (difference or ratio) of the resistance is equal to or greater than a predetermined value. If the change is equal to or greater than the predetermined value, it is determined that a defect exists. When the change in resistance (difference or ratio) is equal to or greater than a predetermined value, it is predicted that heat is generated at the defective portion. Conversely, if the resistance change (difference or ratio) is less than or equal to a predetermined value, it can be determined that there is no heat generation and no defective portion. For this reason, the method of the present invention can very easily detect defects that could not be detected conventionally.

なお、本発明では、第1電流の通電時間に比較して、第2電流の通電時間を長くすることによっても、欠陥箇所がある場合に、第2電流時に、その欠陥箇所に発熱を生じさせることができる。   In the present invention, when there is a defective portion, the heat generation is caused at the defective portion at the second current even when the energizing time of the second current is made longer than the energizing time of the first current. be able to.

本発明では、前記第2抵抗と第1抵抗との差(R2−R1)が所定値以上である場合に、欠陥が存在すると判断しても良い。あるいは、前記第1抵抗に対する前記第2抵抗と第1抵抗との差の割合((R2−R1)/R1)が所定値以上である場合に、欠陥が存在すると判断しても良い。   In the present invention, it may be determined that a defect exists when a difference (R2−R1) between the second resistance and the first resistance is equal to or greater than a predetermined value. Alternatively, it may be determined that a defect exists when a ratio ((R2−R1) / R1) between the second resistor and the first resistor with respect to the first resistor is equal to or greater than a predetermined value.

本発明では、前記第1パッド部と第2パッド部との間に、欠陥箇所が存在する場合に、前記第1電流は、前記欠陥箇所が発熱しない程度の電流値であり、前記第2電流は、前記欠陥箇所が発熱する程度の電流値である。   In the present invention, when there is a defective portion between the first pad portion and the second pad portion, the first current is a current value that does not cause the defective portion to generate heat, and the second current Is a current value at which the defective portion generates heat.

好ましくは、前記第1電流が、1〜10mAの範囲内にある定電流であり、前記第2電流が、500mA以上の定電流である。   Preferably, the first current is a constant current in a range of 1 to 10 mA, and the second current is a constant current of 500 mA or more.

好ましくは、前記第1電流および第2電流を印加するための端子と、前記第1電圧および第2電圧を測定するための端子とが別であり、合計4つの端子を、測定装置が有する。すなわち、4端子法であることが好ましい。4端子法は、2端子法に比べて、抵抗を高精度で測定することができる。   Preferably, a terminal for applying the first current and the second current is different from a terminal for measuring the first voltage and the second voltage, and the measuring device has a total of four terminals. That is, the 4-terminal method is preferable. The 4-terminal method can measure the resistance with higher accuracy than the 2-terminal method.

本発明に係る検査方法および検査装置は、特に、低融点ガラス多層基板などの多層基板の欠陥を検出するために適しているが、これに限定されず、アンテナスイッチモジュール、トランシーバーモジュール、フロントエンドモジュール、レーザーダイオードモジュール、パワーアンプモジュール、SAWディプレクサーなどのその他の多層基板あるいは電子部品における欠陥を検出するために用いても良い。   The inspection method and inspection apparatus according to the present invention are particularly suitable for detecting defects in a multilayer substrate such as a low-melting glass multilayer substrate, but are not limited thereto, and are an antenna switch module, a transceiver module, and a front-end module. It may be used to detect defects in other multilayer substrates such as laser diode modules, power amplifier modules, SAW diplexers, or electronic components.

本発明の検査方法および検査装置によれば、たとえば多層基板に形成してあるビアホール内導体柱における部分欠損や接合異常などを特に好適に検出することができる。多層基板においては、内部導体層または基板表面のパターン配線の温度係数がある程度大きく、本発明の方法が有効に機能する。   According to the inspection method and the inspection apparatus of the present invention, for example, partial defects or abnormal bonding in a via-hole conductor pillar formed on a multilayer substrate can be particularly suitably detected. In a multilayer substrate, the temperature coefficient of the internal conductor layer or the pattern wiring on the substrate surface is large to some extent, and the method of the present invention functions effectively.

以下、本発明を、図面に示す実施形態に基づき説明する。   Hereinafter, the present invention will be described based on embodiments shown in the drawings.

図1は本発明の一実施形態に係る多層基板の一例を示す要部断面図、
図2は図1に示す多層基板の欠陥を検出するための検査装置の概略構成図、
図3は図2に示す検査装置における測定処理・判定部の処理内容を示すフローチャート図である。
FIG. 1 is a cross-sectional view of an essential part showing an example of a multilayer substrate according to an embodiment of the present invention.
FIG. 2 is a schematic configuration diagram of an inspection apparatus for detecting defects in the multilayer substrate shown in FIG.
FIG. 3 is a flowchart showing the processing contents of the measurement processing / determination unit in the inspection apparatus shown in FIG.

図1に示すように、電子部品の一例としての多層基板2は、複数の内部導体層4が、それぞれ層間絶縁層6により仕切られた構造を有する。層間絶縁層6に形成されたビアホール内導体柱8により、層間で隣接する内部導体層4の相互、あるいは内部導体層4と外部のパッド部10との間が導通されている。   As shown in FIG. 1, a multilayer substrate 2 as an example of an electronic component has a structure in which a plurality of internal conductor layers 4 are partitioned by interlayer insulating layers 6. Via-hole conductor pillars 8 formed in the interlayer insulating layer 6 establish electrical continuity between the adjacent inner conductor layers 4 or between the inner conductor layer 4 and the external pad portion 10.

多層基板2における層間絶縁層6は、特に限定されないが、たとえばホウ珪酸系ガラス、MgO−Al−SiO系ガラス、CaO−Al−SiO系ガラスなどの低融点ガラス層、あるいはガラスエポキシなどの絶縁層で構成される。また、内部導体層4は、特に限定されないが、Ag、Cu、Au、Ag−Pd、Ag−Pt、Ag−Pd−Pt、Pd−Pt等で構成される。 The interlayer insulating layer 6 in the multilayer substrate 2 is not particularly limited. For example, a low melting point glass layer such as borosilicate glass, MgO—Al 2 O 3 —SiO 2 glass, CaO—Al 2 O 3 —SiO 2 glass, or the like. Or an insulating layer such as glass epoxy. Further, the inner conductor layer 4 is not particularly limited, and is composed of Ag, Cu, Au, Ag—Pd, Ag—Pt, Ag—Pd—Pt, Pd—Pt, or the like.

多層基板2を製造する際には、層間絶縁層6となる絶縁シートに、ビアホール内導体柱8に対応するビアホールを形成し、そのビアホールに導電体を埋め込む。その後、その絶縁シートをコア基板にプレスし、ビアホールの入口の窓開け加工(たとえばブラスト処理)を行い、その後に、無電界メッキなどで内部導体層4を形成する。同時に、ビアホールの入り口にも、無電界メッキ層が入り込み、ビアホール内導体柱8と内部導体層4とが接続される。これらの工程を繰り返せば、複数の内部導体層4が層間絶縁層6を介して積層している多層基板が得られる。なお、ビアホール内導体柱8とパッド部10との接続は、ビアホール内導体柱8と内部導体層4との接続と同様にして行われる。   When the multilayer substrate 2 is manufactured, via holes corresponding to the conductor columns 8 in the via holes are formed in the insulating sheet to be the interlayer insulating layer 6, and a conductor is embedded in the via holes. Thereafter, the insulating sheet is pressed onto the core substrate, a window opening process (for example, blasting) at the entrance of the via hole is performed, and then the inner conductor layer 4 is formed by electroless plating or the like. At the same time, the electroless plating layer also enters the entrance of the via hole, and the via hole inner conductor column 8 and the inner conductor layer 4 are connected. By repeating these steps, a multi-layer substrate in which a plurality of internal conductor layers 4 are laminated via an interlayer insulating layer 6 is obtained. The connection between the via-hole conductor pillar 8 and the pad portion 10 is performed in the same manner as the connection between the via-hole conductor pillar 8 and the inner conductor layer 4.

多層基板2の製造工程において、欠陥などが生じないことが理想であるが、何らかの理由により、欠陥箇所20が生じることがある。この欠陥箇所20は、たとえばブラスト処理の不完全などの理由で、パッド部10(内部導体層4も同様)と導体柱8との間に生じることがある。この欠陥箇所20は、従来の測定方法では、見つけにくいものであった。なぜなら、この欠陥箇所20は、従来の測定方法における比較的に低電流の測定電流を通し、一対のパッド10間において、正常に抵抗を測定することができるからである。   In the manufacturing process of the multilayer substrate 2, it is ideal that no defect or the like occurs, but a defective portion 20 may occur for some reason. The defective portion 20 may be generated between the pad portion 10 (the same applies to the internal conductor layer 4) and the conductor column 8 for reasons such as incomplete blasting. The defective portion 20 is difficult to find by the conventional measuring method. This is because the defect portion 20 allows normal resistance to be measured between the pair of pads 10 through a relatively low measurement current in the conventional measurement method.

本発明の一実施形態に係る検査装置を用いた検査方法では、このように完全には導通不良とはなっていないが、一部において導通経路が狭められているような欠陥20をも正確に検出することができる。以下、詳細に説明する。   In the inspection method using the inspection apparatus according to the embodiment of the present invention, the defect 20 is not completely defective in this way, but the defect 20 whose conduction path is partially narrowed is also accurately detected. Can be detected. Details will be described below.

まず、本発明の一実施形態に係る検査装置について説明する。図2に示すように、本実施形態の検査装置30は、4つの端子32および34を有する4端子法の検査装置である。検査装置30は、定電流源36と、電圧測定部38と、測定処理・判定部40とを有する。測定処理・判定部40が、本発明における第1抵抗算出手段と、第2抵抗算出手段と、欠陥検出手段とに対応し、図3に示す機能を有する。   First, an inspection apparatus according to an embodiment of the present invention will be described. As shown in FIG. 2, the inspection device 30 of this embodiment is a four-terminal method inspection device having four terminals 32 and 34. The inspection device 30 includes a constant current source 36, a voltage measurement unit 38, and a measurement processing / determination unit 40. The measurement processing / determination unit 40 corresponds to the first resistance calculation means, the second resistance calculation means, and the defect detection means in the present invention, and has the function shown in FIG.

測定対象となる図2に示す一対のパッド部10は、たとえば図1に示す多層基板2における一対のパッド部10であり、その一対のパッド部10には、一対の電流印加用端子32と、一対の電圧測定用端子34とが着脱自在に、電気的に接続される。一対の電流印加用端子32は、定電流源36に接続してあり、一対の電圧測定用端子34は、電圧測定部38に接続してある。定電流源36は、少なくとも二つの第1電流I1および第2電流I2とを切り替えて印加可能になっている。   A pair of pad portions 10 shown in FIG. 2 to be measured are, for example, a pair of pad portions 10 in the multilayer substrate 2 shown in FIG. 1, and the pair of pad portions 10 includes a pair of current application terminals 32, A pair of voltage measurement terminals 34 are detachably and electrically connected. The pair of current application terminals 32 are connected to a constant current source 36, and the pair of voltage measurement terminals 34 are connected to a voltage measurement unit 38. The constant current source 36 can switch and apply at least two of the first current I1 and the second current I2.

端子32,34は、X軸、Y軸及びZ軸方向へ駆動する駆動機構に支持されており、あらかじめ定められたプログラムに従って、X軸、Y軸及びZ軸方向に移動制御される。   The terminals 32 and 34 are supported by a drive mechanism that drives in the X-axis, Y-axis, and Z-axis directions, and are controlled to move in the X-axis, Y-axis, and Z-axis directions according to a predetermined program.

これらの4つの端子32,34が、測定すべき任意の一対のパッド部10に対して接続され、検査装置30による検査がスタートすると、図3に示すステップS1からステップS2にて、第1電流I1が、定電流源36から一対のパッド部10間に印加される。第1電流I1は、たとえば1〜10mAの範囲内にある定電流であり、その印加時間は、0.001〜0.050秒間程度である。この電流I1では、図1に示す欠陥20において、発熱はほとんど生じない。   When these four terminals 32 and 34 are connected to an arbitrary pair of pads 10 to be measured and the inspection by the inspection device 30 starts, the first current is changed from step S1 to step S2 shown in FIG. I1 is applied between the pair of pad portions 10 from the constant current source 36. The first current I1 is a constant current in the range of 1 to 10 mA, for example, and the application time is about 0.001 to 0.050 seconds. With this current I1, heat is hardly generated in the defect 20 shown in FIG.

次に、図3に示すステップS3にて、第1電流印加時の第1電圧V1を測定する。第1電圧V1は、図2に示す一対の端子34を通して、電圧測定部38で測定される。次に、ステップS4(第1抵抗算出手段)では、図2に示す測定処理・判定部40において、第1電圧V1を第1電流I1で割り算処理することにより、第1抵抗R1を求める。   Next, in step S3 shown in FIG. 3, the first voltage V1 when the first current is applied is measured. The first voltage V1 is measured by the voltage measuring unit 38 through the pair of terminals 34 shown in FIG. Next, in step S4 (first resistance calculation means), the first resistance R1 is obtained by dividing the first voltage V1 by the first current I1 in the measurement processing / determination unit 40 shown in FIG.

次に、図3に示すステップS5では、第2電流I2が、定電流源36から一対のパッド部10間に印加される。第2電流I2は、たとえば500mA以上、好ましくは1mA以上の定電流であり、その印加時間は、0.100〜3.000秒間程度である。この電流I2では、図1に示す欠陥20において、たとえば400℃以上に発熱することになる。   Next, in step S <b> 5 shown in FIG. 3, the second current I <b> 2 is applied between the pair of pad portions 10 from the constant current source 36. The second current I2 is, for example, a constant current of 500 mA or more, preferably 1 mA or more, and the application time is about 0.100 to 3.000 seconds. With this current I2, the defect 20 shown in FIG. 1 generates heat, for example, at 400 ° C. or higher.

次に、図3に示すステップS6にて、第2電流印加時の第2電圧V2を測定する。第2電圧V2は、図2に示す一対の端子34を通して、電圧測定部38で測定される。次に、ステップS7(第2抵抗算出手段)では、図2に示す測定処理・判定部40において、第2電圧V2を第2電流I2で割り算処理することにより、第2抵抗R2を求める。この第2抵抗R2は、欠陥箇所20がある場合には、発熱のために第1抵抗R1よりも高くなる。   Next, in step S6 shown in FIG. 3, the second voltage V2 when the second current is applied is measured. The second voltage V2 is measured by the voltage measuring unit 38 through the pair of terminals 34 shown in FIG. Next, in step S7 (second resistance calculating means), the second resistance R2 is obtained by dividing the second voltage V2 by the second current I2 in the measurement processing / determination unit 40 shown in FIG. The second resistor R2 is higher than the first resistor R1 due to heat generation when there is a defective portion 20.

次に、ステップS8では、第2抵抗と第1抵抗との差(R2−R1)=x、または第1抵抗に対する前記第2抵抗と第1抵抗との差の割合((R2−R1)/R1)=xを求める。次に、ステップS9(欠陥検出手段)では、第2抵抗と第1抵抗との差(R2−R1)=x、または第1抵抗に対する前記第2抵抗と第1抵抗との差の割合((R2−R1)/R1)=xが、所定値αよりも大きいか否かを調べる。ここで、xは、第2抵抗(R2)と第1抵抗(R1)との変化量に対応する。   Next, in step S8, the difference between the second resistance and the first resistance (R2-R1) = x, or the ratio of the difference between the second resistance and the first resistance with respect to the first resistance ((R2-R1) / R1) = x is obtained. Next, in step S9 (defect detection means), the difference between the second resistance and the first resistance (R2-R1) = x, or the ratio of the difference between the second resistance and the first resistance with respect to the first resistance (( It is checked whether R2−R1) / R1) = x is larger than a predetermined value α. Here, x corresponds to the amount of change between the second resistance (R2) and the first resistance (R1).

変化量xが、所定値αよりも大きい場合とは、欠陥箇所20に発熱が生じていると判断され、ステップS10にて、不良品である旨のアラーム表示などがなされる。また逆に、抵抗の変化量x(差または割合)が所定値α以下の場合には、発熱がなく、ステップS11に行き、欠陥箇所20がないと判断できる。   When the change amount x is larger than the predetermined value α, it is determined that heat is generated in the defective portion 20, and an alarm indicating that the product is defective is displayed in step S10. Conversely, if the resistance change amount x (difference or ratio) is less than or equal to the predetermined value α, there is no heat generation, and it can be determined that there is no defective portion 20 at step S11.

なお、変化量xを、抵抗値の差(R2−R1)で表した場合には、所定値αは、たとえば0.3〜0.8mΩの範囲に設定することができる。また、変化量xを、抵抗値の変化の割合((R2−R1)/R1)で表した場合には、所定値αは、たとえば0.055〜0.145の範囲に設定することができる。   When the amount of change x is expressed by a resistance value difference (R2−R1), the predetermined value α can be set, for example, in a range of 0.3 to 0.8 mΩ. Further, when the amount of change x is expressed as a rate of change in resistance value ((R2-R1) / R1), the predetermined value α can be set in a range of 0.055 to 0.145, for example. .

なお、従来の方法では、欠陥箇所20において、抵抗異常個所の抵抗が0.5mΩで、工程内の変動値が同等かそれ以上の場合、この異常個所を検出することは出来ない。   In the conventional method, when the resistance of the abnormal resistance portion is 0.5 mΩ in the defective portion 20 and the variation value in the process is equal to or higher than this, this abnormal portion cannot be detected.

本発明の実施形態の方法では、導体部分の抵抗温度係数を4×10‐3として、大電流の第2電流I2により、欠陥箇所20の異常個所周辺が局所的に400℃程度になるとすると、そのときの第2抵抗R2は、以下の式(1)で表せる。 In the method of the embodiment of the present invention, assuming that the resistance temperature coefficient of the conductor portion is 4 × 10 −3 and the vicinity of the abnormal portion of the defective portion 20 is locally about 400 ° C. due to the large second current I 2, The second resistor R2 at that time can be expressed by the following equation (1).

R2=0.5×10‐3×(1+4×10‐3×(400‐25))=1.25×10‐3Ω … (1)
なお、第1電流I1での抵抗R1は、0.1×10‐3Ωである。すなわち、発熱により、欠陥箇所20の異常個所で、0.5mΩ程度の抵抗変化(抵抗値の差)が発生する。この抵抗変化を検出することで、異常個所の検出が可能となる。
R2 = 0.5 × 10 −3 × (1 + 4 × 10 −3 × (400-25)) = 1.25 × 10 −3 Ω (1)
The resistance R1 at the first current I1 is 0.1 × 10 −3 Ω. That is, due to heat generation, a resistance change (difference in resistance value) of about 0.5 mΩ occurs at an abnormal portion of the defective portion 20. By detecting this change in resistance, it is possible to detect an abnormal part.

なお、本発明は、上述した実施形態に限定されるものではなく、本発明の範囲内で種々に改変することができる。   The present invention is not limited to the above-described embodiment, and can be variously modified within the scope of the present invention.

図1は本発明の一実施形態に係る多層基板の一例を示す要部断面図である。FIG. 1 is a cross-sectional view of an essential part showing an example of a multilayer substrate according to an embodiment of the present invention. 図2は図1に示す多層基板の欠陥を検出するための検査装置の概略構成図である。FIG. 2 is a schematic configuration diagram of an inspection apparatus for detecting defects in the multilayer substrate shown in FIG. 図3は図2に示す検査装置における測定処理・判定部の処理内容を示すフローチャート図である。FIG. 3 is a flowchart showing the processing contents of the measurement processing / determination unit in the inspection apparatus shown in FIG.

符号の説明Explanation of symbols

2… 多層基板
4… 内部導体層
6… 層間絶縁層
8… ビアホール内導体柱
10… パッド部
20… 欠陥箇所
30… 検査装置
32,34… 端子
36… 定電流源
38… 電圧測定部
40… 測定処理・判定部
DESCRIPTION OF SYMBOLS 2 ... Multilayer board | substrate 4 ... Internal conductor layer 6 ... Interlayer insulation layer 8 ... Conductor pillar in via hole 10 ... Pad part 20 ... Defect location 30 ... Inspection apparatus 32, 34 ... Terminal 36 ... Constant current source 38 ... Voltage measurement part 40 ... Measurement Processing / determination unit

Claims (9)

第1パッド部と、前記第1パッド部に対して導通経路を通して接続してある第2パッド部とを少なくとも有する多層基板を検査する方法であって、
前記第1パッド部と第2パッド部との間に、第1電流を流し、これらのパッド部の間に生じる第1電圧を測定し、前記第1電流および第1電圧に基づき、これらのパッド部の間の第1抵抗(R1)を算出する工程と、
前記第1パッド部と第2パッド部との間に、前記第1電流よりも、20倍以上大きな第2電流を流し、これらのパッド部の間に生じる第2電圧を測定し、前記第2電流および第2電圧に基づき、これらのパッド部の間の第2抵抗(R2)を算出する工程と、
前記第2抵抗(R2)と第1抵抗(R1)との関係に基づき、欠陥を検出する工程とを有する多層基板の検査方法。
A method for inspecting a multilayer substrate having at least a first pad portion and a second pad portion connected to the first pad portion through a conduction path,
A first current is passed between the first pad portion and the second pad portion, a first voltage generated between these pad portions is measured, and these pads are based on the first current and the first voltage. Calculating a first resistance (R1) between the sections;
A second current that is 20 times greater than the first current is passed between the first pad portion and the second pad portion, a second voltage generated between these pad portions is measured, and the second current is measured. Calculating a second resistance (R2) between these pad portions based on the current and the second voltage;
A method for inspecting a multilayer substrate, comprising: detecting a defect based on a relationship between the second resistance (R2) and the first resistance (R1).
前記第2抵抗と第1抵抗との差(R2−R1)が所定値以上である場合に、欠陥が存在すると判断する請求項1に記載の多層基板の検査方法。   The method for inspecting a multilayer substrate according to claim 1, wherein a defect is determined to be present when a difference (R2-R1) between the second resistance and the first resistance is equal to or greater than a predetermined value. 前記第1抵抗に対する前記第2抵抗と第1抵抗との差の割合((R2−R1)/R1)が所定値以上である場合に、欠陥が存在すると判断する請求項1に記載の多層基板の検査方法。   2. The multilayer substrate according to claim 1, wherein a defect is determined to be present when a ratio ((R 2 −R 1) / R 1) between the second resistance and the first resistance with respect to the first resistance is equal to or greater than a predetermined value. Inspection method. 前記第1パッド部と第2パッド部との間に、欠陥箇所が存在する場合に、前記第1電流は、前記欠陥箇所が発熱しない程度の電流値であり、前記第2電流は、前記欠陥箇所が発熱する程度の電流値である請求項1〜3のいずれかに記載の多層基板の検査方法。   In the case where a defective portion exists between the first pad portion and the second pad portion, the first current is a current value that does not generate heat in the defective portion, and the second current is the defect The inspection method for a multilayer substrate according to any one of claims 1 to 3, wherein the current value is such that the portion generates heat. 前記第1電流が、1〜10mAの範囲内にある定電流であり、前記第2電流が、500mA以上の定電流である請求項4に記載の多層基板の検査方法。   The multilayer substrate inspection method according to claim 4, wherein the first current is a constant current within a range of 1 to 10 mA, and the second current is a constant current of 500 mA or more. 前記第1電流および第2電流を印加するための端子と、前記第1電圧および第2電圧を測定するための端子とが別であり、合計4つの端子を、測定装置が有する請求項1〜5のいずれかに記載の多層基板の検査方法。   The terminal for applying the first current and the second current is different from the terminal for measuring the first voltage and the second voltage, and the measuring device has a total of four terminals. 6. The inspection method for a multilayer substrate according to any one of 5 above. 前記導通経路が、前記多層基板に形成してあるビアホール内導体柱を含む請求項1〜6のいずれかに記載の多層基板の検査方法。   The inspection method of a multilayer substrate according to claim 1, wherein the conduction path includes via-hole conductor pillars formed in the multilayer substrate. 第1パッド部と、前記第1パッド部に対して導通経路を通して接続してある第2パッド部とを少なくとも有する電子部品を検査する方法であって、
前記第1パッド部と第2パッド部との間に、第1電流を流し、これらのパッド部の間に生じる第1電圧を測定し、前記第1電流および第1電圧に基づき、これらのパッド部の間の第1抵抗(R1)を算出する工程と、
前記第1パッド部と第2パッド部との間に、前記第1電流よりも、20倍以上大きな第2電流を流し、これらのパッド部の間に生じる第2電圧を測定し、前記第2電流および第2電圧に基づき、これらのパッド部の間の第2抵抗(R2)を算出する工程と、
前記第2抵抗(R2)と第1抵抗(R1)との関係に基づき、欠陥を検出する工程とを有する電子部品の検査方法。
A method for inspecting an electronic component having at least a first pad part and a second pad part connected to the first pad part through a conduction path,
A first current is passed between the first pad portion and the second pad portion, a first voltage generated between these pad portions is measured, and these pads are based on the first current and the first voltage. Calculating a first resistance (R1) between the sections;
A second current that is 20 times greater than the first current is passed between the first pad portion and the second pad portion, a second voltage generated between these pad portions is measured, and the second current is measured. Calculating a second resistance (R2) between these pad portions based on the current and the second voltage;
A method for inspecting an electronic component, comprising: detecting a defect based on a relationship between the second resistance (R2) and the first resistance (R1).
第1パッド部と、前記第1パッド部に対して導通経路を通して接続してある第2パッド部とを少なくとも有する電子部品を検査する検査装置であって、
前記第1パッド部と第2パッド部との間に、第1電流を流し、これらのパッド部の間に生じる第1電圧を測定し、前記第1電流および第1電圧に基づき、これらのパッド部の間の第1抵抗(R1)を算出する第1抵抗算出手段と、
前記第1パッド部と第2パッド部との間に、前記第1電流よりも、20倍以上大きな第2電流を流し、これらのパッド部の間に生じる第2電圧を測定し、前記第2電流および第2電圧に基づき、これらのパッド部の間の第2抵抗(R2)を算出する第2抵抗算出手段と、
前記第2抵抗(R2)と第1抵抗(R1)との関係に基づき、欠陥を検出する欠陥検出手段とを有する電子部品の検査装置。
An inspection apparatus for inspecting an electronic component having at least a first pad part and a second pad part connected to the first pad part through a conduction path,
A first current is passed between the first pad portion and the second pad portion, a first voltage generated between these pad portions is measured, and these pads are based on the first current and the first voltage. First resistance calculating means for calculating a first resistance (R1) between the sections;
A second current that is 20 times greater than the first current is passed between the first pad portion and the second pad portion, a second voltage generated between these pad portions is measured, and the second current is measured. Second resistance calculating means for calculating a second resistance (R2) between these pad portions based on the current and the second voltage;
An electronic component inspection apparatus comprising defect detection means for detecting a defect based on a relationship between the second resistance (R2) and the first resistance (R1).
JP2005096136A 2005-03-29 2005-03-29 Inspection method and inspection apparatus for multilayered substrate Pending JP2006278762A (en)

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WO2012133090A1 (en) * 2011-03-28 2012-10-04 住友電気工業 株式会社 Printed wiring board and method for manufacturing printed wiring board
JP2015059885A (en) * 2013-09-20 2015-03-30 日本電産リード株式会社 Board inspection method and device
JP2021032671A (en) * 2019-08-23 2021-03-01 日置電機株式会社 Substrate inspection device and substrate inspection method

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WO2012133090A1 (en) * 2011-03-28 2012-10-04 住友電気工業 株式会社 Printed wiring board and method for manufacturing printed wiring board
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JP2015059885A (en) * 2013-09-20 2015-03-30 日本電産リード株式会社 Board inspection method and device
JP2021032671A (en) * 2019-08-23 2021-03-01 日置電機株式会社 Substrate inspection device and substrate inspection method

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