JP3698081B2 - COMPOUND SEMICONDUCTOR DEVICE, ITS MANUFACTURING METHOD, LIGHT EMITTING DEVICE AND LAMP - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a technique for configuring a compound semiconductor element using a boron-containing III-V compound semiconductor layer having a specific crystal plane.
[0002]
[Prior art]
As one type of III-V compound semiconductor, a boron-containing III-V compound semiconductor containing boron (B) such as boron phosphide (BP) is known (Satoru Teramoto, “Introduction to Semiconductor Devices” (1995). (See pages 30-28, published by Baifukan Co., Ltd. on March 30.) For example, boron phosphide (BP) has a small ionic bond degree of Philips (0.006). (See July 25, 1985, 3rd edition, published by Yoshioka Shoten Co., Ltd., page 51.) Also, since it is a zinc-blend type cubic crystal, it has a degenerate valence band. (Refer to Toshiaki Ikoma and Hideaki Ikoma, “Introduction to Basic Properties of Compound Semiconductors” (September 10, 1991, first published by Bafukan Co., Ltd.), pages 14-17.) Is The p-type conductive layer is provided the advantage of easy acquisition.
[0003]
Conventionally, a boron-containing III-V compound semiconductor layer has been used to construct various compound semiconductor elements having a silicon (Si) single crystal as a substrate. For example, a heterobipolar transistor (HBT) using a boron phosphide layer is known (see J. Electrochem. Soc., 125 (4) (1978), pages 633-637). In addition, there is a solar cell using a boron phosphide layer as a window layer (see J. Electrochem. Soc. Above). Also disclosed is a technology for constructing a blue band or green band light emitting diode (LED) or laser diode (LD) by utilizing boron phosphide and mixed crystals thereof (Japanese Patent No. 1 ▼ 2809690). (2) No. 2,809,691, (3) No. 2,809,692 and (4) US Pat. No. 6,069,021).
[0004]
In a conventional technique, a compound semiconductor element is configured using a boron-containing III-V compound semiconductor layer in which {100} or {111} crystal planes are stacked. For example, it is configured using a boron phosphide layer having a (100) crystal plane formed on a Si single crystal substrate having a (100) crystal plane as a surface (the above-mentioned J. Electrochem. Soc. 125 (1978). )reference). That is, a boron-containing III-V group compound semiconductor layer composed of crystal planes having the same plane index as the crystal plane forming the surface of the substrate (Katsufusa Shono, “Semiconductor Technology (above)” (June 25, 1992, ( For example, a boron phosphide layer made of a {111} crystal plane formed on a silicon single crystal substrate having a {111} crystal plane as a surface (see above, published by the University of Tokyo Press, 9th edition), page 99) “Semiconductor Technology (above)”, see page 77).
[0005]
[Problems to be solved by the invention]
However, a boron-containing III-V group compound semiconductor layer having a crystal plane having the same plane index as the crystal plane of the substrate surface (see Jpn. J. Appl. Phys., 13 (3) (1974), pages 411 to 416). In order to obtain the above, a high temperature exceeding 1000 ° C. is required (see Kei Naganishi, “Applied Physics”, Vol. 45, No. 9 (1976), pages 891 to 897). At such a high temperature, diffusion of impurities doped in the boron-containing group III-V compound semiconductor layer occurs remarkably. Due to the diffusion of the impurities, the concentration of impurities inside the boron-containing III-V compound semiconductor layer changes, and the carrier concentration changes. For this reason, for example, in a light emitting diode (LED), problems in device characteristics such as destabilizing the forward voltage (so-called Vf) are induced.
[0006]
Further, the boron-containing III-V compound semiconductor layer having a crystal plane having the same plane index as the crystal plane of the substrate surface is limited to a very narrow temperature range. For example, the temperature at which a boron phosphide crystal layer having a {100} crystal plane can be formed on a silicon single crystal having a {100} crystal plane as a surface is limited to a range of 1030 ° C. to 1080 ° C., at most 50 ° C. (See “Applied Physics”, Volume 47 above). At higher temperatures, it becomes a polycrystalline layer (see “Applied Physics” above). Therefore, there has been a problem that it is difficult to stably obtain a boron-containing group III-V compound semiconductor layer in the first place.
[0007]
The present invention constitutes a compound semiconductor element using a boron-containing III-V compound semiconductor layer composed of {100} or {111} crystal planes having the same plane index as the surface of a conventional single crystal substrate. In order to overcome the problems of the prior art, a compound semiconductor element is obtained by utilizing a boron-containing III-V compound semiconductor layer having a {110} crystal plane that is stably obtained in a wide temperature range. The technical means to comprise is provided.
[0008]
[Means for Solving the Problems]
That is, the present invention
(1) A boron-containing III-V group compound semiconductor layer having a {110} crystal plane and having boron (B) as a constituent element provided on the surface of a single crystal substrate (in this specification, {110 } -Boron III-V group compound semiconductor layer), and the inclination angle is set to 20 degrees (°) or less with the surface of the single crystal substrate as a horizontal reference { A compound semiconductor device comprising a {110} -boron III-V compound semiconductor layer made of a 110} crystal layer.
It is.
[0009]
The present invention also provides
(2) The {110} -boron-containing III-V compound semiconductor layer is provided via a buffer layer made of a polycrystalline boron-containing III-V compound semiconductor containing amorphous. The compound semiconductor device according to (1) above.
It is.
[0010]
The present invention also provides
(3) The above {110} -boron III-V compound semiconductor layer is provided on a substrate made of conductive silicon (Si) single crystal (silicon). The compound semiconductor device according to 2).
It is.
[0011]
The present invention also provides
(4) The above-mentioned (3), wherein the single crystal substrate for providing the {110} -boron-containing III-V compound semiconductor layer is a silicon single crystal having a {100} crystal plane as a surface. The compound semiconductor device described in 1.).
(5) The above (3) characterized in that the single crystal substrate for providing the {110} -boron-containing III-V compound semiconductor layer is a silicon single crystal having a {111} crystal plane as a surface. The compound semiconductor device described in 1.).
It is.
[0012]
The present invention also provides
(6) A {110} -boron-containing III-V compound semiconductor layer is formed on a single crystal substrate at a temperature of 750 ° C. or more and 1200 ° C. or less, and the supply ratio of the group V element source to the boron source is 20 or more. 60. The method for producing a compound semiconductor element according to any one of (1) to (5), wherein the compound semiconductor element is formed as 60 or less.
(7) A {110} -boron-containing III-V compound semiconductor layer is formed on a single crystal substrate at a temperature of 800 ° C. or higher and 950 ° C. or lower by a metal organic thermal decomposition vapor deposition (MOCVD) method. ((C₂H_Five)_ThreeB) is a raw material of boron, and phosphine (PH_Three) Is a raw material of phosphorus, and the supply ratio of the raw material of the group V element to the raw material of boron is 20 or more and 60 or less. The method for producing a compound semiconductor device according to the above (6),
It is.
[0013]
The present invention also provides
(8) A light emitting device comprising the compound semiconductor device according to the above (1) to (5).
(9) A lamp comprising the light emitting device according to (8).
It is.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
In the first embodiment of the present invention, the boron-containing group III-V compound semiconductor layer composed of {100} or {111} crystal planes having the same plane index as the crystal plane forming the surface of the conventional single crystal substrate is used. A compound semiconductor element is formed using a boron-containing III-V compound semiconductor layer ({110} -boron III-V compound semiconductor layer) having a {110} crystal plane different from the crystal plane forming the substrate surface. To do. The symbol {110} is, for example, a general term for crystal planes in which the type, number, and position of atoms constituting the crystal plane are the same as (1.1.0.) Crystal planes (by CW BUNN, “Chemical crystallography” (June 15, 1970, published by Baifukan Co., Ltd., first edition, pages 23-24) Specifically, (1.1.0.), (−1.1.0. ), (−1.-1.0.), (1.-1.0.), (1.0.1.), (−1.0.1.), (0.1.1.1.) Crystal face and the like.
[0015]
The {110} -boron-containing III-V compound semiconductor layer according to the present invention is composed of silicon, gallium phosphide (GaP), gallium arsenide (GaAs), silicon carbide (SiC) (J. Appl. Phys., 42 (1)). (1971), pages 420-424), boron phosphide (BP) (1) Japanese Patent Publication No. 55-3834, and (2) Z. Anorg. Allg. Chem., 349 (1967), 151-157. A semiconductor single crystal such as (see page) can be formed as a substrate. Sapphire (α-Al₂O_ThreeAn oxide single crystal such as) can also be used as a substrate. For example, when a light-emitting element is formed, since an electrode can be easily formed, a conductive material such as silicon single crystal or silicon carbide single crystal can be recommended as a substrate material. On the other hand, in order to construct a field effect transistor (FET) with little drain current leakage, it is advantageous to use a high-resistance or insulating sapphire or another oxide crystal as a substrate.
[0016]
On the above substrate material, a metal organic chemical vapor deposition (MOCVD) method (Inst. Phys. Conf. Ser., No. 129 (1993 IOP Publishing Ltd., pp. 157 to 162)), halogen ( halogen) method (Materials SSD74-85-90 (1975-03) (March 25, 1975)), hydride method (the above Jpn) , J. Appl. Phys., 13 (1974)), molecular beam epitaxy (MBE) method (see J. Solid State Chem., 133 (1997), pp. 269-272), etc. A {110} -boron III-V compound semiconductor layer can be formed.
[0017]
In particular, the MOCVD vapor phase growth means has the following characteristics (a) to (c) as compared with other vapor phase growth means, and is advantageous for the growth of a boron-containing group III-V compound semiconductor layer.
(A) Compared with the MBE method, the partial pressure of phosphorus (P) or the like in the growth environment can be easily controlled, and therefore a boron-containing group III-V compound semiconductor layer that is stoichiometrically balanced can be obtained. Can bring.
(B) Boron tribromide (BBr) used as a raw material for boron (B) in the halogen method_Three) (See "Semiconductor / Transistor Study Group" above) or boron trichloride (BCl_Three) (See Journal of Japanese Society for Crystal Growth, 24 (2) (1997), p. 150) Since an organic boron compound that is more easily decomposable than boron can be used as a boron source, boron-containing III-V group compound semiconductors can be used at a lower temperature. Layers can be formed.
(C) Trimethylboron ((CH_Three)_ThreeOrganic boron compounds such as B)) are diborane (B) used as a boron source in the hydride method.₂H₆), The film can be formed at a low temperature, and there is an advantage that peeling of the boron-containing III-V group compound semiconductor layer from the substrate surface due to the difference in thermal expansion coefficient can be avoided.
[0018]
According to the atmospheric pressure (substantially atmospheric pressure) or the reduced pressure MOCVD method, the {110} -boron-containing III-V compound semiconductor layer can be formed at a substrate temperature of 750 ° C. or higher and 1200 ° C. or lower. At high temperatures exceeding 1200 ° C, for example, B₁₃P₂The formation of a homogeneous crystal layer is hindered (see J. Am. Ceram. Soc., 47 (1) (1964), pages 44 to 46). For example, triethyl boron ((C₂H_Five)_ThreeB) / phosphine (PH_Three) / Hydrogen (H₂) With the MOCVD means utilizing a reaction system, a {110} -boron-containing III-V group compound semiconductor layer can be obtained in a wide substrate temperature range of about 200 ° C., preferably about 800 ° C. to about 1000 ° C. PH_ThreeIs a phosphorus (P) source, phosphorus trichloride (PCl) which is a phosphorus (P) source in the halogen method_ThreeEtching of the boron-containing group III-V compound semiconductor layer or the substrate due to the above) can be avoided, and therefore, a boron-containing group III-V compound semiconductor layer having a flat surface can be provided.
[0019]
Only by setting the substrate temperature within the above-mentioned preferable range, a {110} -boron-containing III-V compound semiconductor layer having a uniform orientation cannot be obtained sufficiently stably. As an example, the cross-sectional schematic diagram of FIG. 1 shows the crystal structure of a boron phosphide (BP) layer formed on a {100} -silicon single crystal substrate at a temperature of 850 ° C. by MOCVD. The {110} -crystal plane constituting the boron phosphide layer 2 does not necessarily develop at a uniform angle with respect to the surface of the {100} -substrate 1. For example, in the region 2 a inside the boron phosphide layer 2, the {110} crystal plane forms an angle of about 30 degrees (°) with the surface of the substrate 1 as the horizontal reference 3. In another region 2b, there exists a {110} -crystal plane having an angle of about 35 degrees (°) with respect to the horizontal reference. Generally speaking, the orientation in which the {110} crystal plane of the boron phosphide crystal develops is an angular range within about 35 ° with respect to the horizontal reference 3 simply by setting the substrate temperature within the above range. The angle of orientation of the {110} crystal plane constituting the {110} -boron-containing III-V compound semiconductor layer with respect to the substrate surface (horizontal reference plane 3) depends on, for example, a general four-crystal X-ray diffraction method Can be analyzed. In analysis using the four-crystal X-ray diffraction method, the degree of crystal plane orientation (tilt angle with respect to the horizontal reference plane) is generally measured as an omega (ω) value that represents the tilt angle of the substrate surface with respect to incident X-rays. The
[0020]
A boron phosphide layer when the growth temperature is set to 850 ° C. and the ratio of the supply amount of boron source (boron source) and phosphorus source to the MOCVD reaction system, the so-called V / III ratio, is set to 40 FIG. 2 illustrates the distribution of X-ray diffraction intensity from the {110} crystal plane constituting the structure. The incident X-ray wavelength is 1.54 mm (copper (Cu) Kα₁The Bragg diffraction angle from the {110} crystal plane in 4 crystal X-ray diffraction is 28.8 °, and the range of the angle is within ± 0.01 °. (See vertical axis value in FIG. 2). That is, the interval between {110} crystal faces constituting the {110} -boron phosphide layer is uniform at about 3.20 mm. Further, the angle (see FIG. 1) with respect to the horizontal surface of the substrate can be reduced within 20 ° (see the horizontal axis value in FIG. 2). The boron-containing group III-V compound semiconductor layer having an inclination angle within 20 ° with respect to the substrate surface having such a horizontal plane has a substrate temperature in the range of 750 ° C. to 1200 ° C., more preferably, the substrate temperature is about 800 ° C. to about 800 ° C. It is obtained by setting the V / III ratio in the range of 5 or more and 60 or less after the temperature is set to 1000 ° C. When the V / III ratio is less than 5, volatilization of, for example, phosphorus (P), arsenic (As), or nitrogen (N) constituting the boron-containing group III-V compound semiconductor layer becomes remarkable and the surface morphology is deteriorated. Cause inconvenience. On the contrary, when the V / III ratio is set to a high ratio exceeding 60, the vacancy density of the group III constituent element increases, and the crystallinity of the boron-containing group III-V compound semiconductor layer is increased due to the point defects generated in association therewith. It causes inconvenience to make it worse.
[0021]
The {110} -boron III-V compound semiconductor layer grown ideally horizontally on the horizontal plane has a uniform orientation as an upper layer with respect to the horizontal plane of the substrate surface. Has the effect of producing a crystalline layer. For example, gallium nitride indium (Ga) that exhibits high electron mobility due to uniform orientation._XIn_1-XAn active layer such as an electron transit layer made of a group III nitride semiconductor such as N: 0 ≦ X ≦ 1) can be provided. Also, for example, Ga with uniform orientation_XIn_1-XN (0 ≦ X ≦ 1) or gallium nitride phosphide (GaN_1-YP_YGroup III nitride semiconductors such as: 0 ≦ Y ≦ 1) can provide a light emitting layer that emits light with uniform intensity in the plane. In particular, when the active layer is formed of a material lattice-matched to the {110} -boron-containing III-V compound semiconductor layer, the activity is excellent in crystallinity with few crystal defects such as misfit dislocations caused by lattice misfit. Can bring a layer. For example, on a {110} -boron phosphide (BP: lattice constant = 4.538Å) layer, cubic Ga_0.94In_0.06An active layer having good crystallinity made of N (lattice constant = 4.538Å) can be provided.
[0022]
If the boron-containing group III-V compound semiconductor layer is formed through a polycrystalline buffer layer containing amorphous, the {110} -boron-containing group III-V compound semiconductor layer with uniform orientation is stabilized. This is particularly effective. Further, when the buffer layer is made of a boron-containing III-V group compound semiconductor that also contains boron as a constituent element, it is smooth due to the action of boron atoms constituting the buffer layer as “growth nuclei” and “adsorption sites”. Thus, there is an effect that a continuous {110} -boron-containing III-V compound semiconductor layer can be obtained. The buffer layer is, for example, B_αAl_βGa_γIn_{1- ( α + β + γ )}Boron phosphide (BP) based mixed crystals such as P (0 <α ≦ 1, 0 ≦ β <1, 0 ≦ γ <1, 0 <α + β + γ ≦ 1) can be used. For example, B_αAl_βGa_γIn_{1- ( α + β + γ )}It can be composed of a boron arsenide (BAs) based mixed crystal such as As (0 <α ≦ 1, 0 ≦ β <1, 0 ≦ γ <1, 0 <α + β + γ ≦ 1). Or, for example, B_αAl_βGa_γIn_{1- ( α + β + γ )}It is composed of a boron nitride (BN) based mixed crystal such as N (0 <α ≦ 1, 0 ≦ β <1, 0 ≦ γ <1, 0 <α + β + γ ≦ 1). Since it becomes more difficult to obtain a mixed crystal having a stable composition as the number of constituent elements increases (see “Introduction to Semiconductor Devices” on page 24), the buffer layer is binary (two element crystal) or ternary. Desirably, it is composed of mixed crystals. For example, boron phosphide (BP) or boron phosphide / gallium (B_αGa_γP: 0 <α ≦ 1, 0 ≦ γ <1, α + γ = 1) or boron phosphide / indium (B_αIn_{1- α}It is preferably composed of a ternary mixed crystal such as P: 0 <α ≦ 1).
[0023]
A buffer layer made of a polycrystalline boron-containing group III-V compound semiconductor, for example, boron phosphide (BP), including amorphous, is, for example, triethyl boron ((C₂H_Five)_ThreeB) / phosphine (PH_Three) / Hydrogen (H₂) Depending on the MOCVD growth means using a reaction system, the substrate temperature is set to about 250 ° C. to about 750 ° C. (C₂H_Five)_ThreeB is (CH_Three)_ThreeSince it is more easily decomposed than B, it can be used as a boron source suitable for film formation at a low temperature. However, at a low temperature of less than 250 ° C., the phosphorus (P) source PH_ThreeThe film cannot be formed because the thermal decomposition of the film does not proceed sufficiently. At a relatively low temperature in the above temperature range, a polycrystalline BP layer mainly composed of amorphous is easily obtained. At high temperatures exceeding about 500 ° C., there is a tendency to become a polycrystalline layer composed of amorphous and single crystal grains. At a high temperature exceeding 750 ° C., a single crystal BP layer is easily obtained. In the single crystal BP layer, the effect of relaxing the lattice mismatch between the substrate and the boron-containing III-V compound semiconductor layer is not sufficiently exhibited, and the {110} -boron-containing III-V is inferior in crystallinity. This is not preferable because a group III compound semiconductor layer results. As an example of the second embodiment of the present invention, <1.0.0. > On a silicon single crystal substrate having a (1.1.1.) Crystal plane inclined at an angle of 12 degrees (°) with respect to the crystal direction, using the above MOCVD growth means, at 350 ° C., amorphous An example of depositing a buffer layer of polycrystalline boron phosphide containing quality. The crystalline element constituting the buffer layer can be investigated using, for example, an X-ray diffraction method. The X-ray diffraction pattern of an amorphous polycrystalline layer containing single crystal grains is a mixture of halo-shaped diffraction rings and spot diffraction spots.
[0024]
In the third embodiment of the present invention, in particular, a {110} -boron-containing III-V group compound semiconductor layer is provided using a silicon single crystal as a substrate. Silicon single crystal (silicon; melting point = 1420 ° C.) is compared to GaP (melting point = 1467 ° C., dissociation pressure at melting point = 35 atm) or GaAs (melting point = 1238 ° C., dissociation pressure at melting point = 1 atm). The dissociation pressure at the melting point (= 1420 ° C.) is 1.33 × 10^-3hPa (“III-V group compound semiconductor” (May 20, 1994, published by Baifukan Co., Ltd., first edition), see page 148). Therefore, even when a {110} -boron-containing III-V compound semiconductor layer is formed at a high temperature, it can be used as a substrate that does not cause surface alteration. Also, compared with silicon carbide or sapphire which is also excellent in heat resistance, a large-diameter silicon single crystal excellent in conductivity can be easily obtained, and thus is a substrate material suitable for industrial production of compound semiconductor elements. .
[0025]
The silicon single crystal is a cubic zinc-blend type crystal that exhibits cleavage in the [110] crystal direction (see “Introduction to Semiconductor Devices” above, page 28). In the fourth embodiment of the present invention, a compound semiconductor element is configured using a silicon single crystal having a {100} crystal plane as a surface as a substrate. In the silicon single crystal having the {100} crystal plane as the surface, the four side surfaces orthogonal to the {100} crystal surface are all {110} crystal planes. Therefore, if a silicon single crystal having a {100} crystal plane as a surface is used as a substrate, there is an advantage that it can be easily divided into rectangular parallelepiped compound semiconductor elements using the cleavage property in the {110} direction. Since the {110} crystal plane exposed by cleavage is a smooth surface, for example, it can advantageously contribute to the construction of an optical resonant surface of a laser diode (LD). In addition, it has a kink or terrace that promotes the growth of the {110} -boron-containing III-V compound semiconductor layer (Denjiro Watanabe et al., “Material Science Course 6, Thin Film / Surface Phenomenon” ) (Published by Asakura Shoten), see pages 231 to 232), for example, a silicon single crystal having a {100} crystal plane inclined by several degrees at an angle to the [110] crystal direction can also be used effectively as a substrate.
[0026]
In the fifth embodiment of the present invention, a compound semiconductor element is configured using a silicon single crystal having a {111} crystal plane as a surface as a substrate. In the {111} crystal plane, the density of silicon (Si) atoms is about twice that of the {100} crystal plane and there are few voids. Therefore, for example, an effect of suppressing the penetration and diffusion of boron (B) atoms into the silicon single crystal constituting the boron-containing III-V compound semiconductor layer is exerted, and the silicon single crystal substrate and the boron-containing III-V This is effective in avoiding non-planarization and randomization of the bonding interface with the group compound semiconductor layer. FIG. 3 shows the X-ray diffraction results of the {110} -boron phosphide crystal layer grown on the {111} -silicon single crystal substrate having the {111} crystal plane as the surface. The Bragg diffraction angle is as uniform as 28.8 ° ± 0.01 ° as in the case where the {100} -silicon single crystal is used as the substrate. That is, the {110} -boron phosphide crystal plane spacing is about 3.20 mm, as in the {100} -silicon single crystal substrate. On the other hand, the angle between the {111} crystal plane and the {110} -boron phosphide crystal plane with respect to the horizontal reference plane is within 15 °, which is a more uniform orientation than in the case of a {100} -silicon single crystal substrate. It has become. In this way, the {111} crystal plane can maintain the surface flatness better than the {100} crystal plane, so that a {110} -boron phosphide crystal layer with more uniform orientation can be obtained. It is a feature.
[0027]
In particular, a silicon single crystal having a {111} crystal plane inclined in the [110] crystal orientation as a surface can be used as a substrate suitable for forming a {110} -boron III-V compound semiconductor layer. For example, a silicon single crystal whose surface is a {111} crystal plane inclined 7.3 ° to the [110] crystal orientation provides a boron-containing III-V compound semiconductor layer made of a boron phosphide (BP) monomer. It becomes a suitable substrate. [110] The {111} crystal plane inclined 7.3 ° to the crystal orientation intersects with the {111} crystal plane of silicon at the same interval as the {110} crystal plane (= 3.209２０) of BP. It is because it will do. The distance between the {111} crystal planes intersecting the {111} silicon crystal plane (= d) is defined as [110] tilt angle in the crystal direction as θ degrees (°).
d (unit: Å) = 3.136 / sin (θ ° + 70.5 °)
Given in. Therefore, d can be matched with the interplanar spacing of the {110} crystal planes forming the desired boron-containing III-V compound semiconductor layer by appropriately selecting the inclination angle θ °. For example, if θ is 5.0 °, d = 3.239Å (∵sin (5.0 ° + 70.5 °) = 0.9681), for example, boron phosphide / gallium mixed crystal (B_0.95Ga_0.05P) is matched with the crystal plane spacing of {110} crystal planes.
[0028]
On the {111} -silicon single crystal substrate with the {111} crystal plane intersecting the surface at an interval matching the {110} crystal plane interval of the {110} -boron-containing III-V compound semiconductor layer A boron-containing group III-V compound semiconductor layer with uniform properties can be formed. In particular, a boron-containing group III-V compound semiconductor composed of {110} crystal planes that are stacked substantially in parallel to a {111} silicon single crystal plane (horizontal reference plane), that is, almost not inclined with respect to the horizontal reference plane. A layer is obtained. In other words, a {110} -boron-containing III-V compound semiconductor layer formed on a silicon single crystal substrate having no lattice mismatch has a high quality with few crystal defects such as misfit dislocations, and a compound semiconductor device having excellent characteristics. It is advantageous to configure.
[0029]
For example, on the antimony (Sb) doped n-type {111} -silicon single crystal substrate whose surface is a {111} crystal plane inclined by 7.3 ° in the [110] crystal direction, the following (a) to ( If the functional layer described in the item d) is laminated, a laminated structure for use in a pn junction double hetero (DH) structure type light emitting diode (LED) can be configured.
(A) Non-doped with zinc (Zn; atomic radius = 1.38Å) having an atomic radius larger than any of the constituent elements of boron (atomic radius = 0.98Å) and phosphorus (atomic radius = 1.28Å) Low temperature buffer layer mainly composed of crystalline boron phosphide (BP) and having a layer thickness of about 10 nm
(B) A beryllium (Be) -doped p-type BP layer having a {110} crystal plane with an inclination angle within 5 ° with respect to the {111} substrate surface. Lower barrier layer made of {110} -boron phosphide layer with 0 ± 0.2 eV
(C) Cubic Ga that lattice matches with BP (lattice constant = 4.538４．５)_0.94In_0.06N-type light emitting layer made of N (lattice constant = 4.538Å)
(D) An upper barrier layer made of an amorphous p-type BP layer doped with magnesium (Mg).
A {110} -boron phosphide layer having {110} crystal planes arranged horizontally and substantially parallel to the {111} substrate surface and having excellent crystallinity, and the {110} -boron phosphide layer as the underlayer are used as crystals. A high-luminance LED can be provided by using the above laminated structure including an active layer (light-emitting layer) that is excellent in performance.
[0030]
In addition to the light emitting element, if a {110} -boron-containing III-V group compound semiconductor layer having a {110} crystal plane with a tilt angle with respect to the substrate surface is used, for example, a light receiving element, a pn junction diode (rectifier) ), A compound semiconductor device such as a hetero bipolar transistor (HBT). For example, on the antimony (Sb) doped n-type {111} -silicon single crystal substrate whose surface is a {111} crystal plane inclined by 7.0 ° in the [110] crystal direction, the following (a) to ( An npn junction type HBT can be formed by laminating the functional layers described in the section d).
(A) Low-temperature buffer layer made of polycrystal including an amorphous material made of zinc (Zn) -doped p-type boron phosphide (BP)
(B) A base layer composed of a Be-doped p-type boron phosphide layer mainly composed of {110} -crystal planes arranged in parallel to the {111} surface of the substrate.
(D) An emitter layer from silicon (Si) doped n-type boron phosphide (BP).
An HBT having a high current amplification factor (generally referred to as β) can be obtained by forming a base layer made of a {110} -boron phosphide layer excellent in crystallinity arranged in parallel to the {111} surface of the substrate. it can.
[0031]
[Action]
A {110} -boron-containing III-V compound semiconductor layer composed of {110} crystal planes with an inclination angle within 20 ° with respect to the surface of the single crystal substrate has a uniform growth direction of the crystal layer provided on the layer. The crystal layer is provided as an active layer having excellent crystallinity.
[0032]
【Example】
(First embodiment)
<1. -1.0> a case where an LED is configured using a boron-doped p-type silicon (Si) single crystal whose surface is a (1.0.0) crystal plane inclined at an angle of 2.0 ° with respect to the crystal direction. The present invention will be described specifically by way of examples. FIG. 4 schematically shows a cross-sectional structure of the LED 1A according to the first embodiment.
[0033]
A laminated structure 1B for constituting the LED 1A was constructed by sequentially depositing functional layers described in (1) to (4) of the next section on the silicon single crystal substrate 101 described above.
(1) Triethyl boron ((C₂H_Five)_ThreeB) / phosphine (PH_Three) / Hydrogen (H₂) Low-temperature buffer layer 102 made of polycrystalline boron phosphide (BP) mainly composed of amorphous material to which zinc (Zn) is added, grown at 350 ° C. by a normal atmospheric pressure MOCVD method.
(2) (C₂H_Five)_ThreeB / trimethylindium ((CH_Three)_ThreeIn) / PH_Three/ H₂P-type boron phosphide / indium mixed crystal (B) doped with beryllium (Be) grown at 850 ° C. using a normal atmospheric pressure MOCVD method_0.99In_0.01Lower barrier layer 103 made of P: lattice constant = 4.557Å) layer. The beryllium doping source is diethyl beryllium ((C₂H_Five)₂Be) was used.
(3) Trimethylgallium ((CH_Three)_ThreeGa) / Ammonia (NH_Three) / H₂Cubic silicon (Si) -doped n-type Ga at 850 ° C. using system atmospheric pressure MOCVD means_0.90In_0.10The light-emitting layer 104 (carrier concentration≈2 × 10) mainly composed of the N layer (lattice constant = 4.557Å)¹⁷cm^-3, Layer thickness ≈ 120 nm).
(4) (C₂H_Five)_ThreeB / PH_Three/ H₂An upper barrier mainly composed of amorphous silicon-doped n-type boron phosphide (BP) grown at 400 ° C. by a system atmospheric pressure MOCVD method and having a forbidden band width of about 3.1 eV at room temperature Layer 105.
[0034]
Boron phosphide / indium mixed crystal (B_0.99In_0.01P) layer has a V / III ratio (= PH_Three/ ((C₂H_Five)_ThreeB + (CH_Three)_ThreeIn)) was formed as 35, so that B on the (1.0.0.) Surface of the substrate 101 was_0.99In_0.01The inclination angle of the {110} crystal plane of the P layer was within 17 °. Therefore, the upper light emitting layer (active layer) 104 is composed of a crystal layer having excellent crystallinity. The light-emitting layer 104 is formed of {110} -boron phosphide / indium mixed crystal (B_0.99In_0.01P) Ga lattice matched with the layer_0.90In_0.10Since it is composed of the N layer, the occurrence of misfit dislocations at the junction interface between the {110} -boron phosphide layer 103 and the light-emitting layer 104 is observed even in the observation of the crystal structure by the cross-sectional TEM technique. There wasn't. In addition, the inclination angle of the {110} crystal plane mainly constituting the light-emitting layer 104 was within about 17 °, and the crystal layer was aligned.
[0035]
At the center of the n-type upper barrier layer 105, an ohmic surface electrode 106 made of a gold / tin (Au / Sn) circular electrode (diameter = 120 μm) was provided. Further, an ohmic back electrode 107 made of aluminum (Al) was provided on substantially the entire back surface of the p-type Si substrate 101 to configure the LED 1A.
[0036]
The configured blue LED 1A exhibited the characteristics described in the following items (a) to (d).
(A) Emission center wavelength (= λ): 430 nm
(B) Luminance: 6 millicandela (mcd)
(C) Forward voltage: 3.0 volts (V) (forward current = 20 mA)
(D) Reverse voltage: 6 V (reverse current = 10 μA)
In particular, a boron phosphide / indium mixed crystal (B) composed of a {110} crystal plane having a small inclination angle with respect to the {100} surface of the substrate 101 via a low temperature buffer layer 102 with a {100} -silicon single crystal as the substrate 101._0.99In_0.01P) Since the lower barrier layer 103 is formed, the LED 1A is provided in which local breakdown of local breakdown voltage is hardly recognized when a reverse voltage is applied.
[0037]
The LED 1A can be assembled into the lamp 10 by the following procedure, for example. As illustrated in FIG. 5, for example, the LED 1 </ b> A is fixed to the central portion of a metal casing 16 plated with a metal such as silver (Ag) or aluminum (Al) on the pedestal 15 with a conductive bonding material. Thus, the back electrode 14 provided on the back surface of the conductive substrate 11 used for configuring the LED 1 </ b> A is electrically connected to one terminal 17 attached to the base 15. Further, for example, the surface electrode 13 installed on the upper barrier layer 12 of the LED 1 </ b> A is connected to the other terminal 18 attached to the base 15. Next, if the LED 1A is surrounded by a sealing material 19 such as an epoxy resin, the lamp 10 can be provided. The LED 1A including the light-emitting layer 104 having good crystallinity because of lattice matching with the lower barrier layer 103 provides light emission excellent in monochromaticity with a half-value width (so-called FWHM) of an emission spectrum of 18 nm (λ≈430 nm). It is. Therefore, if the LED 1A provided with the light emitting layer 104 having a uniform orientation in addition to excellent crystallinity according to the present invention, the lamp 10 having excellent monochromaticity can be provided.
[0038]
Further, if the lamps 10 according to the present invention are assembled, a light source can be configured. For example, a constant voltage drive type light source can be configured by electrically connecting a plurality of lamps 10 in parallel. Further, a constant current drive type light source can be configured by electrically connecting lamps in series. Since the lamp 10 comprising the LED 1A according to the present invention can generate blue light (λ≈430 nm) having excellent monochromaticity, it is advantageous for obtaining, for example, a multicolor light source that emits light whose color tone is controlled. Since these light sources do not require power for lighting as compared with conventional incandescent fluorescent lamps, they can be used particularly effectively as low-power consumption and long-life light sources. For example, a light source for room illumination can be provided. In addition, for example, a light source for outdoor display or indirect illumination can be provided.
[0039]
(Second embodiment)
<1.1.0> Antimony (Sb) -doped n-type silicon (Si) single crystal whose surface is a crystal plane (1.1.1.) Tilted by 7.3 ° to the crystal direction as a substrate The present invention will be described in detail by taking the case of constituting an LED as an example.
[0040]
FIG. 6 shows a silicon (1.1.1.) Crystal plane 20 and a (1.1.0.) Crystal plane 21 and <1.1.0. The positional relationship with the (1.1.1.) Crystal plane 22 inclined 7.3 ° in the> direction is illustrated. Further, the crystal layer constituting the LED according to the second embodiment is made of a semiconductor material different from the LED 1A described in the first embodiment. However, since the stacking order of these semiconductor layers on the substrate is the same as in the first embodiment, refer to the cross-sectional schematic diagram of FIG. 4 for the cross-sectional structure of the LED of the second embodiment.
[0041]
The laminated structure for constituting the LED was constructed by sequentially depositing the functional layers described in the following items (1) to (4) on the silicon single crystal substrate.
(1) Triethyl boron ((C₂H_Five)_ThreeB) / phosphine (PH_Three) / Hydrogen (H₂) Low-temperature buffer layer made of polycrystalline boron phosphide (BP) mainly composed of amorphous silicon (Si) added and grown at 350 ° C. by a normal atmospheric pressure MOCVD method
(2) (C₂H_Five)_ThreeB / PH_Three/ H₂A lower barrier layer comprising a {110} -n-type boron phosphide (BP: lattice constant = 4.538Å) layer doped with silicon (Si) grown at 850 ° C. using a system atmospheric pressure MOCVD means.
(3) Trimethylgallium ((CH_Three)_ThreeGa) / trimethylindium ((CH_Three)_ThreeIn) / Ammonia (NH_Three) / H₂Cubic silicon (Si) doped n-type Ga at 850 ° C. using system atmospheric pressure MOCVD means_0.94In_0.06N layer (lattice constant = 4.538Å) to main light emitting layer (carrier concentration≈3 × 10¹⁷cm^-3, Layer thickness ≈ 100 nm).
(4) (C₂H_Five)_ThreeB / PH_Three/ H₂It is mainly composed of an amorphous material composed of beryllium (Be) -doped p-type boron phosphide (BP) grown at 400 ° C. and having a forbidden band width of about 3.1 eV by a system atmospheric pressure MOCVD means. Upper barrier layer.
[0042]
The {110} -boron phosphide (BP) layer constituting the lower barrier layer has a V / III ratio (= PH_Three/ ((C₂H_Five)_ThreeSince the film was formed with B) being 40, the inclination angle of the {110} crystal plane constituting the BP layer with respect to the (1.1.1.) Surface of the substrate was within 5 °. For this reason, the upper light-emitting layer (active layer) is also composed of a cubic crystal layer having excellent crystallinity and uniform alignment. In addition, the light emitting layer is Ga matched with the {110} -boron phosphide semiconductor layer by lattice matching._0.94In_0.06Since it was composed of the N layer, no remarkable occurrence of misfit dislocation or the like at the bonding interface between the {110} -boron phosphide layer and the light emitting layer was observed even in the observation of the crystal structure by the cross-sectional TEM technique. .
[0043]
In the center of the p-type upper barrier layer, an ohmic surface electrode made of a gold / zinc (Au / Zn) circular electrode (diameter = 110 μm) was provided. Further, an ohmic back electrode made of aluminum (Al) was provided on substantially the entire back surface of the n-type Si substrate to constitute an LED. The constructed blue LED exhibited the characteristics described in the following items (a) to (d).
(A) Emission center wavelength: 410 nm
(B) Luminance: 7 millicandela (mcd)
(C) Forward voltage: 3.0 volts (V) (forward current = 20 mA)
(D) Reverse voltage: 6 V (reverse current = 10 μA)
In particular, {111} -silicon single crystal is used as a substrate, and a lower barrier is formed from boron phosphide (BP) having a {110} crystal plane having a small inclination angle with respect to the {111} substrate surface within 5 ° through a low-temperature buffer layer. The layer and the light emitting layer were composed of a semiconductor material that lattice matched with the lower barrier layer, thus providing a bright blue-violet LED.
[0044]
【The invention's effect】
According to the present invention, the boron-containing III-V group compound semiconductor layer is grown on the single crystal substrate at a specified temperature and a raw material supply ratio (= V / III ratio). A {110} -boron-containing III-V compound semiconductor layer composed of {110} crystal planes oriented at a uniform angle with respect to the surface is obtained. In addition, since the compound semiconductor element is configured by using the active layer having excellent crystallinity brought about by the action of the {110} -boron-containing III-V compound semiconductor layer having the same orientation, for example, light emission An effect is brought about in bringing about LED which makes a characteristic favorable.
[0045]
In particular, in the present invention, for example, when a boron-containing III-V compound semiconductor layer is formed via a low-temperature buffer layer made of a boron-containing III-V compound semiconductor, {110} arranged in substantially parallel to the substrate surface A {110} -boron-containing III-V compound semiconductor layer having a crystal plane can be formed sufficiently stably. For this reason, it can contribute to providing a compound semiconductor element stably.
[0046]
According to the method for manufacturing a compound semiconductor device of the present invention, the {110} -boron-containing III-V compound semiconductor layer is formed using MOCVD vapor phase growth means containing triethylboron and phosphine as raw materials. Therefore, it is effective in stably forming a {110} -boron-containing III-V compound semiconductor layer having a small inclination angle with respect to the surface of the single crystal substrate and a flat surface over a wide temperature range. It is done.
[0047]
In particular, in the present invention, the {110} -boron-containing III-V compound semiconductor layer is provided on a substrate made of a silicon single crystal that has heat resistance at a temperature preferable for growing the layer and is difficult to dissociate. A {110} -boron-containing III-V compound semiconductor layer having excellent surface smoothness can be formed. In particular, when a conductive silicon single crystal is used as a substrate, it is easy to form an electrode. For example, an LED having excellent light emission characteristics can be provided simply and easily.
[Brief description of the drawings]
FIG. 1 is a schematic cross-sectional view showing a crystal structure of a boron phosphide layer grown on a {100} -silicon single crystal substrate.
FIG. 2 is a graph showing an X-ray diffraction intensity distribution of a {110} -boron phosphide layer crystal layer grown at a suitable temperature and V / III ratio.
FIG. 3 is a diagram showing an X-ray diffraction intensity distribution of a {110} -boron phosphide crystal layer grown on a {111} -silicon single crystal substrate.
FIG. 4 is a schematic cross-sectional view of an LED described in the first embodiment.
FIG. 5 is a schematic sectional view of a lamp described in the first embodiment.
FIG. 6 is a schematic diagram showing the positional relationship of crystal planes of a silicon single crystal according to a second example.
[Explanation of symbols]
1A LED
1B Laminated structure
1 {100} -silicon single crystal substrate
2 {110} -Boron Phosphide Crystal Layer
2a, 2b Internal region of boron phosphide crystal layer
3 Horizontal reference plane (substrate surface)
10 lamps
11 Substrate
12 Upper barrier layer
13 Surface electrode
14 Back electrode
15 pedestal
16 body
17, 18 terminals
19 Sealing resin
20 (1.1.1.)-Crystal plane
21 (1.1.0.)-Crystal plane
22 <1.1.0. > (1.1.1.) Crystal plane inclined 7.3 ° in direction
101 Single crystal substrate
102 Low temperature buffer layer
103 Lower barrier layer
104 Light emitting layer
105 Upper barrier layer
106 Surface electrode
107 Back electrode

Claims (9)

A boron-containing III-V compound semiconductor layer (hereinafter referred to as {110} -boron-containing III-V) having a {110} crystal plane and having boron (B) as a constituent element, provided on the surface of a single crystal substrate. A compound semiconductor device comprising a {110} crystal layer having an inclination angle of 20 degrees (°) or less with the surface of the single crystal substrate as a horizontal reference. } -A compound semiconductor device comprising a boron-containing III-V compound semiconductor layer. 2. The {110} -boron-containing III-V compound semiconductor layer is provided via a buffer layer made of a polycrystalline boron-containing III-V compound semiconductor containing amorphous. The compound semiconductor device described in 1. 3. The compound according to claim 1, wherein the {110} -boron-containing III-V compound semiconductor layer is provided on a substrate made of conductive silicon (Si) single crystal (silicon). Semiconductor element. The single crystal substrate for providing the {110} -boron-containing III-V compound semiconductor layer is a silicon single crystal having a {100} crystal plane as a surface. Compound semiconductor device. The single crystal substrate for providing the {110} -boron-containing III-V compound semiconductor layer is a silicon single crystal having a {111} crystal plane as a surface. Compound semiconductor device. The {110} -boron-containing III-V compound semiconductor layer is formed on a single crystal substrate at a temperature of 750 ° C. or more and 1200 ° C. or less, and the supply ratio of the group V element source to the boron source is 20 or more and 60 or less. The method for producing a compound semiconductor device according to claim 1, wherein the compound semiconductor device is formed. A {110} -boron-containing group III-V compound semiconductor layer is formed on a single crystal substrate at a temperature of 800 ° C. or higher and 950 ° C. or lower by triethyl boron ((C ₂ H ₅ ) ₃ B) is a raw material of boron, phosphine (PH ₃ ) is a raw material of phosphorus, and the supply ratio of the raw material of group V element to the raw material of boron is 20 to 60. The manufacturing method of the compound semiconductor element of Claim 6. A light emitting device comprising the compound semiconductor device according to claim 1. A lamp comprising the light emitting device according to claim 8.

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