JP3736401B2 - COMPOUND SEMICONDUCTOR DEVICE, ITS MANUFACTURING METHOD, LIGHT EMITTING DEVICE, LAMP, AND LIGHT SOURCE - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a technique for constructing a compound semiconductor device using a p-type boron phosphide-based semiconductor layer having an excellent surface state.
[0002]
[Prior art]
As one type of III-V compound semiconductor, a boron phosphide (BP) III-V compound semiconductor (boron phosphide-based semiconductor) containing boron (B) and phosphorus (P) as constituent elements is known. (Satoru Teramoto, “Introduction to Semiconductor Devices” (March 30, 1995, published by Baifukan Co., Ltd., first edition, pages 26-28). Conventionally, blue or green using boron phosphide or mixed crystals thereof. Techniques for constructing a laser diode (LD) in the band are disclosed (Japanese Patents (1) 2809690, (2) 2809699, (3) 2809996, and (4) US Patent 6 , 069,021).
[0003]
Boron phosphide (BP) has a small ionic bond degree of Philips (0.006) (Philips, “Semiconductor Bonding Theory” (July 25, 1985, 3rd edition, published by Yoshioka Shoten Co., Ltd.), 51 (See page), and is a substance consisting mostly of covalent bonds, and since it is a zinc-blend type cubic crystal, it has a band structure of a degenerate valence band (co-authored by Toshiaki Ikoma and Hideaki Ikoma, "Introduction to basic physical properties of compound semiconductors" (September 10, 1991, first edition issued by Baifukan Co., Ltd.), pages 14 to 17. For boron phosphide, a p-type conductive layer is easily obtained. There are advantages that can be made.
[0004]
For example, boron phosphide (BP) selectively doped with p-type impurities and aluminum nitride / gallium mixed crystal (Al_XGa_1-XA technique for forming a light emitting layer that emits green band light from a superlattice structure of N: 0 ≦ X ≦ 1) is known (see the above-mentioned Japanese Patent No. 28099691). Further, the p-type conductive boron phosphide (BP) layer is used as a buffer layer in a laminated structure for forming a light emitting element (see US Pat. No. 5,042,043). Further, it is used to construct a p-type current confinement layer for forming a current confinement type laser diode (LD) (see Japanese Patent No. 3152900).
[0005]
In providing p-type boron phosphide on a substrate made of a single crystal material such as silicon (Si), gallium phosphide (GaP), or silicon carbide (SiC), conventionally, zinc (Zn) or magnesium (Mg) has been used. It is used as a p-type impurity (refer to the above-mentioned patents (1) 2809690, (2) 2809969, and (3) 2809969).
[0006]
[Problems to be solved by the invention]
The covalent bond radius of boron (B), which is an element (constituent element) constituting boron phosphide, which is a typical boron phosphide-based semiconductor, is 0.82０．８. The covalent bond radius of phosphorus (P), which is one constituent element, is 1.06 mm. Magnesium (Mg) has a larger covalent bond radius of 1.36 to these constituent elements. Therefore, the difference in the common radius between magnesium and boron reaches 0.54 mm. Also, the difference from phosphorus atoms is as large as 0.30Å. For this reason, when magnesium having a large difference between the constituent elements and the covalent bond radius is added to boron phosphide, the lattice of the boron phosphide crystal is expanded. There arises a problem that it occurs and peels off from the substrate surface.
[0007]
On the other hand, the covalent bond radius of zinc (Zn) is 1.25 Å, which is smaller than that of magnesium. Thus, the difference in the covalent bond radius between boron (B) and phosphorus (P) is 0.43 and 0.19, respectively, and the difference in the shared atomic radius for both constituent elements is small compared to magnesium. . However, when zinc (Zn) is used as a p-type impurity, the crystal lattice of boron phosphide is expanded, although it is slight compared with the case of magnesium. For this reason, when zinc (Zn) is added excessively, peeling from the substrate surface due to “dripping” of the boron phosphide layer occurs.
[0008]
Due to the peeling, for example, if the adhesion between the p-type boron phosphide layer and the substrate surface is lost, the resistance component against the flow of current increases and the normal between the boron phosphide layer and the substrate material, for example. It cannot perform electrical conduction. Therefore, it hinders the production of a compound semiconductor device exhibiting normal device operation.
[0009]
The present invention presents technical means for avoiding, for example, peeling from the substrate surface in the prior art for obtaining a p-type conductive boron phosphide-based semiconductor layer by adding a p-type impurity. In particular, in view of the difference in shared atomic radius with constituent elements, a technical means for providing a p-type boron phosphide-based semiconductor layer having a specific p-type impurity and excellent adhesion to a substrate such as a substrate material is presented. Is. It is another object of the present invention to provide a compound semiconductor element including a p-type boron phosphide-based semiconductor layer configured by using these technical means.
[0010]
[Means for Solving the Problems]
That is, the present invention
(1) A p-type boron phosphide provided on the surface of a substrate made of a single crystal and containing boron (B) and phosphorus (P) as constituent elements to which beryllium (Be) is added as a p-type impurity. A compound semiconductor device comprising a BP) -based semiconductor layer.
(2) A p-type boron phosphide system in which beryllium (Be) is added to the surface of a single crystal substrate through a low-temperature buffer layer made of a polycrystalline boron phosphide semiconductor containing an amorphous material. The compound semiconductor device according to (1), wherein a semiconductor layer is provided.
(3) The above (1) or (2) characterized by having a pn junction structure comprising a p-type boron phosphide-based semiconductor layer to which beryllium (Be) is added and an n-type III-V compound semiconductor layer. The compound semiconductor device described in 1.).
It is.
[0011]
The present invention also provides
(4) A p-type boron phosphide-based semiconductor layer to which beryllium (Be) is added is provided on the surface of a substrate made of a single crystal according to a metal organic chemical vapor deposition (MOCVD) means. The manufacturing method of the compound semiconductor element as described in said (1) thru | or (3).
(5) The p-type boron phosphide-based semiconductor layer to which beryllium (Be) is added is provided on the surface of a substrate made of a single crystal depending on the ion implantation means, (1) to (3) The manufacturing method of the compound semiconductor element of description.
It is.
[0012]
The present invention also provides
(6) A light emitting device comprising the compound semiconductor device according to any one of (1) to (3).
(7) A light emitting device comprising a compound semiconductor device manufactured by the method for manufacturing a compound semiconductor device according to (4) or (5).
(8) A lamp using the light emitting device according to (6) or (7).
(9) A light source using the lamp according to (8).
It is.
[0013]
DETAILED DESCRIPTION OF THE INVENTION
The first embodiment of the present invention will be described with reference to a case where a light emitting diode (LED) is configured as a compound semiconductor element.
[0014]
FIG. 1 schematically illustrates a cross-sectional structure of a laminated structure 1A for constituting an LED 1B according to the first embodiment of the present invention. The laminated structure 1A for double hetero (DH) structure LED use can be basically composed of the elements described in the following items (A) to (E), for example.
(A) Substrate 101 made of n-type or p-type conductive silicon (Si), BP (see Japanese Patent Publication No. 55-3834), GaP, GaAs, SiC, or the like.
(B) Low-temperature buffer layer 102 made of a polycrystalline boron phosphide-based semiconductor containing an amorphous material
(C) Lower barrier layer 103 made of a p-type boron phosphide-based semiconductor layer doped with beryllium (Be)
(D) n-type gallium nitride indium (Ga) preferably lattice matched to the lower barrier layer 103_XIn_1-XN: 0 ≦ X ≦ 1) (see the above Japanese Patent Publication No. 55-3834) or n-type gallium nitride phosphide (GaN)_1-YP_Y: Light emitting layer 104 made of a group III nitride semiconductor such as 0 ≦ Y ≦ 1)
(E) n-type upper barrier layer 105 made of boron phosphide-based semiconductor
[0015]
The low-temperature buffer layer 102 is, for example, a general formula B_αAl_βGa_γIn_{1- α - β - γ}P_{1- δ}As_δA boron phosphide-based semiconductor represented by (0 <α ≦ 1, 0 ≦ β <1, 0 ≦ γ <1, 0 <α + β + γ ≦ 1, 0 ≦ δ <1) can be suitably configured. For example, the general formula B_αAl_βGa_γIn_{1- α - β - γ}P_{1- δ}N_δ(0 <α ≦ 1, 0 ≦ β <1, 0 ≦ γ <1, 0 <α + β + γ ≦ 1, 0 <δ <1), and a boron phosphide-based semiconductor containing nitrogen (N). Preferably, it is composed of a binary crystal or a ternary mixed crystal that has a small number of constituent elements and can be easily constructed. For example, monomer boron phosphide (BP), aluminum phosphide / boron mixed crystal (B_αAl_βP: 0 <α ≦ 1, β = 1−α), boron phosphide / gallium mixed crystal (B_αGa_δP: 0 <α ≦ 1, δ = 1−α), or boron phosphide / indium mixed crystal (B_αIn_{1- α}P: 0 <α ≦ 1).
[0016]
A polycrystalline boron phosphide-based semiconductor containing an amorphous material can be formed at about 250 ° C. to 750 ° C. by, for example, metal organic chemical vapor deposition (MOCVD) (US Pat. No. 6,194,744B1). Issue). In particular, the polycrystalline low-temperature buffer layer 102 containing an amorphous material relaxes the lattice mismatch between the substrate 101 and the lower barrier layer 103, and lower barriers with low crystal defect density such as misfit dislocations. The effect of providing the layer 103 is exhibited (see US Pat. No. 6,069,021 above). Whether or not the low-temperature buffer layer 102 is a polycrystalline layer containing an amorphous state can be known from, for example, analysis of a diffraction image by a general X-ray diffraction method or electron beam diffraction method.
[0017]
Further, when the low-temperature buffer layer 102 is composed of a boron phosphide semiconductor containing an element (constituent element) constituting the p-type boron phosphide-based semiconductor forming the lower barrier layer 103, the function of the constituent element as “growth nucleus” Thus, for example, there is an advantage that the formation of the continuous lower barrier layer 103 is promoted. Further, according to the means formed through the low-temperature buffer layer 102, a boron phosphide system mainly composed of uniform crystal planes, for example, {110} crystal planes arranged parallel to the surface of the substrate 101. A semiconductor layer is obtained. Therefore, in the second embodiment of the present invention, the p-type boron phosphide-based semiconductor layer (the lower barrier layer 103 in FIG. 1) is formed with the low-temperature buffer layer 102 interposed. The layer thickness of the low temperature buffer layer 102 is desirably 1 nm to 500 nm, and more desirably 2 nm to 100 nm. Impurities added to obtain the conductive low-temperature buffer layer 102 include zinc (Zn; atomic radius (r) = 1.38Å), silicon (Si; r = 1.32Å), tin (element symbol Sn; r = 1.62 mm) is suitable. Impurities having an atomic radius larger than that of boron (r = 0.98Å) and phosphorus (r = 1.28Å) are restricted from moving in the boron phosphide-based layer constituting the low-temperature buffer layer 102. This is effective for maintaining the crystallinity of the substrate 101 satisfactorily.
[0018]
The feature of the technical means according to the present invention is that the p-type impurity added to obtain a p-type boron phosphide-based semiconductor layer (for example, the lower barrier layer 103 in FIG. 1) is limited to beryllium (Be). is there. The shared atomic radius of beryllium is 0.90Å, and the difference from the covalent bond radius (= 0.82Å) of boron is 0.08Å which is an order of magnitude less than that of conventional p-type impurities Mg and Zn. is there. Therefore, beryllium has an advantage that it can act as an acceptor without significantly deforming the lattice even if the lattice position of boron (B), which is a group III constituent element of a boron phosphide-based semiconductor, is occupied. . The difference in atomic radius between boron (atomic radius (r) = 0.98Å) and p-type impurity occupying the lattice position is 0.62Å for magnesium (r = 1.60Å) and zinc (r = 1.38Å). ) Is 0.40Å, and cadmium (element symbol Cd; r = 1.54Å) is 0.56Å. On the other hand, the atomic radius of beryllium is 1.12 あ り, which is as small as 0.14 れ ば compared with the difference from other Group II elements, and does not change the interatomic distance between the atoms constituting the crystal. Therefore, there is an advantage that deformation of the crystal lattice can be suppressed. For this reason, in the p-type boron phosphide-based semiconductor layer to which beryllium is added, expansion of the crystal lattice is avoided, and peeling from the deposited layer due to rolling up is prevented.
[0019]
The p-type boron phosphide-based semiconductor layer to which beryllium is added is, for example, dimethyl beryllium ((CH_Three)₂Be) or diethyl beryllium ((C₂H_Five)₂Be) or the like can be formed by MOCVD means using an addition source of beryllium (see J. Electrochem. Soc., 130 (1983), page 1782). From the viewpoint of high vapor pressure, diethylberyllium is more preferable (1) J. Crystal Growth, 77 (1986), pages 32 to 36, and (2) ibid, 115 (1991), 460. See page 463). For example, triethyl boron ((C₂H_Five)_ThreeB)) / phosphine (PH_Three) / Hydrogen (H₂) It can be formed by atmospheric pressure (substantially atmospheric pressure) in which diethyl beryllium is added as an addition source to the reaction system or by reduced pressure MOCVD means. The formation temperature of the boron phosphide-based semiconductor layer to which beryllium is added is preferably over 750 ° C. and 1200 ° C. or less. At high temperatures exceeding 1200 ° C, for example, B₁₃P₂Formation of boron phosphide multimers such as J. Am. Ceramic Soc., 47 (1) (1964), pages 44 to 46, which hinders obtaining a homogeneous boron phosphide-based semiconductor layer. .
[0020]
Further, a p-type boron phosphide-based semiconductor layer to which beryllium is added can also be obtained by means of implanting beryllium ions into the boron phosphide-based semiconductor layer (ion implantation means). The atomic radius of beryllium (r = 1.12Å) is small compared to the conventional p-type impurities zinc (Zn; r = 1.38Å) and magnesium (Mg; r = 1.60Å). The degree of crystal damage caused by ion implantation is small. Further, the boron phosphide-based semiconductor layer to which beryllium is added has an advantage that peeling does not occur even when annealing is performed to electrically activate beryllium at a high temperature of about 700 ° C. to about 1000 ° C. is there. That is, when obtaining a p-type boron phosphide semiconductor layer by ion implantation of p-type impurities, beryllium is superior in obtaining a p-type conductive layer having excellent crystallinity. Also, beryllium has a projection range at the same acceleration voltage as Mg or Zn because of its small mass number ("Electronics and Information Engineering Course 12 Device Process" (January 15, 1993, (See page 90-96, published by Baifukan Co., Ltd.) The advantage is that it can be implanted deeper into the boron phosphide-based semiconductor layer.
[0021]
The lower barrier layer 103 is, for example, a general formula B_αAl_βGa_γIn_{1- α - β - γ}P_{1- δ}As_δA boron phosphide-based semiconductor represented by (0 <α ≦ 1, 0 ≦ β <1, 0 ≦ γ <1, 0 <α + β + γ ≦ 1, 0 ≦ δ <1) can be suitably configured. For example, the general formula B_αAl_βGa_γIn_{1- α - β - γ}P_{1- δ}N_δ(0 <α ≦ 1, 0 ≦ β <1, 0 ≦ γ <1, 0 <α + β + γ ≦ 1, 0 <δ <1), and a boron phosphide-based semiconductor containing nitrogen (N). Preferably, it is composed of a binary crystal or a ternary mixed crystal that has a small number of constituent elements and can be easily constructed. For example, monomer boron phosphide (BP), aluminum phosphide / boron mixed crystal (B_αAl_βP: 0 <α ≦ 1, β = 1−α), boron phosphide / gallium mixed crystal (B_αGa_δP: 0 <α ≦ 1, δ = 1−α), or boron phosphide / indium mixed crystal (B_αIn_{1- α}P: 0 <α ≦ 1). The hole concentration of the p-type boron phosphide-based semiconductor layer doped with beryllium suitable for forming the barrier layer is generally 1 × 10 6.¹⁷cm^-3~ 5x10¹⁹cm^-3It is. The hole concentration can be measured by a general Hall effect method. The layer thickness is generally 0.05 μm to 5 μm.
[0022]
In particular, depending on the MOCVD method, (1) in the range of 750 ° C. to 1200 ° C., more preferably at a temperature of 800 ° C. to 950 ° C., (2) the growth rate is 2 nm / min to 30 nm or less, The boron phosphide monomer formed by adding beryllium while the feed ratio of the Group III material to the Group III material (so-called V / III ratio) is preferably 15 or more and 60 or less is 3.0 ± It exhibits a high band gap of 0.2 eV. A p-type boron phosphide-based semiconductor layer having a high forbidden band formed under such conditions can be suitably used as the lower barrier layer 103. The lower barrier layer 103 can also be formed from a p-type boron phosphide-based semiconductor mixed crystal based on this high forbidden band width p-type boron phosphide. For example, a forbidden band at room temperature, which is a mixed crystal of monomeric boron phosphide (BP) having a forbidden band width of 3.1 eV and gallium phosphide (GaP: forbidden band width at room temperature≈2.3 eV). Gallium phosphide mixed crystal having a width of about 2.7 eV (B_0.50Ga_0.50The lower barrier layer 103 can be preferably formed from P). The forbidden band width is, for example, an imaginary part (ε) of a complex dielectric constant obtained from a refractive index (= n) and an extinction coefficient (= k).₂= 2 · n · k). These boron phosphide-based semiconductor layers having a high band gap can be effectively used not only as the barrier layers 103 and 105 but also as a light-emitting transmission layer (window layer) for transmitting light emitted from the light-emitting layer 104. .
[0023]
The pn junction structure according to the third embodiment of the present invention includes a p-type boron phosphide-based semiconductor layer to which beryllium is added and, for example, an n-type III-V group compound semiconductor layer. For example, the general formula B_αAl_βGa_γIn_{1- α - β - γ}P_{1- δ}As_δIt can be composed of a boron phosphide-based semiconductor represented by (0 <α ≦ 1, 0 ≦ β <1, 0 ≦ γ <1, 0 <α + β + γ ≦ 1, 0 ≦ δ <1). For example, the general formula B_αAl_βGa_γIn_{1- α - β - γ}P_{1- δ}N_δConsists of an n-type group III nitride semiconductor containing nitrogen (N) represented by (0 ≦ α ≦ 1, 0 ≦ β ≦ 1, 0 ≦ γ ≦ 1, 0 ≦ α + β + γ ≦ 1, 0 <δ ≦ 1) it can. N-type impurities for III-V compound semiconductors include Group IV elements such as silicon (Si) and tin (Sn), and Group VI such as selenium (Se), sulfur (S) and tellurium (Te). Elements can be exemplified. Among these n-type impurities, silicon (Si) is preferable because it has a small diffusion constant in the group III-V compound semiconductor crystal. The degree of diffusion of impurities into the other layer can be analyzed by analysis means such as secondary ion mass spectrometry (SIMS). When the p-type boron phosphide-based semiconductor layer added with beryllium according to the present invention is joined to the n-type III-V compound semiconductor layer added with Si, the p-type boron phosphide caused by the diffusion of n-type impurities is used. This is effective in suppressing a decrease in the hole concentration of the semiconductor layer.
[0024]
If the laminated structure 1A having a pn junction structure of a beryllium-added p-type boron phosphide-based semiconductor layer and an n-type III-V group compound semiconductor layer according to the present invention is used, for example, a pn junction type heterostructure LED 1B Can provide. In the LED 1B illustrated in FIG. 1, the pn junction structure includes a lower barrier layer 103 made of a p-type boron phosphide-based semiconductor layer to which beryllium is added, and a light emitting layer 104 made of an n-type III-V compound semiconductor layer. It consists of. The light emitting layer 104 is formed of, for example, gallium nitride / indium (Ga) that can emit blue-band short-wavelength visible light._XIn_1-XN: 0 ≦ X ≦ 1) (see the above Japanese Patent Publication No. 55-3834), gallium nitride phosphide (GaN)_1-XP_X: 0 ≦ X ≦ 1) (see Appl. Phys. Lett., 60 (20) (1992), pages 2540-2542). Also, gallium arsenide nitride (GaN_1-XAs_X: 0 ≦ X ≦ 1). The light emitting layer 104 may be formed of a single or multi quantum well structure in which these III-V compound semiconductor layers are well layers. The light emitting layer 104 formed of a quantum well structure has an advantage that light emission with good monochromaticity is brought about.
[0025]
When the upper barrier layer 105 is provided on the light emitting layer 104, a double hetero (DH) structure type light emitting portion can be configured. The upper barrier layer 105 can be composed of monomeric boron phosphide having a forbidden band width of 3.0 ± 0.2 eV at room temperature and a boron phosphide-based mixed crystal based thereon. Also, gallium nitride (GaN) or aluminum nitride / gallium mixed crystal (Al_XGa_1-XA group III nitride semiconductor such as N: 0 <X <1) can be used.
[0026]
The double heterojunction structure type LED 1B according to the present invention is configured, for example, by providing an ohmic surface electrode 106 on the upper barrier layer 105 and disposing an ohmic back electrode 107 on the back surface of the substrate 101. When the upper barrier layer 105 is made of a boron phosphide-based semiconductor, a gold alloy such as a gold / germanium (Au / Ge) alloy, a gold / indium (Au / In) alloy, or a gold / tin (Au / Sn) alloy, etc. N-type ohmic electrodes can be formed. The p-type ohmic electrode can be made of, for example, a gold / zinc (Au / Zn) alloy, a gold / beryllium (Au / Be) alloy, or the like. In order to form an electrode that exhibits good ohmic contact, the surface electrode 106 may be provided on a highly conductive contact layer. From the boron phosphide-based semiconductor layer having a high forbidden band according to the present invention, a contact layer for the surface ohmic electrode 106 that also serves as a window layer that transmits light emitted in the extraction direction can be suitably configured.
[0027]
Further, using the LED 1B, for example, the lamp 10 can be assembled by the following procedure. As illustrated in FIG. 2, for example, the LED 1 </ b> B is fixed to a central portion of a metal casing 16 plated with a metal such as silver (Ag) or aluminum (Al) on the pedestal 15 with a conductive bonding material. Thus, the back electrode 14 provided on the back surface of the conductive substrate 11 used for configuring the LED 1B is electrically connected to one terminal 17 attached to the base 15. In addition, for example, the surface electrode 13 installed on the upper barrier layer 12 of the LED 1B is connected to the other terminal 18 attached to the base 15. Next, the LED 1B is surrounded by a sealing material such as an epoxy resin to form a lamp.
[0028]
Further, if the lamps 10 according to the present invention are assembled, a light source can be configured. For example, a constant voltage drive type white light source can be configured by electrically connecting a plurality of lamps 10 in parallel. Further, a constant current drive type light source can be configured by electrically connecting lamps in series. Since these light sources do not require power for lighting as compared with conventional incandescent fluorescent lamps, they can be used particularly effectively as low-power consumption and long-life light sources. For example, it can be used as a light source for room illumination. For example, it can be used as a light source for outdoor display or indirect illumination.
[0029]
If the pn junction structure according to the third embodiment of the present invention is used in addition to the light emitting element, a compound semiconductor element such as a light receiving element, a pn junction type diode (rectifier), a hetero bipolar transistor (HBT), or the like is configured. it can. For example, the surface light-receiving type light receiving element is formed by sequentially laminating a stacked structure including the functional layers described in the items (B) to (E), which are sequentially deposited on the conductive substrate described in the item (A). Can be configured as
(A) Si single crystal substrate having n-type (100) plane doped with antimony (Sb)
(B) A low-temperature buffer layer made of a polycrystal including an amorphous material made of Si-doped n-type boron phosphide (BP)
(C) Si-doped n-type boron phosphide layer mainly composed of {110} -crystal planes arranged parallel to the surface of the substrate described in (A)
(D) n mainly composed of monomeric boron phosphide (BP: lattice constant ≈ 4.538 Å) and cubic gallium nitride (GaN: lattice constant ≈ 4.510 Å) with little lattice mismatch. GaN layer
(E) A beryllium-doped p-type boron phosphide layer that forms a pn junction with the n-type GaN layer.
The p-type boron phosphide layer can be composed of a p-type conductive layer having a low resistance, in particular, because beryllium that imparts a high hole concentration is added to boron phosphide having a high covalent bond as a p-type impurity. Therefore, the p-type ohmic electrode with low contact resistance can be easily formed.
[0030]
In addition, for example, an npn junction type HBT having a basic configuration can be configured using a laminated structure including the functional layers described in the following items (a) to (d) as a base material.
(A) Si single crystal substrate having a p-type (100) surface doped with boron (B), which also serves as a collector layer
(B) A low-temperature buffer layer made of polycrystal including an amorphous material made of beryllium (Be) -doped p-type boron phosphide (BP)
(C) A base layer composed of a Be-doped p-type boron phosphide layer mainly composed of {110} -crystal planes arranged parallel to the surface of the substrate described in (A).
(D) An emitter layer made of silicon (Si) -doped n-type boron phosphide (BP).
According to the present invention, the low-resistance p-type conductive layer to the base layer are formed by using boron phosphide having a low ion-binding property to which beryllium giving a high hole concentration is added as a p-type impurity. It is advantageous to be able to configure.
[0031]
【Example】
(First embodiment)
This is an example in which a blue LED is formed from a laminated structure including a boron phosphide-based semiconductor layer added with beryllium (Be) provided on a boron phosphide-based low-temperature buffer layer added with a p-type impurity. The invention will be specifically described. FIG. 3 shows a schematic sectional view of the LED 2B according to the first embodiment.
[0032]
The LED 2B is composed of a laminated structure 2A in which a silicon (Si) single crystal having p-type (100) plane doped with boron (B) is used as a substrate 101. On the substrate 101, triethylboron ((C₂H_Five)_ThreeB) / phosphine (PH_Three) / Hydrogen (H₂) A low temperature buffer layer 102 was laminated at 350 ° C. by a normal atmospheric pressure MOCVD method. The low-temperature buffer layer 102 was composed of polycrystalline boron phosphide (BP) mainly composed of amorphous material to which zinc (Zn; atomic radius (r) ≈1.38 cm) was added. The atomic concentration of zinc in the low temperature buffer layer 102 is 4 × 10¹⁸cm^-3The layer thickness was 25 nm.
[0033]
On the low temperature buffer layer 102, (C₂H_Five)_ThreeB / trimethylindium ((CH_Three)_ThreeIn / PH_Three/ H₂P-type boron phosphide / indium mixed crystal (B) doped with beryllium (Be) at 850 ° C. using a system atmospheric pressure MOCVD method_0.99In_0.01P) layers were laminated. The beryllium doping source is diethyl beryllium ((C₂H_Five)₂Be) was used. Boron phosphide / indium mixed crystal (B_0.99In_0.01P) was deposited with beryllium (Be) as a p-type dopant through the low-temperature buffer layer 102, and therefore, it was not twisted and had excellent adhesion to the substrate 101. B_0.99In_0.01Since the P (lattice constant≈4.557Å) layer was laminated via the low-temperature buffer layer 102, it became a main crystal layer from {110} crystal planes arranged substantially parallel to the surface of the substrate 101. P-type B_0.99In_0.01The P layer has a growth rate of 30 nm / min and a V / III ratio (= PH_Three/ ((C₂H_Five)_ThreeB + (CH_Three)_ThreeSince the In) supply amount ratio) was 40, the forbidden band width at room temperature was about 3.0 eV. For this reason, p-type B_0.99In_0.01The P layer was used as the lower barrier layer 103. The carrier concentration of the lower barrier layer 103 is 2 × 10¹⁸cm^-3The layer thickness was 520 nm.
[0034]
On the lower barrier layer 103, trimethylgallium ((CH_Three)_ThreeGa) / Ammonia (NH_Three) / H₂Cubic silicon (Si) -doped n-type Ga at 850 ° C. using system atmospheric pressure MOCVD means_0.90In_0.10The light-emitting layer 104 (carrier concentration≈4 × 10) mainly composed of the N layer (lattice constant = 4.557４．５)¹⁷cm^-3, Layer thickness ≈ 180 nm).
[0035]
On the light emitting layer 104, (C₂H_Five)_ThreeB / PH_Three/ H₂An upper barrier layer 105 made of silicon-doped n-type boron phosphide (BP) having a forbidden band width of about 3.1 eV at room temperature was laminated by a system atmospheric pressure MOCVD means. Since the upper barrier layer 105 was grown at 400 ° C., it became a layer mainly composed of amorphous material. The carrier concentration of the upper barrier layer 105 is 5 × 10¹⁸cm^-3The layer thickness was 420 nm. Beryllium (Be) doped p-type B_0.99In_0.01P lower barrier layer 103 and silicon (Si) doped n-type Ga_0.90In_0.10The N-layer light emitting layer 104 and the silicon (Si) -doped n-type BP upper barrier layer 105 constitute a light-emitting portion having a pn junction type double heterostructure.
[0036]
At the center of the upper barrier layer 105, a circular (diameter = 120 μm) ohmic surface electrode 106 made of gold / germanium (Au · Ge) was provided. Further, an ohmic back electrode 107 made of aluminum (Al) was provided on substantially the entire back surface of the p-type Si substrate 101 to configure the LED 2B.
[0037]
When the degree of diffusion of beryllium (Be) and silicon (Si) in the light emitting part was investigated by secondary ion mass spectrometry, no silicon diffusion from the light emitting layer 104 to the lower barrier layer 103 was observed. It was. Further, almost no permeation of beryllium (Be) from the lower barrier layer 103 into the light emitting layer 104 was observed.
[0038]
The configured blue LED 2B exhibited the characteristics described in the following items (a) to (d).
(A) Emission center wavelength: 430 nm
(B) Luminance: 6 millicandela (mcd)
(C) Forward voltage: 3.0 volts (V) (forward current = 20 mA)
(D) Reverse voltage: 6 V (reverse current = 10 μA)
In particular, since the p-type impurity added to the low-temperature buffer layer 102 is zinc (Zn), the crystallinity of the Si single crystal due to the diffusion of the p-type impurity into the substrate 101 can be suppressed. In LED 2B, local breakdown of local breakdown voltage when a reverse voltage was applied was hardly recognized. In addition, since a p-type boron phosphide-based semiconductor layer (lower barrier layer 103) doped with beryllium is used, poor conduction due to peeling from the deposited layer (the low-temperature buffer layer 102 in the case of the first embodiment). Occurrence of was avoided.
[0039]
(Second embodiment)
The present invention will be specifically described by taking as an example a case where a blue LED is formed from a laminated structure including a p-type boron phosphide (BP) layer into which beryllium (Be) is ion-implanted. FIG. 4 shows a schematic cross-sectional view of the LED 3B according to the second embodiment. In FIG. 4, the same components as those in the laminated structure 2A shown in FIG.
[0040]
On the same light emitting layer 104 as described in the first embodiment, (C₂H_Five)_ThreeB / PH_Three/ H₂N-type boron phosphide / indium mixed crystal (B_0.67In_0.33An upper barrier layer 105 made of P) was laminated. Disilane (Si₂H₆) As a doping source of silicon (Si), and the carrier concentration of the upper barrier layer 105 is 6 × 10 6.¹⁷cm^-3Adjusted. The layer thickness of the upper barrier layer 105 was 750 nm.
[0041]
After the growth of the upper barrier layer 105 was completed and cooled in a nitrogen stream to a temperature near room temperature, the laminated structure 2A was taken out from the MOCVD growth apparatus. Thereafter, selective patterning was performed by using a known photolithography (photoetching) technique, limited to a region where the surface electrode 106 at the center of the upper barrier layer 105 was to be disposed. Next, the photoresist material was removed only in a circular region having a diameter of about 130 μm to form the surface electrode 106 to expose the surface of the upper barrier layer 105. Next, beryllium ion (Be_Five ⁺) At an acceleration voltage of 180 KV and a dose amount of 1.5 × 10¹³cm^-2As a result, it was injected into a region where the surface electrode 106 was to be formed.
[0042]
After removing the photoresist material left in the region other than the surface electrode 106, the phosphine (PH_Three) In a nitrogen stream containing about 6 volume percent (vol.%) At 850 ° C., annealing (heat treatment) was performed to electrically activate beryllium ions. Thus, a peak carrier concentration (= n) at a depth of about 500 nm from the surface of the upper barrier layer 105._p) About 9 × 10¹⁷cm^-3Beryllium (Be) doped p-type B_0.67In_0.33An ion implantation region 108 made of a P layer was formed in the upper barrier layer 105. According to secondary ion mass spectrometry (SIMS), the atomic concentration of implanted beryllium is n_pAbout 1 × 10 maximum at a depth (˜500 nm) giving¹⁸cm^-3Met. Further, in the annealing at 850 ° C., the distribution of beryllium atoms was almost in the shape of an LSS theoretical curve, and thermal diffusion of Be atoms was hardly recognized. For this reason, p-type conversion of the surface portion of the upper barrier layer 105 due to electrical compensation of beryllium atoms diffused into the surface portion of the upper barrier layer 105 is avoided, and n-type conductivity is maintained in the surface layer portion. It was to be done.
[0043]
A region (diameter≈130 μm) made of a gold / germanium (Au 97 wt% / Ge 3 wt%) alloy in a region where the surface electrode 106 is to be formed on the region 108 into which the beryllium (Be) is ion-implanted formed in the upper barrier layer 105. ) N-type ohmic surface electrode 106 was provided. Further, a p-type ohmic back electrode 107 made of aluminum (Al) was provided on substantially the entire back surface of the p-type Si substrate 101 to constitute the LED 3B.
[0044]
According to the above means, a high-intensity blue LED 3B having the characteristics described in the following items (a) to (d) is provided.
(A) Emission center wavelength: 430 nm
(B) Luminance: 9 millicandela (mcd)
(C) Forward voltage: 3.2 volts (V) (forward current = 20 mA)
(D) Reverse voltage: 8 V (reverse current = 10 μA)
Particularly in the second embodiment, high-luminance light emission results, and from the observation of the near-field light emission image, the surface region of the upper barrier layer 105 opened to the outside (the upper barrier layer 105 other than the surface electrode 106). The emission intensity in the surface area of the film was substantially uniform. This originates in the structure which provided the pn-junction area | region 109 which implants beryllium (Be) ion and performs a current blocking function inside the upper barrier layer 105. That is, since the distribution of the LED driving current to the light emitting layer 104 immediately below the surface electrode 106 is avoided, the configuration is such that the driving current can be distributed substantially evenly to the area other than the projected area of the surface electrode 106. Is.
[0045]
【The invention's effect】
According to the present invention, the p-type impurity suitable for obtaining the p-type boron phosphide (BP) based semiconductor layer is beryllium (Be) having a small difference between the covalent bond radius of the boron atom and the phosphorus atom. This contributes to obtaining a p-type boron phosphide-based semiconductor layer having excellent adhesion to the deposited layer. In addition, for example, a light emitting element is formed from a laminated structure including a beryllium-doped p-type boron phosphide-based semiconductor layer that provides excellent adhesion to an underlayer, and thus high-luminance light emission excellent in breakdown voltage characteristics and the like. There is an effect that an element can be obtained.
[0046]
In addition, according to the present invention, the beryllium-doped p-type boron phosphide-based semiconductor layer is provided via the low-temperature buffer layer made of a boron-containing III-V group compound semiconductor. This contributes to providing a p-type boron phosphide-based semiconductor layer that is excellent in resistance. For example, it is effective in constructing a light-emitting element having excellent breakdown voltage.
[0047]
In the present invention, when the p-type boron phosphide-based semiconductor layer is obtained by means of ion implantation, the implanted species is made of non-diffusible beryllium (Be) ions. A p-type conduction region can be formed in a limited region inside the system semiconductor layer. Further, if the current conduction blocking function of the pn junction structure formed by the p-type conduction region limited to a specific region of the n-type semiconductor layer is used, for example, the LED drive current is uniformly distributed around the surface electrode. An effect can be given for diffusion, and a light-emitting element with high luminance can be provided.
[Brief description of the drawings]
FIG. 1 is a schematic cross-sectional view of an LED according to the present invention.
FIG. 2 is a schematic sectional view showing the structure of a lamp according to the present invention.
FIG. 3 is a schematic cross-sectional view of an LED according to the first embodiment of the present invention.
FIG. 4 is a schematic cross-sectional view of an LED according to a second embodiment of the present invention.
[Explanation of symbols]
1A, 2A laminated structure
1B, 2B, 3B LED
10 lamps
11 Substrate
12 Upper barrier layer
13 Surface electrode
14 Back electrode
15 pedestal
16 body
17, 18 terminals
19 Sealing resin
101 Single crystal substrate
102 Low temperature buffer layer
103 Lower barrier layer
104 Light emitting layer
105 Upper barrier layer
106 Surface electrode
107 Back electrode
108 Ion implantation region
109 pn junction region

Claims (9)

A p-type boron phosphide (BP) system provided on the surface of a single crystal substrate and containing boron (B) and phosphorus (P) as constituent elements to which beryllium (Be) is added as a p-type impurity A compound semiconductor device comprising a semiconductor layer. A p-type boron phosphide-based semiconductor layer to which beryllium (Be) is added is formed on the surface of a single-crystal substrate via a low-temperature buffer layer made of a polycrystalline boron phosphide-based semiconductor containing an amorphous material. The compound semiconductor device according to claim 1, wherein the compound semiconductor device is provided. 3. The compound semiconductor according to claim 1, wherein the compound semiconductor has a pn junction structure including a p-type boron phosphide-based semiconductor layer to which beryllium (Be) is added and an n-type III-V group compound semiconductor layer. element. 2. A p-type boron phosphide-based semiconductor layer to which beryllium (Be) is added is provided on a surface of a substrate made of a single crystal by means of metal organic chemical vapor deposition (MOCVD). A method for producing a compound semiconductor device according to 1 to 3. 4. A compound semiconductor device according to claim 1, wherein a p-type boron phosphide-based semiconductor layer to which beryllium (Be) is added is provided on the surface of a substrate made of a single crystal by means of ion implantation. Manufacturing method. A light emitting device comprising the compound semiconductor device according to claim 1. The light emitting element which consists of a compound semiconductor element manufactured by the manufacturing method of the compound semiconductor element of Claim 4 or 5. A lamp using the light emitting device according to claim 6. A light source using the lamp according to claim 8.

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