KR20010008570A - GaN Semiconductor Device of Quantum Well structure - Google Patents

Abstract

PURPOSE: A nitride semiconductor device of a quantum well structure is provided to prevent the degradation of luminescent efficiency by minimizing crystal dislocation in a crystal growth layer and to reduce the driving voltage of a light emitting device by improving the doping concentration of a p-type layer. CONSTITUTION: A nitride semiconductor device includes the first buffer layer(210) and an n-type contact layer(220) formed on a substrate(200) in sequence. The device further includes an n-type clad layer(230) and a thin active layer(240) of a quantum well structure formed on a portion of the n-type contact layer(220) in sequence. In addition, a low temperature crystal growth layer(243), the second buffer layer(247), a p-type clad layer(250) and a p-type contact layer(260) are formed on the active layer(240) in sequence. Moreover, an n-type electrode(270) is formed on the other portion of the n-type contact layer(220), and a p-type electrode(280) is formed on the p-type contact layer(260).

Description

GaN Semiconductor Device of Quantum Well structure

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a nitride semiconductor device having a quantum well structure. In particular, the present invention relates to a nitride semiconductor device having a quantum well structure. The present invention relates to a nitride semiconductor device having a quantum well structure capable of lowering.

Nitride semiconductor devices have recently attracted much attention as materials such as blue light emitting diodes (hereinafter referred to as LEDs), blue laser diodes (hereinafter referred to as LDs), or solar cells.

Among them, the short wavelength blue LEDs in the 400 nm range for the AlGaAs LEDs and LDs in the 800 to 830 nm region enable the information recording density to be increased by four times or more, thus foretelling the arrival of the digital video disc (DVD) era.

In particular, the development of a blue LED achieves the three primary colors of light together with red and green to facilitate the implementation of all natural colors.

1 is a cross-sectional view showing a nitride semiconductor device of a quantum well structure according to the prior art, Figure 2 is a graph showing the current-voltage characteristics of the nitride semiconductor device according to the prior art.

In the conventional nitride semiconductor device, as shown in FIG. 1, the substrate 100, the buffer layer 110 and the n-type contact layer 120 sequentially formed on the substrate 100, and the n-type contact layer ( An n-type clad layer 130 formed at a predetermined portion on the 120, an InGaN active layer 140 having a quantum well structure, and a p-type clad layer 150 sequentially formed on the n-type clad layer 130. And n-type formed on a predetermined portion on the p-type contact layer 160 and the n-type contact layer 120 where the n-type cladding layer 130 is not formed and on the p-type contact layer 160, respectively. It comprises a p-type electrode (170, 180).

Although not shown in the drawings, a nitride semiconductor device chip driven by flowing a current through the electrode portion by contacting a heat-sink for heat dissipation by wire bonding to each electrode is manufactured.

As the substrate, sapphire, GaN, SiC, ZnO, GaAs, or Si may be used, and as the buffer layer, GaN, AlN, AlGaN, or InGaN may be used, but in general, organometallic chemical vapor deposition on a sapphire insulating substrate (Metal Organic Chemical Vapor Deposition: Hereinafter, a buffer layer formed by depositing GaN using a MOCVD method is used.

The n-type and p-type contact layers are GaN by n-type and p-type doping, respectively, and the n-type and p-type cladding layers are AlGaN by n-type and p-type doping, respectively. Is formed by using Ti / Al, and Ni / Au as the p-type electrode, and is mainly doped with Mg to form the p-type layer.

In general, the conventional nitride semiconductor device having the above-described structure has some problems.

First, since a nitride semiconductor device grows a pn junction nitride semiconductor thin film on a sapphire substrate having a different lattice structure, a lattice mismatch exists between the substrate and the upper crystal growth layer, resulting in a large amount of crystal defects in the crystal grown film. (dislocation), it is difficult to obtain a good crystal growth layer.

Second, due to the lattice defects of the crystal-grown thin film, it naturally shows n-type characteristics, and when Mg doping to form a p-type contact layer, Mg is combined with H of ammonia (NH ₃ ) gas to provide electrical insulation properties. Form the visible Mg-H conjugate. Therefore, it is difficult to obtain a high concentration of p-type GaN.

Third, in forming n-type and p-type electrodes for introducing current into the GaN light emitting device, most of the driving voltage is consumed to pass through because of the band gap offset between the GaN surface and the electrode. Therefore, there is a problem that the driving voltage of the device is very large.

The p-type ohmic contact research for minimizing the voltage consumed to pass the interface between the GaN surface and the metal electrode has been actively conducted to reduce the driving voltage of the light emitting device, but the electrode material of the commercially available level is not yet available.

The first problem described in the above-described problems of the nitride semiconductor device according to the related art will be described in detail. The sapphire substrate and the upper layer crystal growth layer are grown in a relation that the pn-junction semiconductor multilayer thin film is grown on an insulating sapphire substrate having a different lattice structure. And lattice mismatches between the crystal growth layers, and thus, it is very difficult to obtain a high quality crystal growth layer by having a large amount of crystal defects in the crystal grown film quality. For this reason, the active layer is formed to have a very thin quantum well structure of less than 200 GPa to reduce crystal defect density. However, it is difficult to control crystal defects due to lattice mismatch.

Further, InGaN is deposited on the n-type crystal growth layer at a temperature of 700 to 900 ° C. to form an active layer having a quantum well structure, and then a p-type crystal growth layer is formed on the active layer at a high temperature of 1000 to 1200 ° C. In the process, the low melting point In in the active layer of the quantum well structure evaporates and there is a problem in that the change in the emission wavelength and the luminous efficiency are reduced by the In composition change in the active layer.

FIG. 2 is a graph showing the current-voltage characteristics of the nitride semiconductor device according to the related art described above, and when the current is 20 mA, the driving voltage is 4 to 4.2 V, which is very high.

Accordingly, an object of the present invention is to provide a nitride semiconductor device having a quantum well structure capable of controlling the In composition of the quantum well active layer, minimizing crystal defects in the crystal grown film quality, and improving driving efficiency and emission characteristics by lowering driving voltage. Is in.

The nitride semiconductor device according to the present invention for achieving the above object is a structure in which an n-type contact layer, an n-type cladding layer, an active layer of a quantum well structure, a p-type cladding layer and a p-type contact layer are sequentially stacked crystal growth on the substrate In the nitride semiconductor device having, a low temperature crystal growth layer and a low temperature buffer layer are further formed between the active layer and the p-type cladding layer of the quantum well structure.

1 is a cross-sectional view showing a nitride semiconductor device according to the prior art.

Figure 2 is a graph showing the current-voltage characteristics of the nitride semiconductor device according to the prior art.

3 is a cross-sectional view showing a nitride semiconductor device according to an embodiment of the present invention.

4 is a graph showing current-voltage characteristics of a nitride semiconductor device according to an exemplary embodiment of the present invention.

<Detailed description of the reference numerals of the main parts of the drawings>

200 substrate 210 first buffer layer

220: n type contact layer 230: n type clad layer

240: quantum well active layer 243: low temperature crystal growth layer

247: second buffer layer 250: p-type cladding layer

260 p-type contact layer 270 n-type electrode

280 p-type electrode

Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.

3 is a cross-sectional view illustrating a nitride semiconductor device having a quantum well structure according to an embodiment of the present invention, and FIG. 4 is a graph showing current-voltage characteristics of the nitride semiconductor device according to the embodiment of the present invention.

3, the substrate 200, the first buffer layer 210 and the n-type contact layer 220 sequentially formed on the substrate 200, and a predetermined portion on the n-type contact layer 220. The n-type cladding layer 230 and the active layer 240 having a very thin quantum well structure sequentially formed on the low-temperature crystal growth layer 243, the second buffer layer 247, and p sequentially formed on the active layer 240. The cladding layer 250 and the p-type contact layer 260, the predetermined portion on the n-type contact layer 220, the n-type cladding layer 230 is not formed and on the p-type contact layer 260 N-type and p-type electrodes 270 and 280 formed at predetermined portions, respectively.

Although not shown in the drawings, a nitride semiconductor device chip driven by wire-bonding each electrode to contact the heat-dissipating heat-sink to flow a current through the electrode portion is fabricated.

As the substrate, sapphire, GaN, SiC, ZnO, GaAs, or Si is used, and as the first buffer layer, GaN, AlN, AlGaN, or InGaN is used. Generally, GaN using a MOCVD method on a sapphire insulating substrate is used. The buffer layer formed by depositing is used.

The n-type and p-type contact layers are GaN by n-type and p-type doping, respectively, and the n-type and p-type cladding layers are AlGaN by n-type and p-type doping, respectively. Is formed by using Ti / Al, and Ni / Au as the p-type electrode, and is mainly doped with Mg to form the p-type layer.

A low temperature crystal growth layer is formed by depositing GaN or AlGaN at a temperature of 700 to 850 ° C., which is lower than a temperature of forming a p-type crystal growth layer, on the active layer of the quantum well structure. Forming a second buffer layer at a temperature of 450 ~ 550 ℃ prevents the evaporation of the low melting point in the active layer due to the formation of the p-type cladding layer and the p-type contact layer that proceeds to a high temperature process on the active layer of the quantum well structure, The second buffer layer formed by depositing GaN or AlGaN on the very thin quantum well structure active layer and the low temperature crystal growth layer prevents lattice defects in the p-type cladding layer and the p-type contact layer due to lattice mismatch, thereby preventing the p-type. Improve the Mg doping concentration of the crystal growth layer.

That is, by forming a low crystal growth layer and a low temperature buffer layer on the active layer in a device having a low crystalline density with an active layer having a very thin quantum well structure having a thickness of less than 200 μs, the active layer is prevented from evaporation and the p-type crystal is formed. There is an advantage of improving the crystallinity of the growth layer.

FIG. 4 is a graph illustrating current-voltage characteristics of a nitride semiconductor device in which a low temperature crystal growth layer and a second buffer layer are further formed according to an embodiment of the present invention. As shown in the graph of FIG. The low-temperature crystal growth layer and the low-temperature buffer layer formed between the active layer having a quantum well structure and the p-type cladding layer are formed from the nitride semiconductor device in which the low-temperature crystal growth layer and the second buffer layer as shown in FIG. It can be seen that the driving voltage of a nitride semiconductor device is reduced.

Therefore, the nitride semiconductor device of the quantum well structure according to the present invention forms a low temperature crystal growth layer and a low temperature buffer layer between the active layer of the very thin quantum well structure and the p-type crystal growth layer, thereby controlling the In component of the active layer and growing the crystal. The lattice mismatch between layers is alleviated and the driving voltage of the device is reduced, thereby improving light emission characteristics of the light emitting device and increasing light emission efficiency.

Claims (4)

In a nitride semiconductor device having a structure in which an n-type contact layer, an n-type cladding layer, an active layer having a quantum well structure, a p-type cladding layer, and a p-type contact layer are sequentially stacked and crystal-grown on a substrate, A nitride semiconductor device having a quantum well structure further comprising a low temperature crystal growth layer and a low temperature buffer layer formed between the quantum well active layer and the p-type cladding layer. The nitride semiconductor device of claim 1, wherein the low temperature crystal growth layer is formed of GaN or AlGaN to prevent evaporation of the In component in the active layer of the quantum well structure. The nitride semiconductor device of claim 1, wherein the low temperature buffer layer is formed of GaN or AlGaN to minimize lattice mismatch between crystal growth layers. The nitride semiconductor device having a quantum well structure according to claim 1, wherein the low temperature crystal growth layer is formed at a temperature of 700 to 850 ° C and the buffer layer at a temperature of 450 to 550 ° C.