JP3653170B2 - ラッチ回路およびフリップフロップ回路 - Google Patents

ラッチ回路およびフリップフロップ回路 Download PDF

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Publication number
JP3653170B2
JP3653170B2 JP01421798A JP1421798A JP3653170B2 JP 3653170 B2 JP3653170 B2 JP 3653170B2 JP 01421798 A JP01421798 A JP 01421798A JP 1421798 A JP1421798 A JP 1421798A JP 3653170 B2 JP3653170 B2 JP 3653170B2
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JP
Japan
Prior art keywords
input terminal
node
power supply
inverter
channel mos
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP01421798A
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English (en)
Japanese (ja)
Other versions
JPH11214961A5 (https=
JPH11214961A (ja
Inventor
公大 上田
耕一郎 益子
佳樹 和田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP01421798A priority Critical patent/JP3653170B2/ja
Priority to US09/130,607 priority patent/US5994935A/en
Priority to KR1019980043532A priority patent/KR100292964B1/ko
Publication of JPH11214961A publication Critical patent/JPH11214961A/ja
Publication of JPH11214961A5 publication Critical patent/JPH11214961A5/ja
Application granted granted Critical
Publication of JP3653170B2 publication Critical patent/JP3653170B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356104—Bistable circuits using complementary field-effect transistors
    • H03K3/356113—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit
    • H03K3/356147—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit using pass gates
    • H03K3/356156—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit using pass gates with synchronous operation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01—Details
    • H03K3/012—Modifications of generator to improve response time or to decrease power consumption
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/3562—Bistable circuits of the primary-secondary type
    • H03K3/35625—Bistable circuits of the primary-secondary type using complementary field-effect transistors
JP01421798A 1998-01-27 1998-01-27 ラッチ回路およびフリップフロップ回路 Expired - Lifetime JP3653170B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP01421798A JP3653170B2 (ja) 1998-01-27 1998-01-27 ラッチ回路およびフリップフロップ回路
US09/130,607 US5994935A (en) 1998-01-27 1998-08-07 Latch circuit and flip-flop circuit reduced in power consumption
KR1019980043532A KR100292964B1 (ko) 1998-01-27 1998-10-17 필요한 소자수가 감소되고 소비 전력이 절감되는 래치 회로 및플립플롭 회로

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP01421798A JP3653170B2 (ja) 1998-01-27 1998-01-27 ラッチ回路およびフリップフロップ回路

Publications (3)

Publication Number Publication Date
JPH11214961A JPH11214961A (ja) 1999-08-06
JPH11214961A5 JPH11214961A5 (https=) 2004-12-09
JP3653170B2 true JP3653170B2 (ja) 2005-05-25

Family

ID=11854927

Family Applications (1)

Application Number Title Priority Date Filing Date
JP01421798A Expired - Lifetime JP3653170B2 (ja) 1998-01-27 1998-01-27 ラッチ回路およびフリップフロップ回路

Country Status (3)

Country Link
US (1) US5994935A (https=)
JP (1) JP3653170B2 (https=)
KR (1) KR100292964B1 (https=)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW382855B (en) * 1998-07-29 2000-02-21 Integrated Technology Express State machine with dynamic interception clock function
JP3632151B2 (ja) * 2000-06-06 2005-03-23 日本電信電話株式会社 断熱充電レジスタ回路
KR100391825B1 (ko) * 2001-03-12 2003-07-16 주식회사 케이이씨 고속 리셋기능을 갖는 플립플롭 회로 및 플립플롭 회로의 리셋방법
EP1331736A1 (en) * 2002-01-29 2003-07-30 Texas Instruments France Flip-flop with reduced leakage current
KR100468749B1 (ko) * 2002-07-12 2005-01-29 삼성전자주식회사 고속 동작을 위한 플립플롭
US6741111B1 (en) 2003-04-21 2004-05-25 Pericom Semiconductor Corp. Data register for buffering double-data-rate DRAMs with reduced data-input-path power consumption
JP2006224318A (ja) * 2005-02-15 2006-08-31 Brother Ind Ltd インクジェット記録装置
KR100776750B1 (ko) * 2006-06-08 2007-11-19 주식회사 하이닉스반도체 반도체 메모리의 기준전압 발생장치 및 방법
CN101241247B (zh) * 2007-02-09 2010-05-26 群康科技(深圳)有限公司 移位寄存器及液晶显示装置
US8615205B2 (en) 2007-12-18 2013-12-24 Qualcomm Incorporated I-Q mismatch calibration and method
JP2009211732A (ja) * 2008-02-29 2009-09-17 Eastman Kodak Co シフトレジスタ回路および表示装置
US8970272B2 (en) 2008-05-15 2015-03-03 Qualcomm Incorporated High-speed low-power latches
US8712357B2 (en) 2008-11-13 2014-04-29 Qualcomm Incorporated LO generation with deskewed input oscillator signal
US8718574B2 (en) 2008-11-25 2014-05-06 Qualcomm Incorporated Duty cycle adjustment for a local oscillator signal
US8847638B2 (en) 2009-07-02 2014-09-30 Qualcomm Incorporated High speed divide-by-two circuit
US8791740B2 (en) * 2009-07-16 2014-07-29 Qualcomm Incorporated Systems and methods for reducing average current consumption in a local oscillator path
US8164361B2 (en) * 2009-12-08 2012-04-24 Qualcomm Incorporated Low power complementary logic latch and RF divider
US8854098B2 (en) 2011-01-21 2014-10-07 Qualcomm Incorporated System for I-Q phase mismatch detection and correction
US9154077B2 (en) 2012-04-12 2015-10-06 Qualcomm Incorporated Compact high frequency divider
JP6273112B2 (ja) * 2012-09-11 2018-01-31 株式会社半導体エネルギー研究所 フリップフロップ回路および半導体装置
KR20240161234A (ko) 2014-10-10 2024-11-12 가부시키가이샤 한도오따이 에네루기 켄큐쇼 논리 회로, 처리 유닛, 전자 부품, 전자 기기, 및 반도체 장치

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01248820A (ja) * 1988-03-30 1989-10-04 Oki Electric Ind Co Ltd フリップフロップ回路
US5391935A (en) * 1993-07-22 1995-02-21 International Business Machines Corporation Assertive latching flip-flop
US5789956A (en) * 1995-05-26 1998-08-04 Texas Instruments Incorporated Low power flip-flop

Also Published As

Publication number Publication date
KR100292964B1 (ko) 2001-06-15
US5994935A (en) 1999-11-30
KR19990066790A (ko) 1999-08-16
JPH11214961A (ja) 1999-08-06

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