JP3464061B2 - SiOX層をその上に有する基板中にアスペクト比の高いホールまたは開口部をプラズマエッチングするための方法 - Google Patents
SiOX層をその上に有する基板中にアスペクト比の高いホールまたは開口部をプラズマエッチングするための方法Info
- Publication number
- JP3464061B2 JP3464061B2 JP29419994A JP29419994A JP3464061B2 JP 3464061 B2 JP3464061 B2 JP 3464061B2 JP 29419994 A JP29419994 A JP 29419994A JP 29419994 A JP29419994 A JP 29419994A JP 3464061 B2 JP3464061 B2 JP 3464061B2
- Authority
- JP
- Japan
- Prior art keywords
- etching
- layer
- substrate
- flow rate
- plasma
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000000034 method Methods 0.000 title claims description 43
- 239000000758 substrate Substances 0.000 title claims description 20
- 238000001020 plasma etching Methods 0.000 title claims description 6
- 229910052814 silicon oxide Inorganic materials 0.000 title 1
- 238000005530 etching Methods 0.000 claims description 32
- 229910052751 metal Inorganic materials 0.000 claims description 18
- 239000002184 metal Substances 0.000 claims description 18
- 239000007789 gas Substances 0.000 claims description 11
- 229920000642 polymer Polymers 0.000 claims description 9
- 238000001816 cooling Methods 0.000 claims description 8
- 150000003377 silicon compounds Chemical class 0.000 claims description 8
- 229910021332 silicide Inorganic materials 0.000 claims 5
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims 5
- 239000004020 conductor Substances 0.000 claims 2
- 238000001459 lithography Methods 0.000 claims 2
- 229910021341 titanium silicide Inorganic materials 0.000 claims 2
- 239000000112 cooling gas Substances 0.000 claims 1
- 239000000945 filler Substances 0.000 claims 1
- 238000001465 metallisation Methods 0.000 claims 1
- 238000010422 painting Methods 0.000 claims 1
- 238000000059 patterning Methods 0.000 claims 1
- 229910008484 TiSi Inorganic materials 0.000 description 11
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 6
- 239000000463 material Substances 0.000 description 5
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 5
- 238000002474 experimental method Methods 0.000 description 4
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 3
- 238000000151 deposition Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 235000006576 Althaea officinalis Nutrition 0.000 description 1
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 238000004380 ashing Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 229910001873 dinitrogen Inorganic materials 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005284 excitation Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910002804 graphite Inorganic materials 0.000 description 1
- 239000010439 graphite Substances 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical group [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- 238000010348 incorporation Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 238000009832 plasma treatment Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76805—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics the opening being a via or contact hole penetrating the underlying conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76816—Aspects relating to the layout of the pattern or to the size of vias or trenches
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Drying Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/159,634 US5468340A (en) | 1992-10-09 | 1993-11-30 | Highly selective high aspect ratio oxide etch method and products made by the process |
US159634 | 1993-11-30 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH07193057A JPH07193057A (ja) | 1995-07-28 |
JP3464061B2 true JP3464061B2 (ja) | 2003-11-05 |
Family
ID=22573345
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP29419994A Expired - Lifetime JP3464061B2 (ja) | 1993-11-30 | 1994-11-29 | SiOX層をその上に有する基板中にアスペクト比の高いホールまたは開口部をプラズマエッチングするための方法 |
Country Status (5)
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5468339A (en) * | 1992-10-09 | 1995-11-21 | Advanced Micro Devices, Inc. | Plasma etch process |
US5935877A (en) * | 1995-09-01 | 1999-08-10 | Applied Materials, Inc. | Etch process for forming contacts over titanium silicide |
US6001699A (en) * | 1996-01-23 | 1999-12-14 | Intel Corporation | Highly selective etch process for submicron contacts |
DE19707886C2 (de) * | 1997-02-27 | 2003-12-18 | Micronas Semiconductor Holding | Verfahren zum Erzeugen von Kontaktlöchern in einer Halbleiteranordnung |
KR19980084172A (ko) * | 1997-05-21 | 1998-12-05 | 윤종용 | 고 식각선택비를 이용한 반도체장치의 건식식각방법 |
TW430900B (en) * | 1997-09-08 | 2001-04-21 | Siemens Ag | Method for producing structures having a high aspect ratio |
US6066566A (en) * | 1998-01-28 | 2000-05-23 | International Business Machines Corporation | High selectivity collar oxide etch processes |
US6057193A (en) | 1998-04-16 | 2000-05-02 | Advanced Micro Devices, Inc. | Elimination of poly cap for easy poly1 contact for NAND product |
US6080676A (en) * | 1998-09-17 | 2000-06-27 | Advanced Micro Devices, Inc. | Device and method for etching spacers formed upon an integrated circuit gate conductor |
US6281132B1 (en) | 1998-10-06 | 2001-08-28 | Advanced Micro Devices, Inc. | Device and method for etching nitride spacers formed upon an integrated circuit gate conductor |
US6221745B1 (en) * | 1998-11-27 | 2001-04-24 | Taiwan Semiconductor Manufacturing Company | High selectivity mask oxide etching to suppress silicon pits |
US6214742B1 (en) * | 1998-12-07 | 2001-04-10 | Advanced Micro Devices, Inc. | Post-via tin removal for via resistance improvement |
EP1132959A1 (en) * | 2000-03-03 | 2001-09-12 | STMicroelectronics S.r.l. | A method of forming low-resistivity connections in non-volatile memories |
JP3539946B2 (ja) * | 2002-03-28 | 2004-07-07 | 沖電気工業株式会社 | Soi構造を有する半導体装置の製造方法 |
US8246786B2 (en) * | 2009-09-03 | 2012-08-21 | Pratt & Whitney Rocketdyne, Inc. | Solar desalinization plant |
US8246787B2 (en) * | 2009-09-03 | 2012-08-21 | Pratt & Whitney Rockedyne, Inc. | Solar desalinization plant |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4871421A (en) | 1988-09-15 | 1989-10-03 | Lam Research Corporation | Split-phase driver for plasma etch system |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4795722A (en) * | 1987-02-05 | 1989-01-03 | Texas Instruments Incorporated | Method for planarization of a semiconductor device prior to metallization |
GB2214709A (en) * | 1988-01-20 | 1989-09-06 | Philips Nv | A method of enabling connection to a substructure forming part of an electronic device |
US5254213A (en) * | 1989-10-25 | 1993-10-19 | Matsushita Electric Industrial Co., Ltd. | Method of forming contact windows |
US5026666A (en) * | 1989-12-28 | 1991-06-25 | At&T Bell Laboratories | Method of making integrated circuits having a planarized dielectric |
US4978420A (en) * | 1990-01-03 | 1990-12-18 | Hewlett-Packard Company | Single chamber via etch through a dual-layer dielectric |
US5021121A (en) * | 1990-02-16 | 1991-06-04 | Applied Materials, Inc. | Process for RIE etching silicon dioxide |
US5213659A (en) * | 1990-06-20 | 1993-05-25 | Micron Technology, Inc. | Combination usage of noble gases for dry etching semiconductor wafers |
US5022958A (en) * | 1990-06-27 | 1991-06-11 | At&T Bell Laboratories | Method of etching for integrated circuits with planarized dielectric |
JP2697952B2 (ja) * | 1990-11-15 | 1998-01-19 | シャープ株式会社 | 半導体装置の製造方法 |
US5176790A (en) * | 1991-09-25 | 1993-01-05 | Applied Materials, Inc. | Process for forming a via in an integrated circuit structure by etching through an insulation layer while inhibiting sputtering of underlying metal |
US5269879A (en) * | 1991-10-16 | 1993-12-14 | Lam Research Corporation | Method of etching vias without sputtering of underlying electrically conductive layer |
US5284549A (en) * | 1992-01-02 | 1994-02-08 | International Business Machines Corporation | Selective fluorocarbon-based RIE process utilizing a nitrogen additive |
US5468339A (en) * | 1992-10-09 | 1995-11-21 | Advanced Micro Devices, Inc. | Plasma etch process |
-
1993
- 1993-11-30 US US08/159,634 patent/US5468340A/en not_active Expired - Fee Related
-
1994
- 1994-10-25 EP EP94307809A patent/EP0655775A1/en not_active Withdrawn
- 1994-11-08 TW TW083110307A patent/TW249295B/zh not_active IP Right Cessation
- 1994-11-17 KR KR1019940030287A patent/KR100323242B1/ko not_active Expired - Lifetime
- 1994-11-29 JP JP29419994A patent/JP3464061B2/ja not_active Expired - Lifetime
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4871421A (en) | 1988-09-15 | 1989-10-03 | Lam Research Corporation | Split-phase driver for plasma etch system |
Also Published As
Publication number | Publication date |
---|---|
TW249295B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1995-06-11 |
KR100323242B1 (ko) | 2002-05-13 |
EP0655775A1 (en) | 1995-05-31 |
US5468340A (en) | 1995-11-21 |
JPH07193057A (ja) | 1995-07-28 |
KR950015622A (ko) | 1995-06-17 |
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