JP3455061B2 - Thin film capacitors - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film capacitor, which has a large capacitance and a low inductance, for example, which is provided in an electric circuit that operates at high speed and is used for bypassing high frequency noise or for preventing fluctuations in power supply voltage. It relates to a thin film capacitor.

[0002]

2. Description of the Related Art In recent years, as electronic devices have become smaller and more sophisticated, there have been strong demands for electronic parts installed in the electronic devices to be smaller, thinner, and compatible with high frequencies.

Particularly in a high-speed digital circuit of a computer that needs to process a large amount of information at high speed, even at the personal computer level, the clock frequency in the CPU chip is 100 MHz to several hundred MHz, and the clock frequency of the inter-chip bus is 30 MHz. The high speed of 75 MHz is remarkable.

Further, as the degree of integration of LSIs increases and the number of elements in a chip increases, the power supply voltage tends to decrease in order to suppress power consumption. As these IC circuits become faster, higher in density, and lower in voltage, it is indispensable for passive components such as capacitors to have excellent characteristics with respect to high frequency or high speed pulse as well as small size and large capacity. There is.

In order to make the capacitor small in size and high in capacity, it is most effective to make the dielectric material sandwiched between the pair of electrodes thin and thin. The thin film also conforms to the above-mentioned tendency of voltage decrease.

On the other hand, various problems associated with high-speed operation of IC circuits are more serious than miniaturization of each element. Of these, it is particularly important in the function of removing high-frequency noise, which is the role of the capacitor, that the instantaneous decrease in the power supply voltage that occurs when simultaneous switching of the logic circuits occurs It is a function to reduce by supplying to. This is a so-called decoupling capacitor.

The performance required of the decoupling capacitor lies in how quickly the current can be supplied to the current fluctuation in the load section faster than the clock frequency. Therefore, it must function reliably as a capacitor in the frequency range from 100 MHz to 1 GHz.

However, the actual capacitor element has a resistance component and an inductance component in addition to the capacitance component. The impedance of the capacitive component decreases with increasing frequency,
The inductance component increases as the frequency increases.
Therefore, as the operating frequency becomes higher, the transient current that should be supplied by the inductance of the element is limited, and the power supply voltage on the logic circuit side is momentarily lowered or new voltage noise is generated. As a result, it causes an error on the logic circuit.

Particularly in recent LSIs, the power supply voltage is lowered in order to suppress an increase in power consumption due to an increase in the total number of elements.
The allowable fluctuation range of the power supply voltage is also small. Therefore, it is very important to reduce the inductance of the decoupling capacitor element itself in order to minimize the voltage fluctuation width during high speed operation.

There are three ways to reduce the inductance. The first is to minimize the length of the current path, the second is to make the current path into a loop structure to minimize the loop cross-sectional area, and the third is to divide the current path into n pieces to reduce the effective inductance to 1 / N.

The first method may be achieved by increasing the capacitance per unit area to reduce the size, and can be achieved by thinning the capacitor element. For the purpose of obtaining a capacitor having a large capacity and good high frequency characteristics, Japanese Patent Application Laid-Open No. 60-94716 discloses a thin film having a dielectric thickness of 1 μm or less.

The second method has the effect of offsetting and reducing the magnetic field formed by one current path by the magnetic field formed by another current path in the vicinity thereof. Therefore, a pair of electrode plates or electrodes forming a capacitor are used. The directions of the currents flowing through the layers may be set so as not to be in the same direction as much as possible.

In the third method, the inductance can be reduced by connecting the divided capacitors in parallel.
As such a capacitor, Japanese Patent Laid-Open No. 4-211191
Japanese Patent Laid-Open Publication No. 1994-242242 discloses a device using a thin film dielectric layer.

[0014]

However, when considering a decoupling capacitor that can be mounted at a desired location, the size that can be handled is 0.5 mm × 0.5.
It is necessary to have a thickness of about mm or more, and there is a limit in reducing the inductance only by the first thin film and the downsizing method.

In the second method, the positive and negative terminal electrodes need to be in the same end face or in the orthogonal direction, which is disadvantageous in mounting.

The third division parallel connection method is an advantageous means for a board built-in type, but has no degree of freedom in mounting. Further, although a normal multilayer capacitor is also connected in parallel, since the directions of the currents are the same, the magnetic fields formed by the electrode currents are superimposed. That is, the mutual inductance becomes large, so that the effective total inductance cannot be sufficiently reduced. Therefore, it was necessary to adopt the second means together, but as described above, there was a mounting problem due to the problem of the terminal electrode.

It is an object of the present invention to provide a thin film capacitor having a low inductance structure that is easy to mount and easy to stack.

[0018]

A thin film capacitor of the present invention comprises a first capacitor having a first electrode layer on the upper surface of a dielectric layer and a second electrode layer on the lower surface, and a first capacitor on the upper surface of the dielectric layer. The two electrode layers are juxtaposed with the second capacitive element having the first electrode layer formed on the lower surface, and the first electrode layers of the first capacitive element and the second capacitive element and the second electrode layers of the second capacitive element are connected to each other . 1 electrode layer
And the first volume formed on the second electrode layer, respectively.
The connection terminal electrodes between the measuring element and the second capacitance element are connected to each other, and further external terminal electrodes are formed on the uppermost first and second electrode layers.

Further, a plurality of electrode layers and a plurality of dielectric layers are alternately laminated, and the electrode layers are alternately laminated from the lower side to the first layer.
The first capacitive element, which is an electrode layer or a second electrode layer, and a plurality of electrode layers and a plurality of dielectric layers are alternately laminated, and the electrode layers are alternately arranged from the lower side to the second electrode layer or the second electrode layer. The second capacitive element formed as one electrode layer is juxtaposed, and
The first electrode layer and the second electrode layer of the capacitive element and the second capacitive element are arranged on the first electrode layer and the second electrode layer, respectively.
The first capacitive element and the second capacitive element respectively formed
Connect by connecting the connection terminal electrodes between
Further, external terminal electrodes are formed on the uppermost first and second electrode layers.

[0020]

In the thin film capacitor of the present invention, since the pair of capacitive elements are juxtaposed at a predetermined interval, the pair of capacitive elements have the first electrode layer (for example, positive electrode layer) and the second electrode layer in the same plane. Since the electrode layer (for example, the negative electrode layer) is formed and the positive electrode layer and the negative electrode layer can be formed close to each other, the current path can be shortened and the inductance can be reduced. it can.

Further, since the directions of the currents flowing through the positive electrode layer and the negative electrode layer of the individual capacitive elements are opposite to each other, the generated inductances can be canceled out and can be reduced.

Further, since the respective electrode layers can be connected to each other at the connection terminal electrodes formed on the facing surface thereof, the lamination becomes easy. The external terminal electrode used for the contact with the outside can be formed on the uppermost electrode layer, which facilitates mounting.

[0023]

BEST MODE FOR CARRYING OUT THE INVENTION In a single-plate type thin film capacitor of the present invention, a pair of capacitive elements each having a positive electrode layer and a negative electrode layer formed on the upper and lower surfaces of a dielectric layer are arranged to face each other at a predetermined interval. At the same time, the electrode layers formed at the opposite positions of the pair of capacitive elements are electrode layers of different polarities, and further toward the positive electrode layer and the negative electrode layer of the pair of capacitive elements facing the capacitive elements facing each other. The projecting connection terminal electrodes are formed, and the connection terminal electrodes of the electrode layers having the same polarity are connected to each other in the pair of capacitive elements.

Further, in the laminated thin film capacitor of the present invention, a pair of capacitive elements formed by alternately laminating a plurality of electrode layers and a plurality of dielectric layers are opposed to each other at a predetermined interval, and Are alternately arranged in the stacking direction as positive electrode layers or negative electrode layers, and the electrode layers formed at opposite positions of the pair of capacitive elements are electrode layers of different polarities. Connection terminal electrodes projecting toward the opposing capacitive elements are formed on the layer and the negative electrode layer, and the connection terminal electrodes of the electrode layers having the same polarity are connected to each other in the pair of capacitive elements.

As shown in FIGS. 1 to 3, the single plate type thin film capacitor of the present invention has a positive electrode layer 2 (first electrode layer) and a negative electrode layer 3 (first electrode layer) on the upper and lower surfaces of the dielectric layer 1. A pair of capacitive elements A and B formed by forming two electrode layers) are arranged in parallel facing each other. The electrode layers formed at the opposite positions of the pair of capacitive elements A and B are electrode layers of different polarities.

The capacitive elements A and B are formed on the upper surface of the substrate 4.

That is, the capacitive element A has the positive electrode layer 2 formed on the lower surface of the dielectric layer 1 and the negative electrode layer 3 formed on the upper surface thereof, and the capacitive element B has the negative electrode layer formed on the lower surface of the dielectric layer 1. 3, the positive electrode layer 2 is formed on the upper surface. Then, the capacitive elements A and B
Are juxtaposed at a predetermined interval, the negative electrode layer 3 of the capacitive element B is on the same plane as the positive electrode layer 2 of the capacitive element A, and the negative electrode layer 3 of the capacitive element B is on the same plane as the negative electrode layer 3 of the capacitive element A. The positive electrode layer 2 is formed.

As shown in FIG. 4, the positive electrode layer 2 and the negative electrode layer 3 have a rectangular shape, and the dielectric layer 1 has a positive electrode layer 2 or a negative electrode formed on the lower surface of the dielectric layer 1. It has a rectangular shape sized to cover the layer 3. The dielectric layers 1 are separated from each other by a predetermined distance. Positive electrode layer 2 or negative electrode layer 3 formed on the upper surface of the dielectric layer 1.
Have the same shape and the same size as the positive electrode layer 2 or the negative electrode layer 3 formed on the lower surface of the dielectric layer 1.

The dielectric layer 1 has a thickness of 0.1 to 1 μm and a size of 1.2 mm in length and 1.2 mm in width.
The electrode layers 2 and 3 have a thickness of 0.1 to 1 μm and a size of 1.0 mm in length and 0.3 mm in width.

On the positive electrode layer 2 and the negative electrode layer 3 of the pair of capacitive elements A and B, connection terminal electrodes 5 projecting toward the opposing capacitive elements A and B are formed, and electrodes having the same polarity are formed. The connection terminal electrodes 5 of the layers 2 and 3 are connected to each other.

The positive electrode connecting portion 7 in which the positive electrode layers 2 are connected to each other and the negative electrode connecting portion 8 in which the negative electrode layers 3 are connected to each other are spaced apart from each other by a predetermined distance and are insulated from each other. The same material as that of the dielectric layer 1 may be filled between the positive electrode connecting portion 7 and the negative electrode connecting portion 8. In this case,
The dielectric layers 1 of the pair of capacitive elements A and B are connected to each other and have an H shape when seen in a plan view. Positive electrode layer 2 and negative electrode layer 3
The same material as that of the dielectric layer 1 may be filled in the portion between the positive electrode connecting portion 7 and the negative electrode connecting portion 8 as well.

In the thin film capacitor of the present invention, although not shown, external electrode terminals are connected to, for example, the positive electrode layer 2 and the negative electrode layer 3 formed on the outermost surfaces of the capacitive elements A and B by soldering or the like. As a result, the capacity is taken out.

The substrate 4 used in the present invention includes alumina, sapphire, MgO single crystal, SrTiO ₃ single crystal, titanium-coated silicon, or copper (Cu), nickel (Ni), titanium (Ti), tin (Sn). A stainless steel (SUS) thin film or thin plate is preferable. In particular, alumina and sapphire are preferable from the viewpoints of low reactivity with a thin film, low cost, high strength, and crystallinity of a dielectric film or an electrode film, and a copper (Cu) thin plate or A copper (Cu) thin film is desirable.

The electrode layer of the present invention is made of platinum (Pt),
There are gold (Au), palladium (Pd), copper (Cu) thin films and the like. Among these, platinum (Pt) and gold (Au) thin films and low resistance copper (Cu) thin films are most suitable. This is because Pt and Au have low reactivity with the dielectric and are less likely to be oxidized, so that a low dielectric constant phase is less likely to be formed at the interface with the dielectric.

Further, the dielectric layer may have a high dielectric constant in a high frequency region, and its film thickness is 1 μm.
m or less is desirable. The dielectric layer is, for example, a dielectric thin film made of a perovskite-type complex oxide crystal containing Pb, Mg, and Nb as metal elements, and the measurement frequency is 3
A dielectric thin film having a relative dielectric constant of 1000 or more at 00 MHz (room temperature) is desirable. In the present invention, Pb, Mg,
Other than the dielectric thin film made of perovskite type complex oxide crystal containing Nb, for example, perovskite type complex oxide crystal containing Ba and Ti, PZT, PLZT, SrTiO.
₃ , Ta ₂ O ₅ or the like may be used without any particular limitation. Such a dielectric layer is produced by a known method such as a PVD method, a CVD method, a sol-gel method.

In the thin film capacitor configured as described above, since the pair of capacitive elements A and B are formed so as to face each other, the positive electrode layer 2 is formed in the same plane on the pair of capacitive elements A and B. Since the negative electrode layer 3 and the negative electrode layer 3 are formed at a predetermined interval, and the positive electrode layer 2 and the negative electrode layer 3 can be formed close to each other, the current path is shortened and the inductance is reduced. Can be made smaller.

Further, the positive electrode layer 2 in each capacitor element
Since the currents flowing through the negative electrode layer 3 and the negative electrode layer 3 are in opposite directions, the inductances in the positive electrode layers 2 and the negative electrode layers 3 cancel each other out, and the generated inductance can be reduced.

Further, since the external terminal electrodes used for contact with the outside can be formed on the uppermost electrode layers 2 and 3, the mounting becomes easy.

The multilayer type thin film capacitor of the present invention will be described with reference to FIG. According to FIG. 5, a dielectric layer and an electrode layer are further laminated on the single plate type thin film capacitor shown in FIG.

That is, a pair of capacitive elements A and B formed by alternately laminating the electrode layers 2 and 3 and the dielectric layer 1 are juxtaposed, and in the capacitive elements A and B, the electrode layers 2 and 3 are laminated in the laminating direction. Are alternately formed as the positive electrode layer 2 and the negative electrode layer 3. The electrode layers 2 and 3 formed at the opposing positions of the pair of capacitive elements A and B are electrode layers 2 and 3 having different polarities, and the positive electrode layer 2 and the negative electrode layer of the pair of capacitive elements A and B are formed. 3 is formed with connection terminal electrodes 5 protruding toward the capacitive elements A and B facing each other. The connection terminal electrodes 5 of the electrode layers 2 and 3 having the same polarity are electrically connected to each other.

The thin-film capacitor of the present invention is generally used by being formed on the surface of the substrate as described above, but it can also be used by being built in the substrate. When incorporated in the substrate, the external electrode terminals are, for example, through-hole conductors formed in the substrate, and the capacitance is taken out by this.

Further, although the example in which the electrode layers 2 and 3 have a rectangular shape has been described, it may have any shape such as a square shape and a circular shape.

A plurality of thin film capacitors of the present invention shown above may be connected and used.

In such a case, the current path is divided into n pieces, and the effective inductance is further multiplied by 1 / n. Such a thin film capacitor may be built in the substrate.

[0045]

【Example】

Example 1 The electrode layer and the dielectric layer were all formed by the high frequency magnetron sputtering method. Ar gas was introduced into the process chamber as a sputtering gas, and the pressure was maintained at 6.7 Pa by evacuation.

A substrate holder and three target holders are installed in the process chamber, and sputtering from three kinds of target materials is possible. At the time of sputtering, the substrate holder was moved to the target position of the material type for film formation, and the substrate-target distance was fixed at 60 mm.

A high-frequency voltage of 13.56 MHz is applied between the substrate holder and the target by an external high-frequency power source, and a high-density plasma is generated in the vicinity of the target by a magnetron magnetic field formed by a permanent magnet installed on the back surface of the target. Then, the target surface was sputtered.

The high-frequency voltage can be applied independently to the three targets, and in this embodiment, only the target closest to the substrate was applied to generate plasma. The substrate holder has a heating mechanism with a heater, and the substrate temperature during sputtering film formation was controlled to be constant.

Further, three kinds of metal masks having a thickness of 0.05 mm are installed on the target side of the substrate set on the substrate holder, and the required mask can be set on the substrate film forming surface according to the film forming pattern. With the structure.

First, a pair of electrode layers having connection terminal electrodes as shown in FIG. 4A are formed by sputtering a platinum target with a first mask pattern on an alumina sintered body substrate having a thickness of 0.25 mm. And then Pb on the target
Using a (Mg _1/3 Nb _2/3 ) O ₃ sintered body, the second mask pattern was set, the substrate temperature was 535 ° C. and the high frequency power was 2
A pair of dielectric layers having connection terminal electrodes as shown in FIG. 4B were formed under the condition of 00W. Next, a third mask pattern was set, and a pair of electrode layers as shown in FIG. 4C was formed by sputtering a platinum target. The area of the outer shape of the electrode layer was 0.6 mm ² .

1 MHz of the produced multilayer thin film capacitor
To 1.8 GHz impedance characteristics from an impedance analyzer (HP by Hulett Packard
4291A), the capacitance component was 12.
A value of 5 nF and an inductance component of 150 pH was obtained. After the above measurement, the cross section of the thin film capacitor was observed by SEM. As a result, the thickness of each dielectric layer was 0.3 μm.

As a comparative example, except that the structure of a conventional general thin film capacitor as shown in FIG. 6 is used, the conditions such as the area of the electrode layer are prepared in the same manner as described above, and the capacitance component and the inductance are obtained. When the components were measured, the capacitance component was 12.6 nF and the inductance component was 380 pH. In FIG. 6, the conventional thin film capacitor is configured by sequentially stacking a positive electrode layer 21, a dielectric layer 22, and a negative electrode layer 23 on the upper surface of a substrate 20, and the positive electrode layer 21 and the negative electrode layer 23 are The capacity extracting portion 24 is formed on the opposite side.

Example 2 A laminated thin film capacitor having 10 dielectric layers was prepared in exactly the same manner as in Example 1 and evaluated in the same manner as in Example 1. The capacitance component was 126.1 nF and the inductance component 1 was
A value of 40 pH was obtained. After the above measurement, a cross-sectional SEM observation of the multilayer thin film capacitor revealed that the thickness of each dielectric layer was 0.3 μm.

Example 3 The substrate material, the electrode material, the electrode forming method, the shape and the dimensions were exactly the same as in Example 1, and only the dielectric film was formed by the sol-gel method. The procedure for producing a film by the sol-gel method was as follows.

Mg acetate and Nb ethoxide were weighed in a molar ratio of 1: 2 and refluxed in 2-methoxyethanol (1.
Performed at 24 ° C. for 24 hours, and MgNb complex alkoxide solution (Mg = 4.95 mmol, Nb10.05 mmo)
1, 2-methoxyethanol (150 mmol) was synthesized. Next, lead acetate (anhydrous) 15 mmol and 150 mmo
1-Methoxyethanol was mixed and the Pb precursor solution was synthesize | combined by the distillation operation at 120 degreeC.

The MgNb precursor solution and the Pb precursor solution were mixed in a molar ratio Pb: (Mg + Nb) = 1: 1,
Stir well at room temperature to remove Pb (Mg _1/3 Nb _2/3 ) O ₃ (P
MN) precursor solution was synthesized.

The concentration of this solution was diluted about 3-fold with 2-methoxyethanol to prepare a coating solution. Then on the electrode layer,
The coating solution was applied with a spin coater, dried, and then heat-treated at 300 ° C. for 1 minute to prepare a gel film. After repeating the operation of applying the coating solution and the heat treatment,
Baking at 30 ° C for 1 minute (in air), Pb (Mg
_{A 1/3} Nb _2/3 ) O ₃ thin film was obtained.

A resist is applied on the obtained dielectric thin film, exposed and developed by a photolithography process, and wet etching using this as a mask is performed to pattern the dielectric film into a pattern shape similar to that of the first embodiment. Then, a thin-layer capacitor similar to that of Example 1 was manufactured.

1 MHz of manufactured multilayer thin film capacitor
To 1.8 GHz impedance characteristics from an impedance analyzer (HP by Hulett Packard
4291A). As a result, the capacitance component was 50.2 nF and the inductance component was 160 pH. After the above measurement, a cross-sectional SEM of the multilayer thin film capacitor
As a result of observation, the thickness of each dielectric layer was 0.5 μm.

[0060]

As described above in detail, in the thin film capacitor of the present invention, the first electrode layer (positive electrode layer) and the second electrode layer are provided in the same plane.
Since the electrode layer (negative electrode layer) is formed, the positive electrode layer and the negative electrode layer can be formed close to each other, the current path can be shortened, and the inductance can be reduced. In addition, since each electrode layer can be connected at the connection terminal electrode, lamination is facilitated. Furthermore, since the external terminal electrode used for contact with the outside can be formed on the uppermost electrode layer, mounting becomes easy. Therefore, according to the present invention, it is possible to provide a low-inductance thin-film capacitor that is easy to stack and mount.

[Brief description of drawings]

FIG. 1 is an exploded perspective view showing a thin film capacitor of the present invention.

FIG. 2 is a plan view of the thin film capacitor of the present invention.

FIG. 3 is a side view of the vicinity of the positive electrode connecting portion of FIG.

FIG. 4 is a plan view showing an electrode layer and a dielectric layer.

FIG. 5 is an exploded perspective view showing a laminated type thin film capacitor.

FIG. 6 is an exploded perspective view showing a conventional thin film capacitor.

[Explanation of symbols]

1 ... Dielectric layer 2 ... Positive electrode layer (first electrode layer) 3 ... Negative electrode layer (second electrode layer) 4 ... Board 5 ... Connection terminal electrode A, B: Capacitive element 7 ... Positive electrode connection 8 ... Negative electrode connection part

Claims (2)

(57) [Claims] 1. A first capacitor having a first electrode layer formed on the upper surface of a dielectric layer and a second electrode layer formed on the lower surface, a second electrode layer formed on the upper surface of the dielectric layer, and a first electrode layer formed on the lower surface. And a second capacitance element formed with the first capacitance element and the second capacitance element are arranged side by side .
Before being formed on one electrode layer and the second electrode layer, respectively
The connection terminal electrodes between the first capacitive element and the second capacitive element are connected to each other by connecting, and external terminal electrodes are further formed on the uppermost first and second electrode layers. Characteristic thin film capacitor. 2. A first capacitor element comprising a plurality of electrode layers and a plurality of dielectric layers which are alternately laminated, wherein the electrode layers are alternately formed as a first electrode layer or a second electrode layer from the lower side. A plurality of electrode layers and a plurality of dielectric layers are alternately laminated, and the electrode layers are arranged from the lower side alternately with the second capacitor element which is the second electrode layer or the first electrode layer. , The first electrode layers of the first capacitive element and the second capacitive element and the second electrode layers of the second capacitive element are respectively defined as the first electrode layer and the second electrode layer.
The formed first capacitor element and the formed second capacitor element are connected to each other by connecting the connection terminal electrodes to each other, and the external terminal electrodes are further formed on the uppermost first and second electrode layers. Forming a thin film capacitor.