JP2003101239A - Multilayer wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the problem wherein a multilayer wiring board on which an electronic component operated at high speed is mounted simultaneously increases a switching noise and an EMI noise. SOLUTION: In the multilayer wiring board, a chip capacitor 6 is built in an insulating layer 2c between built-in capacitors in which a power-supply wiring layer 4 and a ground wiring layer 5 are faced, arranged and formed by sandwiching the insulating layer 2c at the inside of an insulating substrate 2 on which a plurality of insulating layers 2a to 2e are laminated and formed, a terminal electrode on one side of the chip capacitor 6 is connected to the layer 4, and a terminal electrode on the other side is connected to the layer 5. Since the inductance component of a through conductor which connects the chip capacitor 6, the layer 4 and the layer 5 is reduced, it is possible to obtain the multilayer wiring board in which the simultaneous generation of the switching noise and the EMI noise is small in a high-frequency operation at 1 GHz or more and which does not generate a malfunction in an electronic apparatus such as a communication apparatus or the like.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor element housing package for housing semiconductor elements, a multilayer wiring board used for an electronic circuit board on which semiconductor elements and electronic parts are mounted, and the like, which operates at high speed. The present invention relates to a multilayer wiring board having a wiring structure suitable for housing or mounting a semiconductor element.

[0002]

2. Description of the Related Art Conventionally, microprocessors and ASICs have been used.
In the case of a multilayer wiring board on which electronic components such as a semiconductor element represented by (Application Specific Integrated Circuit) and the like are mounted, and which is used for an electronic circuit board, alumina ceramics or the like is used when forming a wiring conductor for internal wiring. Insulating layers made of ceramics and wiring conductor layers made of refractory metal such as tungsten (W) are alternately laminated to form a multilayer wiring board.

On the other hand, as the demand for improvement in information processing capability has increased, the operating speed of semiconductor elements has increased, and signal wiring among wiring conductors for internal wiring has characteristic impedance matching and signal wiring between signal wirings. There has been a demand for improvement of electrical characteristics such as reduction of crosstalk noise. Therefore, in order to meet such demands, the wiring structure of the signal wiring is a strip line structure, and a wide area power supply wiring layer or a ground (ground) wiring layer is formed above and below the signal wiring via an insulating layer. It was

However, in such a multilayer wiring board, since the dielectric constant of the insulating layer is made of alumina ceramics or the like, the electromagnetic coupling between the signal wirings becomes large, so that the crosstalk noise increases. As a result, there arises a problem that it is not possible to cope with the increase in the operating speed of the semiconductor element.

Therefore, in place of the alumina ceramics having a relative dielectric constant of about 10, a relatively small relative dielectric constant of 3 to 5 is used as the insulating layer. Substrates have come into use.

In such a multilayer wiring board, a conductor film for internal wiring made of copper (Cu) is formed on an insulating layer made of an organic material by using a thin film forming technique such as plating, vapor deposition or sputtering. By forming a wiring conductor layer having a wiring conductor having a fine pattern by a photolithography method or an etching method and stacking the insulating layer and the wiring conductor layer alternately, a multilayer wiring capable of high-speed operation of a semiconductor element Substrates are being manufactured.

On the other hand, the problem of simultaneous switching noise has arisen as a problem related to the power supply to the semiconductor element. This is because the power supply voltage required for switching the semiconductor element is supplied from the outside of the multilayer wiring board through the power supply wiring and the ground wiring. When the signal wirings occur at the same time, noise is generated in the power supply wiring and the ground wiring.

In order to solve such a problem, a method of incorporating a capacitor in which a wide area power supply wiring layer and a ground wiring layer are opposed to each other with an insulating layer interposed in a multilayer wiring board, and recently, a chip There is a method in which a capacitor itself is built in a multilayer wiring board and connected to a power supply wiring / ground wiring via a through conductor.

[0009]

However, in recent years,
With the increase in communication speed, electronic devices such as communication devices have come to be used in a high frequency range of 1 GHz or more. In the conventional multilayer wiring board, the multi-layer wiring board is The inductance component of the through conductor becomes large, and ΔV = LdI / dt (ΔV is simultaneous switching noise, L is inductance, I is current value, t
Simultaneous switching noise ΔKV generated by the inductance component defined by time) and EMI noise caused by power supply noise become so large that they cannot be ignored, and malfunctions occur in electronic devices such as communication devices. Had the problem.

The present invention has been devised in view of the problems of the prior art, and an object thereof is to prevent simultaneous switching noise and EMI noise from being generated even in a high frequency operation of 1 GHz or higher, and to make electronic equipment such as communication equipment. An object of the present invention is to provide a multi-layer wiring board that does not cause a malfunction in the same class.

[0011]

A multilayer wiring board according to the present invention has a power wiring layer and a ground wiring layer which are opposed to each other with the insulating layer sandwiched inside an insulating substrate formed by laminating a plurality of insulating layers. In addition to having the built-in capacitor formed, a chip capacitor is built in the insulating layer between the power supply wiring layer and the ground wiring layer, and one terminal electrode of this chip capacitor is in the power supply wiring layer and the other is in the other. The terminal electrode is connected to the ground wiring layer.

Further, in the multilayer wiring board of the present invention having the above-mentioned structure, the chip capacitor is formed by alternately stacking first electrode layers and second electrode layers with a dielectric layer sandwiched therebetween. An external connection terminal that covers the entire end surface is provided on the end surface, and one of the external connection terminals is the first electrode layer,
The other is connected to the second electrode layer via a through conductor, respectively.

Further, the multilayer wiring board of the present invention is characterized in that, in the above structure, a plurality of the chip capacitors are arranged around the built-in capacitor.

According to the multilayer wiring board of the present invention, the built-in capacitor is formed by arranging the power supply wiring layer and the ground wiring layer in opposition to each other with the insulating layer sandwiched inside the insulating substrate formed by laminating a plurality of insulating layers. In addition, the chip capacitor is built in the insulating layer between the power supply wiring layer and the ground wiring layer that form the built-in capacitor, and one terminal electrode of the chip capacitor is the power supply wiring layer and the other terminal electrode is the ground wiring. Since it is connected to the layers, the through conductors used for connecting the chip capacitor and the power supply wiring layer and the ground wiring layer that form the built-in capacitor in the conventional multilayer wiring board are unnecessary, and the inductance component is eliminated. Since it is reduced, simultaneous switching noise and EMI noise are less likely to occur even in high-frequency operation of 1 GHz or higher, which is incorrect for electronic devices such as communication devices. It may be a multilayer wiring substrate never become to generate work.

Further, by disposing a plurality of chip capacitors around the built-in capacitor, it is possible to suppress the reflection of electromagnetic waves due to the mismatch of the characteristic impedance generated at the end of the built-in capacitor when the semiconductor element operates. As a result, it is possible to reduce the generation of EMI noise.

[0016]

BEST MODE FOR CARRYING OUT THE INVENTION The multilayer wiring board of the present invention will be described in detail below with reference to the accompanying drawings.

FIG. 1 is a sectional view showing an example of an embodiment of a multilayer wiring board of the present invention. In FIG. 1, 1 is a multilayer wiring substrate, 2 is an insulating substrate, and the insulating substrate 2 is formed by laminating a plurality of insulating layers 2a to 2e. In the multilayer wiring board 1 of this example, the insulating layers 2a to 2e are basically made of an insulating material having the same relative dielectric constant. A signal wiring group 3 is formed on the insulating layer 2b, and a wide area power supply wiring layer or ground wiring layer 4 is formed on the insulating layer 2c so as to face the signal wiring group 3. It has a microstrip line structure.

When the power supply wiring layer or the ground wiring layer 4 having a large area is formed so as to face the signal wiring group 3 in this manner, electromagnetic coupling between the signal wirings included in the signal wiring group 3 becomes small, so that the signal It is possible to reduce crosstalk noise generated between wirings. Further, the characteristic impedance of the signal wiring group 3 is set to an arbitrary value by appropriately setting the wiring width of the signal wiring and the thickness of the insulating layer 2b interposed between the signal wiring group 3 and the power supply wiring layer or the ground wiring layer 4. Therefore, it is possible to form the signal wiring group 3 having good transmission characteristics. The characteristic impedance of the signal wiring group 3 is generally set to 50Ω in many cases.

The plurality of signal wirings included in the signal wiring group 3 may respectively transmit different electric signals.

In this example, a semiconductor element 9 such as a microprocessor or ASIC is mounted on the upper surface of the multilayer wiring board 1 and a conductor bump made of solder such as tin-lead alloy (Sn-Pb) or gold (Au). It is electrically connected to the multilayer wiring board 1 through a semiconductor element connecting electrode 8 for connecting the semiconductor element 10 and the semiconductor element 9. Further, an external electrode 7 for supplying power to the semiconductor element 9 is provided on the lower surface of the multilayer wiring board 1 opposite to the upper surface on which the semiconductor element 9 is mounted.

Reference numeral 5 is a power wiring layer or ground wiring layer having a wide area like 4, and in this example, the multilayer wiring board 1 is formed by these power wiring layers or ground wiring layers 4 and 5.
A built-in capacitor is formed inside. When 4 is a power wiring layer, 5 is a ground wiring layer, and when 4 is a ground wiring layer, 5 is a power wiring layer. At this time, one of the external connection terminals of the chip capacitor 6 is directly connected to the power supply wiring layer 4 or 5 without a through conductor, and the other is directly connected to the ground wiring layer 4 or 5 without a through conductor. .

This will be described in detail with reference to FIG. Figure 2
1 is a sectional view of an essential part showing an example of an embodiment of a multilayer wiring board of the present invention, in which reference numeral 4 in FIG.
Is a ground wiring layer. In FIG. 2, the power supply wiring layer 63 is the power supply wiring layer or the ground wiring layer 4 shown in FIG.
Is equivalent to. The ground wiring layer 70 corresponds to the power supply wiring layer or the ground wiring layer 5 shown in FIG. In FIG. 2, the power supply wiring is connected to the power supply wiring layer 63 from the external electrode 61 through the via hole 62, which is a through conductor, and the semiconductor element connection electrode is connected through the via hole 64.
Connected to 65. Further, the ground wiring is connected to the ground wiring layer 68 from the external electrode 66 through the via hole 67, and connected to the semiconductor element connecting electrode 70 through the via hole 69. With these, a built-in capacitor is formed between the power supply wiring layer 63 and the ground wiring layer 68. Also, the power wiring 63
The chip capacitor 71 in which the external connection terminals are directly connected to the ground wiring 68 and the ground wiring 68 without passing through a through conductor such as a via hole corresponds to the chip capacitor 6 shown in FIG.

Here, the structure of the chip capacitor 6 is shown in FIG.
Will be shown in detail. FIG. 3 is a sectional view showing an example of a chip capacitor used in the multilayer wiring board of the present invention. In this chip capacitor, the first electrode layers 78 and 79 and the second electrode layers 74 and 75 are dielectric layers 32. (32b to 32d) are alternately laminated, and external connection terminals 72 and 76 are provided on the upper and lower end surfaces of the chip capacitor to cover the entire end surface. One of the external connection terminals 72 and 76 and the first external connection terminal 72 and 76 are provided. Electrode layers 78 and 79 are through conductors
The other 72 is connected to the second electrode layers 74 and 75 by the through conductor 73.

Next, another example of the embodiment of the multilayer wiring board of the present invention will be described with reference to FIG. FIG. 4 is a plan view of the power supply wiring layer or the ground wiring layer of the multilayer wiring board of FIG. In this example, a power wiring layer or a ground wiring layer 44 forming an internal capacitor is stacked on the insulating layer 42, and a plurality of chip capacitors 46 are arranged around the power wiring layer or the ground wiring layer 44. . The plurality of chip capacitors 46 are directly connected to the built-in capacitors formed by the power supply wiring layer 4 or 5 and the ground wiring layer 4 or 5 in FIG. 1 without via via holes or the like. By arranging a plurality of chip capacitors 46 around the built-in capacitor in this manner, when the semiconductor element operates, the characteristic impedance generated at the end of the power supply wiring layer or the ground wiring layer 44 forming the built-in capacitor is not affected. The reflection of electromagnetic waves due to matching can be suppressed, and the generation of EMI noise can be reduced.

In the multilayer wiring board of the present invention, the same wiring structure may be further laminated in multiple layers to form a multilayer wiring board.

Further, the structure of the signal wiring includes a microstrip structure having a power wiring layer or a ground wiring layer formed facing the signal wiring, and a strip having a power wiring layer or a ground wiring layer above and below the signal wiring. The structure may be a coplanar structure in which a power supply wiring layer or a ground wiring layer is formed adjacent to the signal wiring, and can be appropriately selected and used according to the specifications required for the multilayer wiring board.

Further, chip resistors, thin film resistors, coil inductors, cross inductors, chip capacitors or electrolytic capacitors may be attached to form a multilayer wiring board.

The shape of each insulating layer in plan view is
In addition to the square shape and the rectangular shape, the shape may be a rhombic shape, a hexagonal shape, an octagonal shape, or the like.

The multi-layer wiring board of the present invention is a package for storing electronic components such as a package for storing semiconductor elements, a substrate for mounting electronic components, a so-called multi-chip module or multi-chip on which many semiconductor elements are mounted. Used as a package or a motherboard.

In the multilayer wiring board of the present invention, each insulating layer is formed by, for example, a ceramic green sheet laminating method.
Aluminum oxide sintered body, aluminum nitride sintered body, silicon carbide sintered body, silicon nitride sintered body, mullite sintered body, or inorganic insulating material such as glass ceramics, or polyimide / epoxy Electrical insulation such as resin, fluororesin, organic insulating materials such as polynorbornene or benzocyclobutene, or composite insulating materials formed by bonding inorganic insulating powder such as ceramics powder with thermosetting resin such as epoxy resin It is formed using an insulating material.

These insulating layers are manufactured as follows. For example, when it is composed of an aluminum oxide sintered body, first, a suitable organic binder, a solvent, etc. are added and mixed to a raw material powder such as aluminum oxide, silicon oxide, calcium oxide, or magnesium oxide to form a sludge shape, A ceramic green sheet is obtained by forming this into a sheet shape by adopting a conventionally known doctor blade method. Then, a metal paste to be each signal wiring group and each wiring conductor layer is applied by printing in a predetermined pattern and laminated on top and bottom, and finally this laminated body is baked at a temperature of about 1600 ° C. in a reducing atmosphere. Produced.

In the case of an epoxy resin, for example, an insulating layer made of glass epoxy resin or the like formed by impregnating a cloth woven of ceramics or glass fibers, which is generally made of an aluminum oxide sintered body, with epoxy resin is used. An organic resin precursor is applied to the upper surface of the substrate by a spin coating method or a curtain coating method, and an insulating layer made of an organic resin such as an epoxy resin formed by heat-curing the same and an electroless plating of copper. It is manufactured by alternately laminating a thin film wiring conductor layer formed by adopting a thin film forming technique such as a vapor deposition method and a vapor deposition method and a photolithography technique, and heating and curing at a temperature of about 170 ° C.

The thickness of these insulating layers is appropriately set so as to satisfy the conditions such as mechanical strength and electrical characteristics corresponding to the required specifications according to the characteristics of the material used.

As a method for obtaining an insulating layer having a different relative dielectric constant, for example, an inorganic insulating material such as aluminum oxide, aluminum nitride, silicon carbide, silicon nitride, mullite or glass ceramics, or a polyimide / epoxy resin is used.・ Powder of high dielectric material such as barium titanate, strontium titanate, calcium titanate or magnesium titanate is added to organic insulating materials such as fluororesin, polynorbornene or benzocyclobutene, and heated and cured at an appropriate temperature. By doing so, a material having a desired relative dielectric constant may be obtained.

At this time, the particle size of the high dielectric material to be added and mixed to the inorganic insulating material or the organic insulating material is the ratio in the insulating layer caused by adding and mixing the high dielectric material to the inorganic insulating material or the organic insulating material. The range of 0.5 to 50 μm is desirable in order to reduce the occurrence of variations in the dielectric constant and the workability due to the change in viscosity of the insulating layer.

Further, the content of the high dielectric material added to and mixed with the inorganic insulating material or the organic insulating material is to make the relative dielectric constant of the insulating layer a large value, and the content of the high dielectric material with the inorganic insulating material or the organic insulating material. In order to prevent the decrease in the adhesive strength of the material,
It is desirable to set it to 75% by weight.

Further, each signal wiring group, power supply wiring layer or ground wiring layer is formed of, for example, tungsten (W), molybdenum (Mo), molybdenum manganese (Mo-Mn), copper (C).
u) -silver (Ag) or silver-palladium (Ag-Pd) metal powder metallization, or copper (Cu) -silver (A)
g) ・ Nickel (Ni) ・ Chromium (Cr) ・ Titanium (T
i) · It may be formed of a thin film of a metal material such as gold (Au) or niobium (Nb) or an alloy thereof.

Specifically, when each signal wiring group, power supply wiring layer or ground wiring layer is formed by metallizing W metal powder, a metal obtained by adding and mixing an appropriate organic binder, solvent or the like to W powder. The paste can be formed by printing and applying the paste on a ceramic green sheet to be an insulating layer in a predetermined pattern and firing the paste together with a laminated body of the ceramic green sheets.

When formed of a thin film of a metal material,
For example, after forming a metal film by a sputtering method, a vacuum deposition method or a plating method, a predetermined wiring pattern can be formed by a photolithography method.

In such a multilayer wiring board, the wiring width of each signal wiring group is appropriately set according to the relative permittivity of the insulating layer in which each signal wiring group is arranged. The characteristic impedance values of the signal wirings can be set to the same value.

The chip capacitor used in the multilayer wiring board of the present invention is a thick film type in which each electrode layer and dielectric layer are formed by a printing multilayer in which conductive paste or dielectric paste is applied by printing in a predetermined pattern and baked. It may be a capacitor. Further, a green sheet is used for the dielectric layer, the first electrode layer and the second electrode layer are respectively formed as conductor films on the green sheet by applying a conductive paste, and the respective green sheets are laminated and integrated. It may be a thick film type capacitor formed by a green sheet lamination method that is fired.

The electrode layer and the terminal electrode material are platinum (P
A low resistance metal material such as t), gold (Au), silver (Ag), and palladium (Pd) can be preferably used, and the material is not particularly limited as long as it is a material having a small reactivity with the dielectric layer, and a vacuum is used. It may be formed as long as it can be formed by a method such as vapor deposition and sputtering. The dielectric layer may be one having a high dielectric constant in a high frequency region, but a dielectric made of a perovskite type oxide crystal containing Pb / Mg / Nb, or other PZT / PL.
And _{ZT · BaTiO 3 · SrTiO 3 ·} Ta 2 O 5, these may be a compound obtained by substituting or adding other metal oxides, is not particularly limited.

The material of the through conductor such as a via hole conductor used for connecting the external terminal electrode and the internal electrode formed on the upper surface and the lower surface of the chip capacitor is, for example, Ag-Pd.
A conductive substance that can be formed inside the dielectric layer, such as solder or gold, may be used. The external terminal electrodes formed on the upper surface and the lower surface of the chip capacitor so as to cover the entire end surface are formed by screen printing such as Ag-Pd. The terminal electrodes of the chip capacitor configured as described above are connected to the power supply wiring and the ground wiring by using a solder paste or a paste in which a conductor powder such as Ag-Pd is mixed with an organic resin.

As an example of incorporating the chip capacitor in the multilayer wiring board, a structure as proposed in, for example, Japanese Patent Laid-Open No. 11-220262 can be adopted. According to this method, a plate-shaped body in which an active element such as a chip capacitor is embedded in a thermosetting resin and a plurality of plate-shaped bodies made of another thermosetting resin are heated and laminated to easily form a chip. A capacitor can be built in.

The present invention is not limited to the examples of the above-mentioned embodiments, and various modifications can be made without departing from the gist of the present invention. For example, the invention may be applied to a case where three or more signal wiring groups are formed between different insulating layers. Further, the number of built-in capacitors formed in the multilayer wiring board may be two or more.
Further, the shape of the pattern of the power supply wiring layer or the ground wiring layer may be a so-called mesh pattern shape having a large number of openings.

[0046]

According to the multilayer wiring board of the present invention, the power supply wiring layer and the ground wiring layer are formed inside the insulating substrate formed by laminating a plurality of insulating layers so as to face each other with the insulating layer interposed therebetween. In addition to having a built-in capacitor, the chip capacitor is built in the insulating layer between the power supply wiring layer and the ground wiring layer that form the built-in capacitor, and one terminal electrode of the chip capacitor is in the power supply wiring layer and the other terminal electrode is Since it is connected to the ground wiring layer, the through conductors such as via holes used to connect the chip capacitor and the power wiring layer and the ground wiring layer that form the built-in capacitor in the conventional multilayer wiring board are not required. Since the inductance component can be reduced, the occurrence of simultaneous switching noise and EMI noise is small even in high frequency operation of 1 GHz or higher, To generate malfunctions in electronic equipment of telecommunications equipment such as it is possible to multi-layer wiring substrate never become.

In the chip capacitor incorporated in the multilayer wiring board of the present invention, one terminal electrode of the chip capacitor is connected to the power supply wiring layer and the other terminal electrode is connected to the ground wiring layer. First electrode layer and second
And the electrode layers of are alternately laminated with a dielectric layer in between,
External connection terminals that cover the entire end surface are provided on the upper and lower end surfaces of the chip capacitor, and one of the external connection terminals is connected to the first electrode layer and the other to the second electrode layer via through conductors, respectively. Therefore, the chip capacitor can be built in the multilayer wiring board without being connected by the through conductor, and simultaneous switching noise due to the inductance component of the through conductor can be reduced.

Further, according to the multilayer wiring board of the present invention,
By arranging multiple chip capacitors around the built-in capacitor, it is possible to suppress the reflection of electromagnetic waves due to the mismatch of the characteristic impedance generated at the end of the built-in capacitor when the semiconductor element operates, and It is possible to suppress the reflection of electromagnetic waves in the above and to suppress the generation of EMI noise due to ground bounce.

As a result, according to the present invention, it is possible to reduce both simultaneous switching noise and EMI noise, and a multilayer wiring board suitable for an electronic circuit board or the like on which electronic parts such as semiconductor elements operating at high speed are mounted. Could be provided.

[Brief description of drawings]

FIG. 1 is a sectional view showing an example of an embodiment of a multilayer wiring board of the present invention.

FIG. 2 is a cross-sectional view of essential parts showing an example of an embodiment of a multilayer wiring board of the present invention.

FIG. 3 is a sectional view showing an example of an embodiment of a chip capacitor in a multilayer wiring board of the present invention.

FIG. 4 is a plan view showing another example of the embodiment of the multilayer wiring board of the present invention.

[Explanation of symbols]

1 ... Multilayer wiring board 2, 32, 42 ... Insulating substrate 2a to 2e, 32a to 32e ... Insulating layer 4, 5, 44 ... Power wiring layer or ground wiring layer 6,46,71 ・ ・ ・ Chip capacitors 7 ... External electrode 8 ... Electrode for connecting semiconductor element 9 ... Semiconductor element 10 ... Conductor bump 61 ... External electrodes for power supply wiring 63 ... Power wiring layer 62: Via hole for power supply wiring 65 ・ ・ ・ Semiconductor element connection electrode for power supply wiring 66 ... External electrode for ground wiring 67 ... Via hole for ground wiring 68: Ground wiring layer 70 ・ ・ ・ Semiconductor element connection electrode for ground wiring 72, 76 ... Terminals for external connection 74, 75 ... First electrode layer 78, 79 ... Second electrode layer 73, 77 ... Through conductor

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) H05K 1/18 H01L 23/12 BF term (reference) 5E336 AA04 AA08 AA16 BB03 BC26 CC32 CC43 CC53 GG11 5E338 AA03 BB19 BB75 CC04 CC06 CC10 EE13 EE14 5E346 AA04 AA06 AA12 AA13 AA15 AA32 AA33 AA43 AA51 BB03 BB04 BB07 BB11 BB16 BB20 FF45 HH01 HH04 HH06

Claims (3)

[Claims] 1. A power supply wiring is provided which has an internal capacitor formed by arranging a power supply wiring layer and a ground wiring layer facing each other with the insulating layer sandwiched therebetween, in an insulating substrate formed by laminating a plurality of insulating layers. A chip capacitor is built in the insulating layer between the layer and the ground wiring layer, and one terminal electrode of the chip capacitor is connected to the power wiring layer and the other terminal electrode is connected to the ground wiring layer. A multilayer wiring board characterized by the above. 2. The chip capacitor is formed by alternately stacking a first electrode layer and a second electrode layer with a dielectric layer interposed therebetween, and upper and lower end faces are provided with external connection terminals covering the entire end face. And one of the external connection terminals is the first electrode layer,
The multilayer wiring board according to claim 1, wherein the other is connected to the second electrode layer through a through conductor. 3. The multilayer wiring board according to claim 1, wherein a plurality of the chip capacitors are arranged around the built-in capacitor.