JP3371149B2 - Method for manufacturing semiconductor device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the manufacture of semiconductor devices.
Regarding the method . INDUSTRIAL APPLICABILITY The present invention can be used for various semiconductor devices such as a silicon-based semiconductor device having a polycide structure.

In recent years, in the field of semiconductor devices, integration has been further advanced, and, for example, ultra LSIs have been miniaturized, and requirements for fine processing technology have become more and more severe. For example, with regard to gate processing using Si-based materials such as Poly-Si, development of a process that achieves both anisotropy and a high selection ratio is strongly desired.

In order to obtain a high selection ratio, it is necessary to use high density plasma and perform overetching with low ion energy. However, for example, as shown in FIG. 5, the underlying SiO ₂ 60 on the Si substrate 59, n
⁺ PolySi61, when performing high-density plasma treatment for silicide (WSi _x) 62 to form a resist mask 64 on the structure, the base insulating film 60 (SiO ₂₎ is
The damage layer D is formed by this plasma irradiation (FIG. 6). FIG. 7 shows a state in which the resist mask 64 has been removed. Most of the damaged layer D is removed at the same time when the LDD forming sidewall (SiO ₂ ) 67 is etched, but as shown in FIG. 8, the damaged layer D is formed below the LDD of the gate polycides 61 and 62. Will remain. For this reason, there is a concern about acid deterioration between the gate polycide and the upper wiring 9 in this portion (see FIG. 8).

Therefore, in such a case, a technique for removing the damaged layer before forming the LDD is desired.

As described above, a technique for removing a damaged layer from the base during dry etching is desired in other situations.

On the other hand, there are the following problems. In etching a Si-based material layer using a bromine-based gas or a chlorine-based gas, for example, a hydrogen bromide-based gas, a reaction product of a photoresist and Br or Si is used as a means for achieving anisotropy.
The side wall protection is performed using the reaction product of Br and Br.
Further, since the selectivity to the underlayer is prioritized during overetching, the anisotropy, which has a trade-off relationship with the underlayer selectivity, is lowered. Therefore, etching is performed using a stronger side wall protection film, for example, a SiO ₂ film, under the process conditions for compensating for the decrease in anisotropy. For example, as shown in FIG. 16, a photoresist mask 56 is used to add doped poly S
When patterning the i (n ⁺ PolySi) 53 and the WSi _x film 54, as shown in FIG. 17, the sidewall protection film 5 is formed.
Etching is performed under the condition that 7 is formed. 5 in the figure
Reference numeral 1 is a Si substrate, 52 is a gate oxide film, and 55 is an antireflection film (SiO _x N or PolySi). After the completion of the Si-based material layer etching process, the resist layer used as the etching mask is removed by ashing with oxygen plasma. At this time, since the side wall protective film used at the time of etching the Si-based material layer is also attached to the side wall of the resist layer as a mask, the side wall protective film that cannot be removed by etching by oxygen plasma is hardened by ashing, and eventually the resist layer Even after removing the ashing, it remains in a band shape. The side wall protection film 58 (FIG. 18) that cannot be removed adversely affects the flatness and the like of the interlayer film to be stacked in the subsequent steps, and therefore must be removed before stacking the interlayer film.

In the prior art, after anisotropic processing using the side wall protective film, the wafer was immersed in a hydrofluoric acid solution bath and the unnecessary side wall protective film was removed by wet etching. In addition, particles of tens of thousands level when adhered to the wafer stage adhere to the wafer, which causes a problem of contaminating the aqueous solution in the aqueous solution tank during wet etching. Further, in wet etching in which a hydrofluoric acid solution is immersed, it is feared that the fine pattern is damaged (due to water pressure), and it is difficult to control the etching amount of the thin gate oxide film with good controllability.

[0008]

SUMMARY OF THE INVENTION It is an object of the present invention to provide a technique which eliminates the above-mentioned various problems.
That is, it is an object of the present invention to provide a method for manufacturing a semiconductor device, which can completely remove a damaged layer generated during overetching and can obtain good characteristics without fear of breakdown voltage deterioration. It is another object of the present invention to provide a method for manufacturing a semiconductor device, which can satisfactorily remove an unnecessary sidewall protection film after etching by a wet process.

[0009] The present application of the invention of claim 1 is a method of manufacturing a semiconductor device having a step of patterning by dry etching on the underlying insulating film, the dry etching
Is over-etched with SF ₆ / HBr as a gas system
Under dry condition, and ground insulation by the dry etching
Wet etching the damage layer given to the film
Wet etching as well as removal by processing
The dry etching damage imparting ring
The wet etching of the insulating film material exposed to the boundary.
It corresponds to the inflection point on the time-dependent curve of the
The semiconductor device is characterized in that
A method of manufacturing a device for achieving the above object.

The invention of claim 2 of the present application is to
Has a step of pattern formation by dry etching
A method of manufacturing a semiconductor device, comprising:
Is the main etching using Cl ₂ / O ₂ as a gas system.
And by over-etching using HBr / O ₂ as a gas system
And apply it to the underlying insulating film by the dry etching.
The damaged layer is processed by wet etching.
And remove the pattern by the dry etching.
Removal of the sidewall protection film on the patterned sidewall after formation.
Are simultaneously performed by the wet etching, and
The processing time of the wet etching is set to the sidewall protection.
The time required to remove the protective film and the time required to remove the damaged layer
Half of the time is set to the longer one
A method for manufacturing a conductor device , which achieves the above object.

According to the invention of claim 3 of the present application , an insulation is provided on a substrate.
Form the gate material through the film and shape the silicide
And a laminated film composed of the gate material and silicide is formed.
Zuma etching and patterning are performed.
The insulating film at the time of over etching.
The damage layer given to the plasma by dilute hydrofluoric acid
Removed and formed sidewall to have LDD structure
A semiconductor device according to claim 1, wherein a semiconductor device is obtained.
A manufacturing method for achieving the above object.

According to the invention of claim 4 of the present application, in the method of manufacturing a semiconductor device, the method comprises a step of forming a pattern on a base by dry etching to obtain a semiconductor device having a gate electrode having a polycide structure. , Cl ₂ / O ₂ gas-based etching, and HBr
/ O ₂ was carried out continuously in overetching was gas system, the removal of the sidewall protective film for sidewall after forming said patterned by dry etching, performs with a spray spin cleaning device, it 1:10
Using diluted dilute hydrofluoric acid solution of 0 (HF: pure water) or less
The amount of etching of the gate oxide film is controlled with good controllability.
And recover and circulate the diluted hydrofluoric acid solution used for post-treatment
Do not discard it by discarding it
A method for manufacturing a semiconductor device, which is characterized in that it is prevented from being mixed into the semiconductor device, thereby achieving the above object.

The invention according to claim 5 of the present application is O ₂ plasma.
Side wall protection before resist mask ashing removal
The semiconductor according to claim 4, wherein the film is removed.
A method for manufacturing a device , which achieves the above object.

[0014] The invention of claim 6 of the present application, Dora on a base
B. It has a process to form a pattern by etching.
Obtaining a semiconductor device having a gate electrode having a sidewall structure
In the method for manufacturing a conductor device, the dry etching
Is an etching process using Cl ₂ / O ₂ gas, and HBr
/ O ₂ gas-based overetching
The pattern formed by the dry etching
After the formation, the side wall protective film on the pattern side wall is removed by spraying.
While using a spin cleaning device, 1.0 to 2.0
Side wall protection using cleaning with pure water with a low frequency of MHz
A method of manufacturing a semiconductor device, characterized in that a protective film is removed , thereby achieving the above object.

The invention of claim 7 of the present application is the O ₂ plasma.
Side wall protection before resist mask ashing removal
The method of manufacturing a semiconductor device according to claim 6 , wherein the film is removed, and the above object is achieved thereby.

The invention of claim 8 of the present application is 1: 100.
(HF: pure water)
Control of the etching amount of the oxide film
The method for manufacturing a semiconductor device according to claim 6 or 7 , wherein the above object is achieved.

The invention of claim 9 of the present application is used for post-processing.
By discarding the diluted aqueous solution of hydrofluoric acid, which is not circulated,
A method for preventing dust on the back surface of a wafer from mixing into a chemical solution.
8. A method of manufacturing a semiconductor device according to 8 , wherein the above object is achieved.

The invention according to claim 10 of the present application is the base insulating film.
There is a step of pattern formation by dry etching on top
A method of manufacturing a semiconductor device, comprising:
For etching, SF ₆ / HBr is used as a gas system and overetched.
Under the etching conditions, and the dry etching is used to
Wet etching of the damage layer given to the insulating film
Wet etching
Processing by the coating, with the damage of the dry etching
The wet etching of an insulating film material exposed to a given environment
The inflection point of the etching rate change curve
Damaged layer removal process with corresponding time as processing time
And a pattern formed by the dry etching
After the formation, the side wall protective film on the pattern side wall is removed by spraying.
And a step of using a spin cleaning device.
And a method for manufacturing a semiconductor device , which achieves the above object. Claim 1 of the present application
The invention of No. 1 uses a silicide as a gate material on the insulating film.
A semiconductor device having a laminated film formed of
Pattern is formed on the underlying insulating film by dry etching.
In the method for manufacturing a semiconductor device, which includes the steps of:
The dry etching is performed using SF ₆ / HBr as a gas system.
The bar etching conditions are used, and the dry etching is performed.
Wet etch the damaged layer given to the base insulating film.
It is removed by the treatment by ching, and the
Process by dry etching.
The wet etching of the insulating film material exposed to the image-giving environment.
Of the etching rate of the etching
The processing time is the time corresponding to the inflection point,
The thickness of the insulating film below the laminated film is larger than that of the laminated film.
The laminated film is thicker than the thickness of the insulating film in the outer part
The part of the insulating film other than
That the damage layer caused by the given damage has been removed
Thinner than the thickness of the insulating film below the laminated film
Of a semiconductor device, characterized in that
A manufacturing method for achieving the above object.

[0019]

Embodiments of the present invention will be described below with reference to the drawings. Of course, the present invention is not limited to the embodiments.

Example 1 In this example, the present invention was applied when manufacturing a semiconductor device including a step of dry etching a gate material. In particular, by performing a dilute hydrofluoric acid treatment to remove the damaged layer, the underlying Si after etching treatment is performed.
It is possible to obtain good transistor characteristics such as deterioration of breakdown voltage due to the O ₂ damage layer.

In this embodiment, the sample to be etched is the W-polycide sample as shown in FIG. 1 (a). This is a gate oxide film 60 on the substrate 59.
The after 100nm formed by thermal oxidation, the polysilicon 61 which is the gate material (n ⁺ -Poly-Si) and a silicide 62 (WSi _x), respectively using a CVD 100
The gate pattern is formed by further stacking the layers by nm and further using the photoresist 64. Now, this sample is etched under the following conditions using a magnetic field μ wave etching device. Gas system: SF ₆ / HBr = 30 / 20SCCM Pressure: 1 Pa μ wave: 250 mA RF bias: 30 W (2 MHz) Wafer temperature: −50 ° C.

Under these conditions, the overetching amount is 50
%.

At this time, the portion of the underlying SiO _{2 layer} 60 exposed to the high-density plasma during the over-etching is shown in FIG.
A damage layer D is formed as shown in (b).

Therefore, 100: 1 immediately after the etching.
The damaged layer D was completely removed by immersing in the dilute hydrofluoric acid solution for 10 seconds (FIG. 1C).

The relationship between the HF treatment time and the SiO ₂ etching amount is as shown in FIG. That is, it has been confirmed that the etching rate is high in the initial stage of etching. As a result, the damage layer (the part with a high etching rate) is several nm near the SiO ₂ surface.
Since it can be seen that the HF is formed, it is desirable to set the HF processing time such that this portion disappears (that is, the etching rate stabilizes). That is, this wet etching process for removing the damaged layer should be performed for a processing time corresponding to the inflection point of the time-dependent curve of the etching rate of the wet etching of the insulating film material exposed to the damage giving environment (plasma processing). preferable.

FIG. 3A shows a state in which ashing is performed after the HF treatment. After that, SiO ₂ CVD and etch back are performed to form a sample after LDD formation (see FIG.
In (b), the damage layer of SiO ₂ has been eliminated, and good transistor characteristics having no problems with breakdown voltage and leakage could be obtained (in the figure, 67 is a sidewall for LDD formation).

Example 2 In this example, the removal of the SiO ₂ side wall protective film remaining after etching and the removal of the damaged layer shown in Example 1 were carried out at the same time. The same sample and etching device as in Example 1 were used, and etching was performed under the following conditions. Main etching gas system: Cl ₂ / O ₂ = 45/5 SCCM pressure: 1 Pa μ wave: 250 mA RF: 30 W Wafer temperature: 30 ° C. (just etching) Over etching HBr / O ₂ = 45/5 SCCM pressure: 1 Pa μ wave: 250 mA RF: 15W Wafer temperature: 30 ° C. (over-etching 100%) When etching is performed using a bromine-based gas system (or chlorine-based gas system), the resist sidewall and the W-polycide sidewall are coated with SiO ₂ -based material. The protective film 57 is formed (FIG. 4A). Since this cannot be removed by the ashing process, a wet treatment with HF is required. The sidewall protective film can be removed with the same HF concentration as in the first embodiment.

Further, since the formation of the damaged layer D occurs in the same manner as in the first embodiment, the HF treatment is also necessary for this removal.

Therefore, by setting the HF treatment time after etching to the longer time of the time required to remove the side wall protective film and the time required to remove the damaged layer, it is possible to perform these simultaneously. As a result, as shown in FIG. 4B, the side wall protective film 57 is removed and the damage layer D is removed.
It was possible to obtain a good structure in which

Example 3 In this example, during dry etching of a gate electrode having a W polycide structure, a side wall protective film made of a reaction product adhering to the side wall of the resist mask and the gate electrode was sprayed before ashing removal of the photoresist. It was configured to be removed by using a spin cleaning device.

FIG. 9 shows the spray type spin cleaning apparatus used in this embodiment. In FIG. 9, reference numeral 1 is a wafer loading cassette, 2 is a wafer unloading cassette, 3 is an uncleaned wafer, 4 is a cleaned wafer, 5 is a cassette vertical movement stage, 6 is a slide valve (vertical movement), 7 Is a transfer chamber cover, 8 is a partition wall, 9 is a wafer transfer arm, 10 is a transfer robot rotary shaft, 11 is a cleaning chamber dome cover, 12 is a spray nozzle for supplying an HF aqueous solution, 13 is a spray nozzle for supplying pure water, and 14 is a spray nozzle. Is a spray nozzle for backside cleaning of wafer, 15 is a spray nozzle for supplying pure water, 16 is a spray nozzle for supplying pure water for ultrasonic cleaning, 17 is a spray nozzle for cleaning backside of wafer, 18
Is a spin rotary shaft, 19 is a grip for holding a wafer point contact, 20 is a wafer being treated with an HF aqueous solution, 21 is a wafer being cleaned and dried with pure water, 22 is a drain port (drainage port), 23 is a transfer chamber, and 24 is a chemical solution. A processing cleaning room, 25 is a cleaning / drying room.

The semiconductor wafer is processed by the chemical solution treatment from the wafer loading cassette 1 via the wafer transfer arm 9.
It is conveyed to the cleaning chamber 24, and is subjected to a light etching process with 1: 100 (HF: H ₂ O) dilute hydrofluoric acid and a pure water cleaning process for removing the chemical solution. After that, the water on the semiconductor wafer and the back surface are once spun off by spin rotation to be dried, and then transferred to the pure water cleaning / drying chamber via the wafer transfer arm 9, and again left as a final finishing process by careful cleaning with pure water. Dilute hydrofluoric acid is removed from the wafer, dried by high-speed spin rotation, and then transferred to the wafer unloading cassette 2.

In this embodiment, dilute hydrofluoric acid is used to secure controllability during wet processing, but the apparatus system shown in FIG. 10 was used here. In FIG. 10, reference numeral 26 is a primary side (factory side) deionized water supply line, 27 is a primary side (factory side) hydrofluoric acid supply line, 28 is an air operation valve, 29 is a minute flow rate shot pump, and 30 is circulation / sending. Pump, 31 is an overflow type pure water measuring tank, 32 is an overflow type hydrofluoric acid measuring tank, 33 is pure water, a chemical liquid measuring device section,
34 is an overflow receiver, 35 is a chemical liquid mixing supply tank, 3
6 is a chemical solution temperature control heater, 39 is a spray nozzle for supplying a hydrofluoric acid aqueous solution, 40 is a spray nozzle for supplying pure water, 41 is a processing wafer, 42 is a point contact type wafer holding grip,
43 is a spin rotation shaft, and 44 is a spray nozzle horizontal direction scanning mechanism. That is, the apparatus of FIG. 10 is a system in which a metering device 33 for accurately adjusting dilute hydrofluoric acid and a supply tank 35 for supplying a chemical solution to a spray-type spin cleaning chamber 38 are connected, which enables cleaning with good controllability. You can do it.

FIG. 1 shows a spray type spin cleaning device.
The one whose conceptual diagram is shown in FIG. In FIG. 11, 45 is a semiconductor wafer, 46 is a wafer fixing gripper, 4
7 is a gripper support arm, 48 is a rotating shaft, 49
Is a chemical liquid (pure water) spray (with a scanning mechanism), and 50 is a chemical liquid (pure water) back surface cleaning spray. As described above, according to the spray type spin cleaning apparatus, since the peripheral portion of the wafer is held in point contact with the gripper 46, the front surface and the back surface of the semiconductor wafer 45 can be simultaneously subjected to wet processing (cleaning, chemical solution, and drying processing). Therefore, the process can be performed without being affected by the dust on the back surface of the wafer attached from the wafer stage during the dry etching.

A process flow for processing the gate electrode using the above-mentioned spray type spin cleaning apparatus will be described below.

First, as shown in FIG. 12, a Si wafer substrate is thermally oxidized by a batch type thermal diffusion furnace to form a gate oxide film 60 on the Si substrate 59. The thickness of the gate oxide film is, for example, 10 nm, and n ⁺ Po is formed on the gate oxide film.
Ly-Si is formed into a film, for example, with a thickness of 100 nm by an LP CVD apparatus. The film forming conditions at this time are shown below. Gas system: SiH ₄ = 400 SCCM, PH ₃ (SiH ₄ base 0.5%) = 100 SCCM Pressure: 40 Pa (300 mTorr) Temperature: 550 ° C.

Next, a WSi _x film, for example, 100 nm thick is formed on the gate oxide film and n ⁺ PolySi. The film forming conditions at this time are shown below. Gas system: SiH ₄ = 1000SCCM, WF ₆ = 10S
CCM pressure: 26.6 Pa (200 mTorr) temperature: 360 ° C.

Gate oxide film 60, lower layer n ⁺ PolySi
After forming the layer 61 and the WSi _x layer 62, a PolySi layer or a SiO _x N layer 63 is formed as an antireflection film at the time of forming a photoresist mask pattern. Pol for anti-reflection film
The conditions for forming a ySi layer of, for example, 11 nm are shown below (the apparatus used LP CVD). Gas system: SiH ₄ = 400 SCCM to 500 SCCM Pressure: 40 Pa (300 mTorr) Temperature: 550 ° C. Next, a resist layer for pattern formation on the antireflection film 63,
For example, a positive mold is formed, exposed to light, electrons, or X-rays, and then developed. Thereby, the photoresist pattern 64 is formed. Subsequently, in the ECR plasma etching apparatus, the antireflection film 63, the WSi _x layer 62, and the n ⁺ PolySi layer 60 are dry-etched under the following conditions. Gas system: Cl ₂ / O ₂ = 74 / 6SCCM RF bias: 70 W (2 MHz) Pressure: 0.67 Pa μ Wave power: 800 W (2.45 GHz) Stage temperature: 20 ° C. Further, under the following conditions as overetching of the step portion Continuously etch. Gas system: HBr / O ₂ = 120 / 4SCCM RF bias: 55 W (2 MHz) Pressure: 1.3 Pa μ Wave power: 800 W (2.45 GHz) Stage temperature: 20 ° C.

[0039] Thus, as shown in FIG. 13 WSi _x
The layer 62 and the n ⁺ PolySi layer 61 are anisotropically processed.
At this time, a reaction product generated during etching, such as S
iO _x , SiO _x Br _y , SiBr _x , WBr _x, etc. adhere to the side walls of the resist mask and the side walls of the gate electrode as the side wall protection film 65.

After the anisotropic processing using the side wall protective film of the W polycide layer, the unnecessary photoresist mask is removed by O ₂ plasma. As a result, the side wall protective film is heated by ashing (-) as shown in FIG. 250 ° C) and oxygen cures. Therefore, even after the post-treatment process with dilute hydrofluoric acid, the sidewall protection film cannot be removed as shown in FIG.

Therefore, in this embodiment, as shown in FIG. 14, the side wall protective film is removed before the ashing by using the spray type spin cleaning apparatus shown in detail in FIGS. 9, 10 and 11. . The post-treatment conditions are shown below. Step 1: (1: 100) dilute hydrofluoric acid solution spray nozzle pressure = 1.47 × 10 ⁵ Pa (1.5 kgf / c)
m ² ) Step 2: Pure water spray nozzle pressure = 1.47 × 10
⁵ Pa (same condition for back side spray nozzle) Spin rotation speed = 500 rpm Processing time = 30 sec (Steps 1 and 2 are chemical treatment chambers (reference numeral 2 in FIG. 9).
4) Continuous treatment) Step 3 (drying): Spin rotation speed = 1500 rpm
(The processing chamber is the same as in step 1 and step 2) Processing time = 10 sec Step 4 (finish cleaning): Pure water spray nozzle pressure =
1.47 × 10 ⁵ Pa (same for the back side) Spin rotation speed = 500 rpm Processing time = 60 sec Step 5 (finish drying): Spin rotation speed = 2500 r
pm processing time = 60 sec (Steps 4 and 5 are continuous processing in the cleaning / drying chamber (reference numeral 25 in FIG. 9))

Finally, the photoresist mask is removed by ashing by O ₂ plasma ashing to obtain the structure shown in FIG.

Example 4 The W polycide film was formed and dry-etched in the same manner as in Example 3 as shown in FIGS. In this embodiment, in order to improve the controllability of the residual film of the gate oxide film after etching and post-treatment, 200: 1 (H ₂ O: H
The processing conditions of the spray type spin cleaning apparatus when the dilute hydrofluoric acid solution of F) is used are shown below. Step 1: 1: 200 (HF: H ₂ O) dilute hydrofluoric acid solution spray nozzle pressure = 1.47 × 10 ⁵ Pa (1.5 kgf / c)
m ² ) Chemical solution temperature = 20 ° (± 2 ° C.) Spin rotation speed = 500 rpm Processing time = 40 sec Step 2: Pure water spray nozzle pressure = 1.47 × 10 ⁵ Pa (1.
5 kgf / cm ² ) Spin rotation speed = 500 rpm (same for back side) Processing time = 30 sec Step 3 (drying): Spin rotation speed = 1500 rpm Processing time = 10 sec (Step 1, Step 2 and Step 3 are chemical treatment chambers (see FIG. 9) No. 24) for continuous treatment) Step 4 (finish cleaning): 1.5 MHz ultrasonic pure water spray nozzle pressure = 1.47
× 10 ⁵ Pa Back surface pure water spray nozzle pressure = 1.47 × 10 ⁵ Pa Spin rotation speed = 500 rpm Processing time = 60 sec Step 5 (finish drying): Spin rotation speed = 2500 rpm Processing time = 60 sec (Steps 4 and 5 are Washing / drying room (2 in FIG. 9)
5) continuous processing)

Finally, as in Example 3, O ₂ plasma
The photoresist mask is removed by ashing to obtain the structure shown in FIG.

Example 5 In this example, the damaged layer D was wet-removed in the same manner as in Example 1, and the side wall protective film was washed with the spray type spin cleaning apparatus in the same configuration as in Examples 2 and 3. Thereby, good removal of the damage layer D and cleaning of the side wall protective film could be achieved.

[0046]

According to the present invention, it is possible to completely remove a damaged layer generated during overetching.
However, it is possible to obtain good characteristics without concern such as deterioration in pressure resistance.
A method for manufacturing a semiconductor device can be provided. Further, it is possible to provide a method for manufacturing a semiconductor device, which is capable of satisfactorily removing an unnecessary side wall protective film after etching by wet processing.

[Brief description of drawings]

FIG. 1 is a diagram showing a process of Example 1.

FIG. 2 is a diagram showing a relationship between a wet processing time and an etching time of a processed portion in Example 1.

3 is a diagram showing a structure obtained in Example 1. FIG.

FIG. 4 is a diagram showing a process of Example 2.

FIG. 5 shows a prior art process (1).

FIG. 6 shows a prior art process (2).

FIG. 7 shows a prior art process (3).

FIG. 8 shows a prior art process (4).

FIG. 9 is a cross-sectional configuration diagram of a spray-type spin cleaning device used in Example 3.

FIG. 10 is a system diagram of a spray-type spin cleaning device used in Example 3.

FIG. 11 is a configuration diagram of a spray-type spin cleaning unit according to a third embodiment.

FIG. 12 is a diagram showing a configuration of a substrate to be processed in Example 3 (1).

FIG. 13 is a diagram showing the configuration of a substrate to be processed in Example 3 (2).

FIG. 14 is a diagram showing the configuration of a substrate to be processed in Example 3 (3).

FIG. 15 is a diagram showing a configuration of a substrate to be processed in Example 3 (4).

FIG. 16 shows a conventional technique (1).

FIG. 17 shows a conventional technique (2).

FIG. 18 shows a conventional technique (3).

FIG. 19 shows prior art (4).

[Explanation of symbols]

D damage layer

─────────────────────────────────────────────────── ─── Continuation of the front page (56) Reference JP-A-4-242927 (JP, A) JP-A-2-125425 (JP, A) JP-A-4-96329 (JP, A) JP-A-3- 30432 (JP, A) JP 4-79324 (JP, A) JP 2-219231 (JP, A) JP 4-206817 (JP, A) JP 64-7564 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) H01L 21/3065 H01L 21/306

Claims (11)

(57) [Claims] 1. A method of manufacturing a semiconductor device, comprising a step of forming a pattern on a base insulating film by dry etching, wherein the dry etching is performed under over-etching conditions using SF ₆ / HBr as a gas system, and the dry etching is performed to form a base film. The damage layer given to the insulating film is removed by the wet etching process, and the wet etching process is performed to remove the damaged layer from the dry etching process. A method of manufacturing a semiconductor device, wherein the processing time is a time corresponding to the inflection point. 2. A method of manufacturing a semiconductor device, which comprises a step of forming a pattern on a base insulating film by dry etching, wherein the dry etching comprises main etching using Cl ₂ / O ₂ as a gas system and HBr / O ₂ The etching is performed by gas-based overetching, and the damaged layer given to the base insulating film by the dry etching is removed by a process by wet etching, and the side wall protective film of the pattern side wall after the pattern formed by the dry etching is formed. The removal is performed by the wet etching at the same time, and the treatment time by the wet etching is set to the longer one of the time required to remove the sidewall protective film and the time required to remove the damaged layer. A method for manufacturing a semiconductor device, comprising: 3. A gate material is formed on a substrate via an insulating film, silicide is further formed, and a laminated film made of the gate material and the silicide is plasma-etched and patterned, and at this time, over-etching is performed. 3. The method of manufacturing a semiconductor device according to claim 1, wherein a damage layer given to the insulating film by plasma at the time of overetching is removed by diluted hydrofluoric acid to form a sidewall to obtain a semiconductor device having an LDD structure. 4. A method of manufacturing a semiconductor device, comprising a step of forming a pattern on a base by dry etching to obtain a semiconductor device having a gate electrode having a polycide structure, wherein the dry etching uses Cl ₂ / O ₂ gas. System-based etching and HBr / O ₂ gas-based over-etching are continuously performed to remove the side wall protective film on the side wall of the pattern formed by the dry etching. Do this with 1: 100
(HF: pure water)
The etching amount of the oxide film is controlled with good controllability.
In addition, do not recover and circulate the diluted hydrofluoric acid solution used for the post-treatment.
The dust on the backside of the wafer
A method for manufacturing a semiconductor device, which is characterized by preventing mixture . 5. The method of manufacturing a semiconductor device according to claim 4, wherein the sidewall protection film is removed before the ashing removal of the resist mask by O ₂ plasma. 6. A gate electrode having a polycide structure having a step of forming a pattern on a base by dry etching.
In the method of manufacturing a semiconductor device, the dry etching is performed using Cl ₂ / O ₂ as a gas system.
Etching and over-gas using HBr / O ₂ as gas system
Performed in succession etching, removal of the sidewall protective film for sidewall after forming the patterned by the dry etching, performs with a spray spin cleaning device, a low frequency 1.0~2.0MHz Clean with added pure water
A method of manufacturing a semiconductor device, characterized in that the sidewall protection film is removed together . 7. A resist mask assembly using O ₂ plasma.
It is characterized in that the side wall protective film is removed before the sing removal.
The method for manufacturing a semiconductor device according to claim 6 , wherein 8. A diluted rare earth of 1: 100 (HF: pure water) or less.
Controlling the amount of etching of the gate oxide film using hydrofluoric acid solution
8. The method for manufacturing a semiconductor device according to claim 6 , wherein the method is suppressed with good properties . 9. A dilute aqueous solution of hydrofluoric acid used for post-treatment is recycled.
Do not discard it by discarding it
The method of manufacturing a semiconductor device according to claim 8 , wherein the semiconductor device is prevented from being mixed into the semiconductor device. 10. A method of manufacturing a semiconductor device, comprising a step of forming a pattern on a base insulating film by dry etching, wherein the dry etching is performed under an over-etching condition using SF ₆ / HBr as a gas system, and the dry etching is performed to form a base film. The damage layer given to the insulating film is removed by the wet etching process, and the wet etching process is performed to remove the damaged layer from the dry etching process. A step of removing a damage layer using a time corresponding to the inflection point in step S2 and a step of removing the side wall protective film on the side wall of the pattern formed by dry etching and using a spray spin cleaning apparatus. With The method of manufacturing a semiconductor device which is characterized in that. 11. A method of manufacturing a semiconductor device, comprising a laminated film made of a silicide and a gate material formed on an insulating film, the method including a step of forming a pattern on a base insulating film by dry etching. The dry etching is performed under over-etching conditions using SF ₆ / HBr as a gas system, and the damaged layer given to the base insulating film by the dry etching is removed by a wet etching process, and the wet etching process is performed. The processing time is the time corresponding to the inflection point in the time-dependent curve of the etching rate of the wet etching of the insulating film material exposed to the damage-providing environment of the dry etching. The film thickness of the part other than where the laminated film exists The insulating film is thicker than the film thickness of the insulating film, and the insulating film in a portion other than where the laminated film is present is a film of the insulating film below the laminated film by removing a damaged layer due to damage given to the insulating film during etching. A method of manufacturing a semiconductor device, comprising obtaining a semiconductor device which is thinner than the thickness.