JP3323190B2 - Dry etching method, method of manufacturing semiconductor device, and dry etching apparatus - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for dry-etching a member containing silicon, a method for manufacturing a semiconductor device using the dry-etching method, and a dry-etching apparatus for performing the dry-etching method.

[0002]

2. Description of the Related Art In the manufacture of a semiconductor device, when dry etching is performed on a member containing silicon (hereinafter, silicon-containing member) in order to miniaturize and increase the precision of a semiconductor element, inductively coupled plasma etching is performed. A dual-power-supply dry etching apparatus such as an apparatus (ICP) is used. The dual power supply type dry etching apparatus is characterized by a first power (hereinafter, referred to as a source power) for generating plasma composed of a process gas introduced into a chamber and controlling the plasma density, and a plasma. The second power (hereinafter referred to as bias power) for drawing ions (etching species) therein into the object to be etched can be applied while being separately controlled.
For this reason, a highly accurate processing characteristic can be obtained by using a dual power supply type dry etching apparatus. In general, in a dual-power-supply dry etching apparatus, source power is applied to a coil or the like provided on the outer wall of the chamber, and bias power is provided in the chamber for mounting an object to be etched. Applied to the sample stage.

Conventionally, in a step of forming an element isolation on a silicon substrate, an LO is formed by locally oxidizing the silicon substrate using a nitride film as a mask.
The COS (Local Oxidation of Silicon) method has been used. However, when the LOCOS method is used, as the miniaturization progresses, the separation dimension becomes larger than a desired dimension,
As a result, there has been a problem that it is difficult to secure an active region. Therefore, after forming a groove in the silicon substrate, an oxide film is buried in the groove, and then the surface of the silicon substrate including the surface of the oxide film is subjected to CMP (Chemical Mechanical Polishing).
An STI (Shallow Trench isolation) method for forming an element isolation by flattening by a shing method has come to be used. At this time, the above-described dual-power-supply dry etching apparatus is used to form the element isolation groove.

A conventional method for manufacturing a semiconductor device, specifically, a method for forming an element isolation groove by etching a silicon substrate using a dual power supply type dry etching apparatus will be described with reference to the drawings. I will explain while.

FIGS. 11A to 11D are cross-sectional views showing steps of a conventional method for manufacturing a semiconductor device.

First, as shown in FIG. 11A, a first silicon oxide film 81 is formed on a silicon substrate 80 by thermal oxidation.
Is formed, a silicon nitride film 82 is formed on the first silicon oxide film 81 using a film forming method such as a CVD method, and then, on the silicon nitride film 82, a photolithographic method is used to form an element isolation region. A resist pattern 83 having an opening is formed.

Next, as shown in FIG. 11B, dry etching is performed on the silicon nitride film 82 and the first silicon oxide film 81 by using the resist pattern 83 as a mask to form the silicon nitride film 82 and the first silicon oxide film 81. Are patterned respectively. After removing the resist pattern 83 by ashing, the silicon substrate 80 is washed.

Next, as shown in FIG. 11C, dry etching is performed on the silicon substrate 80 using the patterned silicon nitride film 82 as a mask to form an element isolation groove 84 in the silicon substrate 80. I do. Here, the dry etching step shown in FIG. 11C will be described in detail. First, a silicon substrate 80 to be etched is placed in a chamber (not shown) of a dry etching apparatus.
Is installed. Thereafter, the inside of the chamber is evacuated until a predetermined degree of vacuum is reached, and then a gas (hereinafter referred to as a process gas) required for etching the silicon substrate 80 into the chamber, specifically, Cl ₂ or H
A mixed gas of a halogen-containing gas such as Br and an oxygen gas is introduced. Then, after the application of the source power is started to generate a plasma composed of the process gas, the application of the bias power is started to draw the ions in the plasma into the silicon substrate 80. As a result, ions in the plasma react with the exposed portion of the silicon substrate 80 to form a volatile reaction product (for example, a compound of silicon and chlorine). At this time, the silicon substrate 80 is dry-etched by discharging the volatile reaction product from the chamber by evacuating the chamber. Thereafter, the silicon substrate 80 is washed to remove deposits (for example, the above-mentioned compound of a volatile reaction product and oxygen) formed during dry etching of the silicon substrate 80. As a result, an isolation groove 84 is formed in the silicon substrate 80.

In the dry etching step shown in FIG. 11 (c), a processing accuracy almost equal to that of the gate electrode is required due to miniaturization of the separation dimension.
A dry etching apparatus of a dual power supply type, for example, an inductively coupled plasma etching apparatus or the like is used.

Next, in order to reduce the surface level near the wall surface and the bottom surface of the isolation groove 84 in the silicon substrate 80, the vicinity of the wall surface and the bottom surface are thermally oxidized using an oxidation furnace. Thereafter, a second silicon oxide film 85 is deposited on the silicon nitride film 82 by a CVD method so that the element isolation trench 84 is completely filled, and then the second silicon oxide film 8 is formed.
The surface of the silicon nitride film 82 including the surface of No. 5 is flattened by the CMP method to remove the second silicon oxide film 85 outside the element isolation groove 84. Thereafter, as shown in FIG. 11D, the silicon nitride film 82 is removed by wet etching, and the silicon substrate 80 is cleaned and the first silicon oxide film 8 remaining on the surface of the silicon substrate 80 is removed.
Remove one. As a result, an element isolation composed of the second silicon oxide film 85 buried in the element isolation groove 84 is formed.

A conventional method of applying source power and bias power (hereinafter referred to as a conventional dry etching method) in a dry etching step shown in FIG. 11C using a dual power supply type dry etching apparatus and its operation. Will be described with reference to the drawings.

FIG. 12 is a diagram showing an example of a time change of the effective value of each of the source power and the bias power in the conventional dry etching method. In FIG. 12, the time when the application of the source power is started is set as a reference (0 second) of the power application time. In this specification, the effective value of the power is the square of the amount of vibration in the power actually applied to the electrode (a sample stage in the case of bias power, a coil or the like in the case of source power). Means the square root of the temporal average of

As shown in FIG. 12, the start of bias power application is delayed by one second from the start of source power application. The effective value of the source power is set to 600 W, while the effective value of the bias power is set to 200 W.

FIGS. 13A to 13C are views showing the operation of the conventional dry etching method. More specifically, FIGS.
It is a figure which shows the change of the state in the chamber of the dry etching apparatus in the dry etching process shown to (c), (a) has shown the state immediately after introducing a process gas into a chamber, (b) has shown the source. A state immediately after the start of the application of the power is shown, and (c) shows a state immediately after the start of the application of the bias power. Note that FIG.
In (a) to (c), illustration of a silicon nitride film and the like on a silicon substrate is omitted, and illustration of a sample stage and the like in a chamber is omitted.

First, as shown in FIG. 13A, after a silicon substrate 80 to be etched is set in a chamber 86 of a dry etching apparatus, the inside of the chamber 86 is evacuated until a predetermined degree of vacuum is reached. Thereafter, a process gas 87 necessary for etching the silicon substrate 80 is introduced into the chamber 86. Next, as shown in FIG. 13B, by applying a source power, a plasma 87A comprising the process gas 87 is formed.
Then, as shown in FIG. 13C, ions 88 in the plasma 87A are drawn into the silicon substrate 80 by applying a bias power.

That is, the dual-power-supply dry etching apparatus can independently control generation of plasma composed of a process gas, adjustment of the plasma density, and attraction of ions in the plasma into an object to be etched.
For this reason, in a conventional dry etching method using a dual power supply type dry etching apparatus, first, a plasma composed of a process gas is generated by applying a source power, and then ions in the plasma are etched by applying a bias power. The object to be etched is etched by being drawn into the object.

[0017]

However, when a conventional dry etching method is used to form an element isolation groove in a silicon substrate, for example, the etching stops halfway as shown in FIG. There is a problem that it becomes impossible to form an element isolation groove having a desired isolation depth. FIG. 14 shows a state where the etching is stopped halfway in the dry etching step shown in FIG. 11C. Further, in FIG. 14, FIG.
The same members as those described above are denoted by the same reference numerals.

Further, when a conventional dry etching method is used for a silicon substrate or the like as an object to be etched, a damage layer is formed on the silicon substrate or the like due to the etching, so that electrical characteristics and the like of the semiconductor device are deteriorated. The problem arises.

Further, when element isolation grooves are formed in, for example, a silicon substrate using a conventional dry etching method, in order to reduce surface states near the wall surface and bottom surface of the element isolation grooves in the silicon substrate, While it is necessary to thermally oxidize the vicinity of the wall surface and the bottom surface using an oxidation furnace, there is a problem that the use of the oxidation furnace increases the manufacturing cost of the semiconductor device.

In view of the foregoing, the present invention has been made to prevent the etching from being stopped halfway when etching a silicon-containing member using a dual power supply type dry etching apparatus. A second object is to prevent the electrical characteristics of a semiconductor device from deteriorating due to a damaged layer generated in a silicon-containing member during dry etching, and to provide an element isolation groove in a silicon substrate. It is a third object of the present invention to reduce the surface states near the wall surface and the bottom surface at low cost.

[0021]

Means for Solving the Problems In order to achieve the first object, the present inventors have examined the cause of the etching stop (see FIG. 14) in the conventional dry etching method. The following findings were obtained.

FIGS. 15 (a) to 15 (c) show how etching stops in the conventional dry etching method, specifically, the inside of the chamber of the dry etching apparatus at each timing of the dry etching step shown in FIG. 11 (c). 5A shows a state immediately after starting application of source power in a chamber into which a process gas has been introduced, and FIG. 6B shows a state immediately before starting application of bias power. The state when the application is continued is shown, and (c) shows the state immediately after the start of the application of the bias power. In FIGS. 15A to 15C, the illustration of the silicon nitride film on the silicon substrate and the like is omitted, and the illustration of the sample stage and the like in the chamber is omitted.

First, as shown in FIG. 15A, a silicon substrate 80 to be etched is placed in a chamber 86 of a dry etching apparatus, and the inside of the chamber 86 is evacuated until a predetermined degree of vacuum is reached. Then, after introducing a process gas 87 (for example, a mixed gas of a halogen-containing gas and an oxygen gas) necessary for etching the silicon substrate 80 into the chamber 86, the process gas is applied by applying a source power. A plasma 87A composed of the plasma 87 is generated.

Next, as shown in FIG. 15B, when the application of the source power is continued before the start of the application of the bias power,
Active oxygen (hereinafter, referred to as oxygen radicals) 89 is generated in the plasma 87A together with ions 88 serving as etching species. At this time, the oxygen radical 89 and the silicon substrate 8
The thinned silicon oxide film 90 is formed on the silicon substrate 80 by reacting with the exposed portion of 0.

Next, as shown in FIG. 15C, ions 88 in the plasma 87A are drawn into the silicon substrate 80 by applying a bias power. However,
A silicon oxide film 90 is formed on a silicon substrate 80 which is an object to be etched, and the etching rate of the silicon oxide film is about 100 times that of silicon.
Since it is 1/1, the etching of the silicon substrate 80 hardly progresses.

The inventors of the present application have proposed a mechanism of stopping etching in a conventional dry etching method (FIG. 15).
In order to verify (a) to (c)), two experiments described below were performed.

First, in the first experiment, in order to verify the oxidation of the surface of the silicon substrate when the application of the source power was continued before the start of the application of the bias power, the plasma generated only by the application of the source power While exposing the substrate for a certain period of time, the thickness of the silicon oxide film formed on the surface of the silicon substrate was measured. At this time, an inductively coupled plasma etching apparatus was used as a dual power supply type dry etching apparatus, and the effective values of source power and bias power were set to 600 W and 0 W, respectively. As a process gas, a mixed gas of Cl ₂ gas and O ₂ gas (pressure: 7 Pa, flow rate of Cl ₂ gas: 150 m)
1 / min, O ₂ gas flow rate: 6 ml / min).

FIG. 16 shows the results of the first experiment, specifically,
The dependence of the oxide film thickness (vertical axis) on the silicon substrate surface with the source power application time (horizontal axis) is shown.

As shown in FIG. 16, when the application of the source power was started before the start of the application of the bias power, it was found that the surface of the silicon substrate was thickly oxidized with the lapse of the application time of the source power.

Next, in the second experiment, in order to verify the relationship between the respective application start timings of the source power and the bias power and the stop of the etching on the silicon substrate, the application start timing of the source power and the application of the bias power were examined. The etching depth of the silicon substrate when dry etching was performed on the silicon substrate while changing the start timing in various ways (hereinafter, referred to as silicon shaving amount) was measured. At this time, as a sample to be subjected to the second experiment, a silicon substrate (a silicon nitride film to be a mask pattern for element isolation formation) formed by the conventional method of manufacturing a semiconductor device shown in FIGS. The silicon substrate 80) on which was formed 82 was used. In addition, the target value of the silicon shaving amount in the second experiment was set to 300 nm. In addition, while using an inductively coupled plasma etching apparatus as a dual power supply type dry etching apparatus,
The effective value of each of the source power and the bias power is 60
It was set to 0W and 200W. Further, as a process gas, a mixed gas of Cl ₂ gas and O ₂ gas (pressure: 7P)
a, Cl ₂ gas flow rate: 150 ml / min, O ₂ gas flow rate: 6 ml / min).

In the second experiment, the application start time of the source power is set as a reference time, and the application start time of the bias power is set to a delay time from the reference time (the application start time of the bias power is the application start time of the source power). If it is earlier, it takes a negative value).

FIG. 17 shows the results of the second experiment, specifically,
The dependence of the silicon shaving amount (vertical axis) on the delay time (horizontal axis) is shown.

As shown in FIG. 17, it has been found that if the application of the source power is started before the application of the bias power, the etching of the silicon substrate is stopped.
Specifically, the time from the generation of plasma by the start of source power application to the start of bias power application, that is, the time from the start of source power application to the start of etching of the silicon substrate is short. However, oxidation of the silicon substrate surface occurs, and as a result, etching of the silicon substrate stops.

From the results shown in FIGS. 16 and 17, the present inventors have found that in order to achieve the first object, that is, to prevent dry etching of the silicon-containing member from being stopped halfway. In order to do so, it has been found that it is important not to oxidize the surface of the silicon-containing member when performing dry etching on the silicon-containing member. Also, as a specific method for preventing the surface of the silicon-containing member from being oxidized, a method of starting application of bias power before starting application of source power in a dual power supply dry etching apparatus was conceived. By the way, generally, as the set value for the effective value of the applied power increases, the time required from the start of application of the power to the effective value reaching the set value becomes longer. For this reason, when the set value (second set value) for the effective value of the source power is higher than the set value (first set value) for the effective value of the bias power, at the same time as the start of the application of the bias power, or Even when the application of the source power is started before the application is started, if the effective value of the source power reaches the second set value after the effective value of the bias power reaches the first set value, The same effect as “the method of starting the application of the bias power before the start of the application of the source power” can be obtained.

Further, when etching is performed on a silicon-containing member using a dual power supply type dry etching apparatus, the present inventors use the same dual power supply type dry etching apparatus after the etching. The second object is achieved by applying source power without applying a voltage, thereby oxidizing a damaged layer formed on the silicon-containing member during etching, and then removing the oxidized damaged layer by washing the substrate. It was conceived that what can be achieved, that is, deterioration of the electrical characteristics of the semiconductor device can be prevented.

Further, the inventors of the present invention apply a source power without applying a bias power by using a dual power supply type dry etching apparatus to oxidize the vicinity of the wall surface and the bottom surface of the isolation trench in the silicon substrate. By
The present inventors have conceived that the third object can be achieved, that is, the surface level near the wall surface and the bottom surface of the isolation groove in the silicon substrate can be reduced at low cost without using an oxidation furnace.

The present invention has been made based on the findings described above. More specifically, in order to achieve the first object, the dry etching method according to the present invention comprises: It is premised on a dry etching method using a dual power supply type dry etching apparatus capable of independently controlling a source power for generating plasma and a bias power for drawing ions in the plasma into an object to be etched in a chamber. And a step of installing a substrate in which a member containing at least silicon is exposed in a chamber, a step of introducing a process gas containing at least oxygen into a chamber in which the substrate is installed, and a process gas by applying source power. Generating plasma and drawing ions in the plasma into a member by applying bias power More, and a step of performing etching with respect to member, the step of performing etching for the member, comprising the step of starting the application of the bias power before the oxidation at the surface of the member to proceed.

According to the dry etching method of the present invention,
When etching is performed on a silicon-containing member to be etched using a dual-power-supply dry etching apparatus, application of bias power is started before oxidation of the surface of the silicon-containing member proceeds. For this reason, the attraction of ions in the plasma to the silicon-containing member,
Since it is not hindered by the oxide film formed on the surface of the silicon-containing member, it is possible to reliably prevent the dry etching of the silicon-containing member from being stopped halfway.

In the dry etching method of the present invention,
Preferably, the step of etching the member includes the step of starting the application of bias power before starting the application of source power.

In this way, before the surface of the silicon-containing member is oxidized by oxygen radicals in the plasma generated by the application of the source power, ions in the plasma are reliably drawn into the silicon-containing member, whereby the silicon-containing member is drawn. The member can be reliably etched.

In the dry etching method of the present invention,
The step of performing etching on the member includes the step of applying source power and bias power so that the effective value of source power reaches the second set value after the effective value of bias power reaches the first set value. It is preferable to include

Thus, before the surface of the silicon-containing member is oxidized by the oxygen radicals in the plasma generated by the application of the source power, the ions in the plasma are reliably drawn into the silicon-containing member, whereby the silicon-containing member is drawn. Etching can be reliably started for the member. Specifically, when the second set value of the source power is higher than the first set value of the bias power, the application of the source power is performed at the same time as the start of the application of the bias power or before the start of the application of the bias power. Even after the start, the time when the effective value of the source power reaches the second set value is later than the time when the effective value of the bias power reaches the first set value. Therefore, in such a case, the same effect as when the application of the source power is started after the application of the bias power is started can be obtained.

In the dry etching method of the present invention,
As the silicon-containing member, a silicon substrate, a polysilicon film, an amorphous silicon film, a silicide film, or the like may be used.

In order to achieve the first object, a first method of manufacturing a semiconductor device according to the present invention comprises the steps of: providing a source power for generating plasma in a chamber; Assuming a method of manufacturing a semiconductor device using a dual power supply type dry etching apparatus that can independently control bias power for drawing in an object to be etched, and having an opening in an element isolation formation region on a silicon substrate A step of forming a mask pattern, a step of installing a silicon substrate on which the mask pattern is formed in the chamber, a step of introducing a process gas containing at least oxygen into the chamber in which the silicon substrate is installed, and The plasma generated from the process gas is generated by the application, and the ion in the plasma is generated by the application of the bias power. Forming an element isolation groove in the silicon substrate by etching the silicon substrate by drawing the silicon substrate into the silicon substrate. In the step of forming the element isolation groove, oxidation in an exposed portion of the silicon substrate is reduced. Starting the application of bias power before proceeding.

According to the first method for manufacturing a semiconductor device, when a silicon substrate is etched by using a dual power supply type dry etching apparatus to form a trench for element isolation, oxidation at an exposed portion of the silicon substrate is performed. Of the bias power is started before the operation proceeds. For this reason, since the attraction of ions in the plasma to the silicon substrate is not hindered by the oxide film formed on the surface of the silicon substrate, it is ensured that dry etching on the silicon substrate is stopped halfway. Can be prevented. Therefore, an element isolation groove having a desired isolation depth can be formed in the silicon substrate.

In the first method of manufacturing a semiconductor device, the step of forming the element isolation groove preferably includes the step of starting the application of bias power before starting the application of source power.

In this way, before the surface of the silicon substrate is oxidized by oxygen radicals in the plasma generated by the application of the source power, ions in the plasma are reliably drawn into the silicon substrate, whereby the silicon substrate is Etching can be performed reliably.

In the first method for fabricating a semiconductor device, the step of forming the element isolation trench includes the step of changing the effective value of the source power to the second set value after the effective value of the bias power reaches the first set value. Preferably, the method includes a step of applying source power and bias power so as to achieve the above.

In this way, before the surface of the silicon substrate is oxidized by oxygen radicals in the plasma generated by the application of the source power, ions in the plasma are reliably drawn into the silicon substrate, whereby the silicon substrate is Etching can be performed reliably.

In order to achieve the first object, a second method for manufacturing a semiconductor device according to the present invention comprises the steps of: providing a source power for generating plasma in a chamber; Forming a conductive film containing at least silicon on a substrate, assuming a method of manufacturing a semiconductor device using a dual-power-supply dry etching apparatus capable of independently controlling a bias power for drawing into an object to be etched; and Forming a mask pattern over the conductive film over the gate electrode formation region; installing a substrate on which the conductive film and the mask pattern are formed in the chamber; and supplying at least oxygen to the chamber in which the substrate is installed. A process gas introduction process, and applying a source power to generate a plasma comprising the process gas and bias the plasma. Forming a gate electrode made of a conductive film by etching the conductive film by drawing ions in the plasma into the conductive film by applying a force, wherein the step of forming the gate electrode comprises: Starting the application of bias power before the oxidation of the exposed portion of the substrate proceeds.

According to the second method of manufacturing a semiconductor device, when a silicon-containing conductive film formed on a substrate is etched using a dual power supply type dry etching apparatus to form a gate electrode, Bias power application is started before oxidation of the exposed portion of the contained conductive film proceeds. Therefore, the attraction of ions in the plasma into the silicon-containing conductive film is not hindered by the oxide film formed on the surface of the silicon-containing conductive film, so that dry etching of the silicon-containing conductive film is stopped halfway. Can be reliably prevented. Therefore,
A gate electrode having desired dimensions can be formed.

In the second method for manufacturing a semiconductor device, the step of forming the gate electrode preferably includes the step of starting the application of bias power before starting the application of source power.

In this manner, before the surface of the silicon-containing conductive film is oxidized by oxygen radicals in the plasma generated by the application of the source power, ions in the plasma are reliably drawn into the silicon-containing conductive film. The silicon-containing conductive film can be reliably etched.

In the second method for manufacturing a semiconductor device, the step of forming the gate electrode is performed so that the effective value of the source power reaches the second set value after the effective value of the bias power reaches the first set value. It is preferable to include a step of applying source power and bias power to the power supply.

In this manner, before the surface of the silicon-containing conductive film is oxidized by oxygen radicals in the plasma generated by the application of the source power, ions in the plasma are reliably drawn into the silicon-containing conductive film. The silicon-containing conductive film can be reliably etched.

In the second method for manufacturing a semiconductor device, a polysilicon film, an amorphous silicon film, a silicide film, or the like may be used as the silicon-containing conductive film.

In order to achieve the second object, a third method of manufacturing a semiconductor device according to the present invention comprises the steps of: providing a source power for generating plasma in a chamber; Assuming a method of manufacturing a semiconductor device using a dual-power-supply dry etching apparatus capable of independently controlling a bias power for drawing in an object to be etched, a substrate in which a member containing at least silicon is exposed in a chamber. After the installation, a first process gas is introduced into the chamber, and thereafter, a first plasma composed of the first process gas is generated by applying a source power, and the first plasma in the first plasma is generated by applying a bias power. A step of etching the member by drawing ions into the member, and a step of etching the member After that, exhausting the first process gas from the chamber, and then introducing a second process gas containing at least oxygen into the chamber with the substrate installed in the chamber, and applying bias power. And generating a second plasma composed of a second process gas by applying a source power,
The method includes a step of oxidizing a damaged layer generated in the member in the step of etching the member, and a step of removing the oxidized damaged layer by cleaning the substrate after removing the substrate from the chamber. .

According to the third method of manufacturing a semiconductor device, after etching a silicon-containing member using a dual power supply type dry etching apparatus, bias power is reduced using the same dual power supply type dry etching apparatus. By applying the source power without applying the voltage, the damaged layer generated in the silicon-containing member during the dry etching is oxidized, and then the oxidized damaged layer is removed by cleaning the substrate. For this reason, it is possible to prevent the electrical characteristics of the semiconductor device from deteriorating due to the damage layer generated on the silicon-containing member during dry etching. Further, since the damaged layer can be oxidized by using a dual-power-supply dry etching apparatus used for dry etching instead of the oxidation furnace, the manufacturing cost of the semiconductor device can be significantly reduced.

In the third method of manufacturing a semiconductor device, the member is a silicon substrate, and the step of etching the member includes the step of forming an element isolation groove in the silicon substrate, and the step of oxidizing the damaged layer. Preferably, the method includes a step of oxidizing a damaged layer formed near the wall surface and the bottom surface of the isolation groove in the silicon substrate.

In this manner, when dry etching is performed on the silicon substrate to form an element isolation groove, a damaged layer formed near the wall surface and the bottom surface of the element isolation groove on the silicon substrate can be formed at low cost. Can be removed.

In the third method for manufacturing a semiconductor device, the member is a conductive film containing at least silicon formed on a substrate, and the step of etching the member includes:
Preferably, the step of oxidizing the damaged layer includes the step of forming a gate electrode made of a conductive film on the substrate, and the step of oxidizing the damaged layer formed on the side surface of the gate electrode.

In this manner, when a silicon-containing conductive film formed on a substrate is dry-etched to form a gate electrode, a damaged layer formed on the side surface of the gate electrode can be removed at low cost.

In this case, a polysilicon film, an amorphous silicon film, a silicide film, or the like may be used as the silicon-containing conductive film.

In order to achieve the third object, a fourth method of manufacturing a semiconductor device according to the present invention comprises the steps of: providing a source power for generating plasma in a chamber; A method of manufacturing a semiconductor device using a dual-power-supply dry etching apparatus capable of independently controlling a bias power for drawing into an object to be etched, and a silicon substrate having an element isolation groove formed in a chamber And a step of introducing a process gas containing at least oxygen into a chamber in which a silicon substrate is installed, and by generating a plasma made of a process gas by applying source power without applying bias power. Forming a silicon oxide film by oxidizing the vicinity of the wall surface and the bottom surface of the isolation trench in the silicon substrate. A step, and a step of forming after the substrate was taken out from the chamber, the embedded element isolation silicon oxide film is formed elements isolating trench insulating film.

According to the fourth method for manufacturing a semiconductor device, the source power is applied without applying the bias power by using the dual power supply type dry etching apparatus.
A silicon oxide film is formed by oxidizing the vicinity of the wall surface and the bottom surface of the isolation trench in the silicon substrate. For this reason,
Without using an oxidation furnace, surface levels near the wall surface and the bottom surface of the element isolation groove in the silicon substrate can be reduced. Further, without using an oxidation furnace, the corner portion of the element isolation groove can be rounded to improve the dielectric breakdown voltage of element isolation. Therefore, the manufacturing cost of the semiconductor device can be significantly reduced. In the fourth method of manufacturing a semiconductor device, the vicinity of the wall surface and the bottom surface of the isolation groove in the silicon substrate is oxidized deeper than the damaged layer generated during the dry etching, thereby achieving oxidation for removing the damaged layer. In addition, oxidation for reducing the surface state and improving the dielectric breakdown voltage can be performed simultaneously. In this case, a cleaning step for removing the oxidized damaged layer can be omitted.

In the step of forming element isolation in the fourth method of manufacturing a semiconductor device, an insulating film is formed on a silicon substrate so that the element isolating groove is completely filled, and then the silicon including the surface of the insulating film is formed. The surface of the substrate may be planarized by a CMP method to remove a portion of the insulating film outside the element isolation groove.

In order to achieve the first object, a dry etching apparatus according to the present invention comprises: a source power for generating plasma in a chamber; and ions in the plasma being applied to an object to be etched in the chamber. Assuming a dual-power-supply dry etching system that can independently control the bias power for pulling in,
A bias power application unit that initializes and operates the timer at the same time as the start is provided, and a source power application unit that starts application of the source power when the elapsed time measured by the timer reaches a predetermined time.

According to the dry etching apparatus of the present invention,
When the elapsed time from the start of the application of the bias power by the bias power application unit reaches a predetermined time, the application of the source power is started by the source power application unit. That is, the application of the bias power is always started before the application of the source power is started. For this reason, even when etching is performed on a silicon-containing member that is an object to be etched using a process gas containing oxygen,
Before the silicon-containing member is oxidized by oxygen radicals in the plasma generated by the application of the source power, the application of the bias power can be started to reliably draw the ions in the plasma into the silicon-containing member. as a result,
Since the attraction of ions in the plasma into the silicon-containing member is not hindered by the oxide film formed on the surface of the silicon-containing member, it is ensured that dry etching of the silicon-containing member is stopped halfway. Can be prevented.

[0069]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS First Embodiment A method for manufacturing a semiconductor device according to a first embodiment of the present invention will be described below with reference to the drawings.

FIGS. 1A to 1D are cross-sectional views showing steps of a method for manufacturing a semiconductor device according to the first embodiment.

First, as shown in FIG. 1A, after a first silicon oxide film 11 is formed on a silicon substrate 10 by, for example, thermal oxidation, the first silicon oxide film 11 is formed on the first silicon oxide film 11 by, for example, a CVD method. A silicon nitride film 12 is formed using a film forming method, and thereafter, a resist pattern 13 having an opening in an element isolation formation region is formed on the silicon nitride film 12 by photolithography.

Next, as shown in FIG. 1B, the silicon nitride film 12 and the first silicon oxide film 11 are dry-etched using the resist pattern 13 as a mask to form the silicon nitride film 12 and the first silicon oxide film 11. Are respectively patterned. After removing the resist pattern 13 by ashing, the silicon substrate 10 is washed.

Next, as shown in FIG. 1C, dry etching is performed on the silicon substrate 10 using the patterned silicon nitride film 12 as a mask to form an element isolation groove 14 in the silicon substrate 10. I do. Here, FIG.
The dry etching step shown in (c) will be described in detail. First, a silicon substrate 10 to be etched is set in a chamber (not shown) of a dry etching apparatus. Thereafter, the inside of the chamber is evacuated until a predetermined degree of vacuum is reached.
For example, a process gas required to perform etching, for example, a mixed gas of a halogen-containing gas and an oxygen gas is introduced. Thereafter, by starting application of bias power, a first plasma composed of a process gas is generated, and at the same time, ions in the first plasma are drawn into the silicon substrate 10. Thereafter, the application of the source power is started while the application of the bias power is continued, thereby generating the second plasma composed of the process gas and drawing ions in the second plasma into the silicon substrate 10. Thereby, the ions in the plasma and the silicon substrate 1
Reacts with the exposed portions of 0 to form volatile reaction products. At this time, the silicon substrate 10 is subjected to dry etching by discharging the volatile reaction products from the chamber by evacuation of the chamber. Then, after removing the silicon substrate 10 from the chamber, the silicon substrate 10 is washed to remove deposits formed during dry etching on the silicon substrate 10. As a result, an isolation groove 14 is formed in the silicon substrate 10.

In the dry etching step shown in FIG. 1 (c), a processing accuracy as high as that of the processing of the gate electrode is required due to the miniaturization of the separation dimension. For example, an inductively coupled plasma etching apparatus is used, and the effective values of the source power and the bias power are set to, for example, 600 W and 200 W, respectively. As a process gas, for example, a mixed gas of Cl ₂ gas and O ₂ gas (pressure: 7 Pa, C
l ₂ gas flow rate: 150 ml / min, O ₂ gas flow rate: 6
ml / min). Further, the application of the bias power is started, for example, one second earlier than the application of the source power. FIG. 2 is a diagram showing an example of a time change of the effective value of each of the source power and the bias power in the dry etching step shown in FIG. However, in FIG. 2, the time when the application of the source power is started is set as a reference (0 second) of the power application time.

Next, in order to reduce the surface state near the wall surface and the bottom surface of the isolation trench 14 in the silicon substrate 10, the vicinity of the wall surface and the bottom surface are oxidized. afterwards,
After a second silicon oxide film 15 is deposited on the silicon nitride film 12 by, for example, a CVD method so that the element isolation trench 14 is completely filled, the silicon nitride film 12 including the surface of the second silicon oxide film 15 is removed. The surface is flattened by the CMP method, and the second silicon oxide film 1 outside the isolation trench 14 is formed.
5 is removed. After that, as shown in FIG. 1D, the silicon nitride film 12 is removed by wet etching, and the silicon
The first silicon oxide film 11 remaining on the surface is removed. As a result, the second embedded in the element isolation groove 14 is formed.
An element isolation made of the silicon oxide film 15 is formed.

Hereinafter, application of source power and bias power in the dry etching step shown in FIG. 1C using a dual power supply type dry etching apparatus, which is a feature of the method of manufacturing the semiconductor device according to the first embodiment. Method (hereafter,
The operation of the dry etching method of the present invention), that is, the method of starting the application of bias power before starting the application of source power, will be described with reference to the drawings.

FIGS. 3A to 3C are views showing the operation of the dry etching method of the present invention. Specifically, FIGS.
It is a diagram showing a change in the state in the chamber of the dry etching apparatus in the dry etching step shown in,
(A) shows a state immediately after the process gas is introduced into the chamber, (b) shows a state immediately after the application of the bias power is started, and (c) shows a state immediately after the application of the source power. The state immediately after is shown. FIG. 3 (a)
In (c), the illustration of the silicon nitride film and the like on the silicon substrate is omitted, and the illustration of the sample stage and the like in the chamber is omitted.

First, as shown in FIG. 3A, a silicon substrate 10 to be etched is placed in a chamber 17 of a dry etching apparatus, and the inside of the chamber 17 is evacuated until a predetermined degree of vacuum is reached. Thereafter, a process gas 18 necessary for etching the silicon substrate 10 is introduced into the chamber 17. next,
As shown in FIG. 3B, a first plasma 18 composed of a process gas 18 is applied by applying a bias power.
A is generated and the ions 19 in the first plasma 18A are drawn into the silicon substrate 10. Thereafter, by applying source power while continuing to apply bias power, the second plasma 18 comprising the process gas 18 is formed.
B is generated and ions 19 in the second plasma 18B are drawn into the silicon substrate 10.

That is, in the conventional dry etching method using the dual power supply type dry etching apparatus, the application of the bias power was started after the application of the source power was started, but the dual power supply type dry etching apparatus was used. In the dry etching method of the present invention, the application of the bias power is started before the application of the source power is started. As a result, in the dry etching method of the present invention, etching by drawing ions in the plasma into the silicon substrate, as seen in the conventional dry etching method (see FIGS. 15A to 15C), starts. It is possible to avoid a situation in which an oxygen radical (active oxygen) in plasma reacts with an exposed portion of the silicon substrate to form an oxide film on the silicon substrate. In other words,
In the dry etching method of the present invention, before oxygen radicals in the plasma react with the silicon substrate to be etched, ions in the plasma are accelerated toward the silicon substrate, thereby starting etching on the silicon substrate. can do. Specifically, by starting application of bias power before starting application of source power in the dry etching method of the present invention,
Since the ions that accelerate by the bias power reach the silicon substrate earlier than the oxygen radicals that randomly move, it is possible to prevent an oxide film from being formed on the silicon substrate and stopping the etching of the silicon substrate.

As described above, according to the first embodiment, when the silicon substrate 10 is etched using the dual power supply type dry etching apparatus to form the element isolation trench 14, the source The application of the bias power is started before the application of the power is started. Therefore, before the exposed portion of the silicon substrate 10 is oxidized by oxygen radicals in the plasma generated by the application of the source power, the application of the bias power is started to reliably draw the ions in the plasma into the silicon substrate 10. Can be. As a result, the attraction of the ions in the plasma into the silicon substrate 10 is not hindered by the oxide film formed on the surface of the silicon substrate 10.
Can be reliably prevented from stopping dry etching on the way. Accordingly, it is possible to form the element isolation groove 14 having a desired isolation depth in the silicon substrate 10.

In the first embodiment, an inductively coupled plasma etching apparatus is used as a dual power supply type dry etching apparatus. Instead of this, an electron cyclone resonance (ECR) and a capacitively coupled plasma two frequency Alternatively, a dry etching apparatus of another dual power supply type such as a mold or a surface wave plasma type (SWP) may be used.

Further, in the first embodiment, the application of the bias power is started before the application of the source power is started.
In the case where the second set value for the effective value of the source power is higher than the set value of the bias power, when the application of the source power is started simultaneously with the start of the application of the bias power or before the start of the application of the bias power, the effective value of the bias power is May be applied such that the effective value of the source power reaches the second set value after the first reaches the first set value. FIG. 4 shows a case where the source power application is started simultaneously with the start of the bias power application when the second set value for the effective value of the source power is higher than the first set value for the effective value of the bias power. It is a figure showing an example of a time change of each effective value of power and bias power. However, in FIG. 4, the time when the application of the source power is started is set as a reference (0 second) of the power application time, and the effective values of the source power and the bias power are set to 600 W and 200 W, respectively.

In the first embodiment, the case where dry etching is performed on a silicon substrate to form an element isolation groove is intended. However, the present invention is not limited to this.
Even when the silicon-containing member is dry-etched for another purpose, the effect of preventing the dry-etching of the silicon-containing member from being stopped can be obtained.

(Second Embodiment) Hereinafter, a method for manufacturing a semiconductor device according to a second embodiment of the present invention will be described with reference to the drawings.

FIGS. 5A to 5C are cross-sectional views showing steps of a method for manufacturing a semiconductor device according to the second embodiment.

First, as shown in FIG. 5A, after a gate insulating film 21 made of a silicon oxide film is formed on a silicon substrate 20 by thermal oxidation, a film is formed on the gate insulating film 21 by, for example, a CVD method or the like. A polysilicon film 22 is formed by using a method, and thereafter, a resist pattern 23 covering a gate electrode formation region is formed on the polysilicon film 22 by a photolithography method.

Next, as shown in FIG. 5B, dry etching is performed on the polysilicon film 22 using the resist pattern 23 as a mask, and the polysilicon film 22 is formed on the silicon substrate 20 via the gate insulating film 21. A gate electrode 24 of 22 is formed. Here, the dry etching step shown in FIG. 5B will be described in detail. First,
A silicon substrate 20 on which a polysilicon film 22 to be etched is formed is placed in a chamber (not shown) of a dry etching apparatus. Thereafter, the inside of the chamber is evacuated until a predetermined degree of vacuum is reached, and then a process gas required for etching the polysilicon film 22, for example, a mixed gas of a halogen-containing gas and an oxygen gas is introduced into the chamber. I do. Thereafter, by starting application of bias power, the first
And the ions in the first plasma are drawn into the polysilicon film 22 at the same time. Thereafter, the application of the source power is started while the application of the bias power is continued, thereby generating the second plasma composed of the process gas and drawing ions in the second plasma into the polysilicon film 22. As a result, ions in the plasma react with the exposed portions of the polysilicon film 22 to form volatile reaction products. At this time, the above-mentioned volatile reaction products are exhausted from the chamber by evacuation of the chamber, thereby performing dry etching on the polysilicon film 22. As a result, a gate electrode 24 made of the polysilicon film 22 is formed. You.

In the dry etching step shown in FIG. 5 (b), a dual power supply type dry etching apparatus, for example, an inductively coupled plasma etching apparatus, is required because high processing accuracy is required due to miniaturization of gate dimensions. At the same time, the effective values of the source power and the bias power were set to 200 W and 50 W, for example. As a process gas, for example, a mixed gas of Cl ₂ gas, HBr gas, and O ₂ gas (pressure: 4 Pa, flow rate of Cl ₂ gas: 25)
ml / min, HBr gas flow rate: 125 ml / min,
O ₂ gas flow rate: 1 ml / min) was used. Further, the application of the bias power was started, for example, one second earlier than the application of the source power.

Next, after removing the silicon substrate 20 from the chamber, as shown in FIG. 5C, the resist pattern 23 is removed by ashing, and then the silicon substrate 20 is washed to remove the polysilicon film 22. The deposit formed during the dry etching and the portion of the gate insulating film 21 outside the gate electrode 24 are removed.

As described above, according to the second embodiment, when the gate electrode 24 is formed by etching the polysilicon film 22 using a dual power supply dry etching apparatus, the source power Before starting the application of the bias power, the application of the bias power is started. Therefore, before the exposed portion of the polysilicon film 22 is oxidized by the oxygen radicals in the plasma generated by the application of the source power, the application of the bias power is started to reliably transfer the ions in the plasma to the polysilicon film 22. Can be withdrawn.
As a result, the attraction of ions in the plasma into the polysilicon film 22 is not hindered by the oxide film formed on the surface of the polysilicon film 22, so that the dry etching of the polysilicon film 22 is stopped halfway. Can be reliably prevented. Therefore, the gate electrode 24 having a desired size can be formed.

In the second embodiment, an inductively coupled plasma etching apparatus is used as a dual power supply type dry etching apparatus. Instead, an electron cyclone resonance type, a capacitively coupled plasma dual frequency type, or a surface etching method may be used. Another dual power supply type dry etching apparatus such as a wave plasma type may be used.

Further, in the second embodiment, the application of the bias power is started before the application of the source power is started.
In the case where the second set value for the effective value of the source power is higher than the set value of the bias power, when the application of the source power is started simultaneously with the start of the application of the bias power or before the start of the application of the bias power, the effective value of the bias power is May be applied such that the effective value of the source power reaches the second set value after the first reaches the first set value.

In the second embodiment, the polysilicon film is used as the conductive film constituting the gate electrode.
Instead, another conductive film containing at least silicon,
For example, an amorphous silicon film or a silicide film such as a WSi (tungsten silicide) film may be used.

In the second embodiment, the case where dry etching is performed on a polysilicon film to form a gate electrode is intended. However, the present invention is not limited to this.
Even when the silicon-containing member is dry-etched for another purpose, the effect of preventing the dry-etching of the silicon-containing member from being stopped can be obtained.

(Third Embodiment) Hereinafter, a method for manufacturing a semiconductor device according to a third embodiment of the present invention will be described with reference to the drawings.

FIGS. 6A to 6E are cross-sectional views showing each step of the method for manufacturing a semiconductor device according to the third embodiment.

First, as shown in FIG. 6A, after a first silicon oxide film 31 is formed on a silicon substrate 30 by, for example, thermal oxidation, the first silicon oxide film 31 is formed on the first silicon oxide film 31 by, for example, a CVD method. The silicon nitride film 32 is formed using a film forming method. Thereafter, a resist pattern (not shown) having an opening in an element isolation formation region is formed on the silicon nitride film 32 by photolithography, and the silicon nitride film 32 and the first silicon oxide film are formed using the resist pattern as a mask. The silicon nitride film 32 and the first silicon oxide film 31 are respectively patterned by performing dry etching on the silicon nitride film 31. Thereafter, after the resist pattern is removed by ashing, the silicon substrate 30 is removed.
Wash.

Next, as shown in FIG. 6B, dry etching is performed on the silicon substrate 30 using the patterned silicon nitride film 32 as a mask to form an element isolation groove 33 in the silicon substrate 30. I do. At this time, a silicon layer having poor crystallinity or containing impurities, that is, a damaged layer 34 is formed near the wall surface and the bottom surface of the isolation trench 33 in the silicon substrate 30. Here, FIG.
The dry etching step shown in (b) will be described in detail. First, a silicon substrate 30 to be etched is placed in a chamber (not shown) of a dry etching apparatus. Thereafter, the inside of the chamber is evacuated until a predetermined degree of vacuum is reached.
Introducing a first process gas necessary for performing an etching process, for example, a mixed gas of a halogen-containing gas such as Cl ₂ gas or HBr gas and an oxygen gas. afterwards,
A first plasma composed of a first process gas is generated by applying source power, and ions in the first plasma are drawn into the silicon substrate 30 by applying bias power. As a result, ions in the first plasma react with the exposed portions of the silicon substrate 30 to form volatile reaction products. At this time, the silicon substrate 30 is dry-etched by discharging the volatile reaction product from the chamber by evacuating the chamber.

In the dry etching step shown in FIG. 6 (b), since a high processing accuracy almost equal to the processing of the gate electrode is required due to the miniaturization of the separation size, a dual power supply type dry etching apparatus is used. For example, an inductively coupled plasma etching apparatus is used.

Next, after the completion of the dry etching step shown in FIG. 6B, the first process gas is exhausted from the chamber, and thereafter, the chamber contains at least oxygen while the silicon substrate 30 is installed in the chamber. A second process gas is introduced. After that, by applying a source power without applying a bias power, a second plasma composed of a second process gas is generated,
Oxygen radicals in the second plasma react with the damaged layer 34, thereby forming an oxidized damaged layer 34A (specifically, a silicon oxide film) as shown in FIG. 6C.

In the damage layer oxidation step shown in FIG. 6C, the effective value of the source power is set to, for example, 600 W (the effective value of the bias power is 0 W), and O _{2 is used} as the second process gas. A gas (pressure: 7 Pa, gas flow rate: 50 ml / min) is used.

Next, after the silicon substrate 30 is taken out of the chamber, as shown in FIG. 6D, the silicon substrate 30 is washed using, for example, a chemical solution containing HF, so that the oxidized damage layer 34A, Silicon substrate 30
The deposits formed during dry etching of the substrate are removed. Thereby, the damage layer 3 is formed on the silicon substrate 30.
4 can be formed to form the element isolation groove 33.

Next, in order to reduce the surface state near the wall surface and the bottom surface of the element isolation groove 33 in the silicon substrate 30, the vicinity of the wall surface and the bottom surface are oxidized. afterwards,
After a second silicon oxide film 35 is deposited on the silicon nitride film 32 by, for example, the CVD method so that the element isolation trench 33 is completely filled, the silicon nitride film 32 including the surface of the second silicon oxide film 35 is removed. The surface is flattened by the CMP method and the second silicon oxide film 3 outside the isolation trench 33 is formed.
5 is removed. Thereafter, as shown in FIG. 6E, the silicon nitride film 32 is removed by wet etching, and the silicon substrate 30 is washed and
The first silicon oxide film 31 remaining on the surface is removed. As a result, the second embedded in the element isolation groove 33 is formed.
An element isolation made of the silicon oxide film 35 is formed.

As described above, according to the third embodiment, the silicon substrate 30 is etched using the dual power supply type dry etching apparatus to form the element isolation groove 33, and then the same By applying source power without applying bias power using a dry etching apparatus of a power supply type, the damage layer 34 generated during dry etching near the wall surface and the bottom surface of the element isolation groove 33 in the silicon substrate 30 is oxidized. And then
The oxidized damaged layer 34A is removed by cleaning the substrate. Therefore, it is possible to prevent the electrical characteristics of the semiconductor device from deteriorating due to the damaged layer 34. Further, the damage layer 34 can be oxidized by using a dry etching apparatus of a dual power supply type used at the time of dry etching instead of the oxidation furnace, so that the manufacturing cost of the semiconductor device can be significantly reduced.

In the third embodiment, an inductively coupled plasma etching apparatus is used as a dual power supply type dry etching apparatus. Instead, an electron cyclone resonance type, a capacitively coupled plasma dual frequency type, or a surface etching method may be used. Another dual power supply type dry etching apparatus such as a wave plasma type may be used.

In the third embodiment, the O ₂ gas is used as the second process gas.
A mixed gas of O ₂ gas and inert gas may be used.

Further, in the third embodiment, FIG.
Although the same dual power supply type dry etching apparatus was used for the dry etching step shown in FIG. 6B and the damage layer oxidation step shown in FIG. 6C, a different dual power supply type dry etching apparatus was used in each step. An etching device may be used,
Alternatively, another dry etching apparatus other than the dual power supply method may be used in the dry etching step shown in FIG. When a dual power supply type dry etching apparatus is used in the dry etching step shown in FIG. 6B, it is preferable that the application of bias power be started before the oxidation of the exposed portion of the silicon substrate 30 proceeds. Specifically, the application of the bias power is started before the application of the source power is started, or the effective value of the source power is changed to the second setting after the effective value of the bias power reaches the first set value. It is preferable to apply the source power and the bias power to reach the values.

In the third embodiment, the case where dry etching is performed on a silicon substrate to form a trench for element isolation is intended. However, the present invention is not limited to this.
Even when dry etching is performed on a silicon-containing member for another purpose, it is possible to prevent the electrical characteristics of the semiconductor device from deteriorating due to a damaged layer generated in the silicon-containing member during dry etching. The effect is obtained.

(Fourth Embodiment) Hereinafter, a method for manufacturing a semiconductor device according to a fourth embodiment of the present invention will be described with reference to the drawings.

FIGS. 7A to 7D are cross-sectional views showing steps of a method for manufacturing a semiconductor device according to the fourth embodiment.

First, as shown in FIG. 7A, after a gate insulating film 41 made of a silicon oxide film is formed on a silicon substrate 40 by thermal oxidation, a film is formed on the gate insulating film 41 by, for example, a CVD method or the like. A polysilicon film 42 is formed by using a method, and thereafter, a resist pattern 43 covering a gate electrode formation region is formed on the polysilicon film 42 by photolithography.

Next, as shown in FIG. 7B, dry etching is performed on the polysilicon film 42 using the resist pattern 43 as a mask, and the polysilicon film 42 is formed on the silicon substrate 40 with the gate insulating film 41 interposed therebetween. A gate electrode 44 consisting of 42 is formed. At this time, the gate electrode 44
A damage layer 45 is formed on the side surface of. Here, FIG.
Will be described in detail.
First, a silicon substrate 40 on which a polysilicon film 42 to be etched is formed is placed in a chamber (not shown) of a dry etching apparatus. Thereafter, the inside of the chamber is evacuated until a predetermined degree of vacuum is reached, and then a first process gas required for etching the polysilicon film 42 in the chamber, for example, a halogen such as Cl ₂ gas or HBr gas. A mixed gas of the contained gas and the oxygen gas is introduced. After that, a first plasma composed of the first process gas is generated by applying the source power, and ions in the first plasma are drawn into the polysilicon film 42 by applying the bias power. As a result, ions in the first plasma react with the exposed portion of the polysilicon film 42 to form a volatile reaction product. At this time, the above-mentioned volatile reaction products are exhausted from the chamber by evacuation of the chamber, thereby performing dry etching on the polysilicon film 42. As a result, a gate electrode 44 made of the polysilicon film 42 is formed. You.

In the dry etching step shown in FIG. 7 (b), a dual power supply type dry etching apparatus, for example, an inductively coupled plasma etching apparatus, is required because high processing accuracy is required due to miniaturization of gate dimensions. Used.

Next, after the completion of the dry etching step shown in FIG. 7B, the first process gas is exhausted from the chamber, and then at least oxygen is contained in the chamber while the silicon substrate 40 is installed in the chamber. A second process gas is introduced. After that, by applying a source power without applying a bias power, a second plasma composed of a second process gas is generated,
The oxygen radicals in the second plasma react with the damaged layer 45, thereby forming an oxidized damaged layer 45A (specifically, a silicon oxide film) as shown in FIG. 7C.

In the damage layer oxidation step shown in FIG. 7C, the effective value of the source power is set to, for example, 600 W (the effective value of the bias power is 0 W), and O _{2 is used} as the second process gas. Gas (pressure: 7 Pa, gas flow rate: 40 ml / min) is used.

Next, after removing the silicon substrate 40 from the chamber, the resist pattern 43 is removed by ashing as shown in FIG.
By cleaning the silicon substrate 40 using a chemical solution containing F, the oxidation damage layer 45A and the polysilicon film 4 are removed.
The deposits formed during the dry etching of 2 and the portion of the gate insulating film 41 outside the gate electrode 44 are removed. Thus, the gate electrode 44 from which the damaged layer 45 has been removed can be formed on the silicon substrate 40 via the gate insulating film 41.

As described above, according to the fourth embodiment, the polysilicon film 42 is etched using the dual power supply type dry etching apparatus to form the gate electrode 44, and then the same two power supply By applying source power without applying bias power using a dry etching apparatus of the type, the damage layer 45 generated during dry etching on the side surface of the gate electrode 44 is oxidized,
Thereafter, the oxidized damaged layer 45A is removed by cleaning the substrate. Therefore, it is possible to prevent the electrical characteristics of the semiconductor device from deteriorating due to the damaged layer 45. Also,
The damage layer 45 can be oxidized by using a dual power supply type dry etching apparatus used at the time of dry etching instead of the oxidation furnace, so that the manufacturing cost of the semiconductor device can be significantly reduced.

In the fourth embodiment, an inductively coupled plasma etching apparatus is used as a dual power supply type dry etching apparatus. Instead, an electron cyclone resonance type, a capacitively coupled plasma dual frequency type or a surface etching method may be used. Another dual power supply type dry etching apparatus such as a wave plasma type may be used.

Further, in the fourth embodiment, the O ₂ gas is used as the second process gas.
A mixed gas of O ₂ gas and inert gas may be used.

Further, in the fourth embodiment, FIG.
Although the same dual power supply type dry etching apparatus was used in the dry etching step shown in FIG. 7B and the damage layer oxidation step shown in FIG. 7C, a different dual power supply type dry etching apparatus was used in each step. An etching device may be used,
Alternatively, another dry etching apparatus other than the dual power supply method may be used in the dry etching step shown in FIG. When a dual power supply type dry etching apparatus is used in the dry etching step shown in FIG. 7B, it is preferable that the application of the bias power be started before the oxidation of the exposed portion of the polysilicon film 42 proceeds. Specifically, the application of the bias power is started before the application of the source power is started, or the effective value of the source power is changed to the second setting after the effective value of the bias power reaches the first set value. It is preferable to apply the source power and the bias power to reach the values.

In the fourth embodiment, the polysilicon film is used as the conductive film forming the gate electrode.
Instead, another conductive film containing at least silicon,
For example, an amorphous silicon film or a silicide film such as a WSi film may be used.

In the fourth embodiment, the case where dry etching is performed on a polysilicon film to form a gate electrode is intended. However, the present invention is not limited to this.
Even when dry etching is performed on a silicon-containing member for another purpose, it is possible to prevent the electrical characteristics of the semiconductor device from deteriorating due to a damaged layer generated in the silicon-containing member during dry etching. The effect is obtained.

(Fifth Embodiment) Hereinafter, a method for manufacturing a semiconductor device according to a fifth embodiment of the present invention will be described with reference to the drawings.

FIGS. 8A to 8D are cross-sectional views showing steps of a method for manufacturing a semiconductor device according to the fifth embodiment.

First, as shown in FIG. 8A, after a first silicon oxide film 51 is formed on a silicon substrate 50 by, for example, thermal oxidation, the first silicon oxide film 51 is formed on the first silicon oxide film 51 by, for example, a CVD method. The silicon nitride film 52 is formed using a film forming method. Thereafter, a resist pattern (not shown) having an opening in an element isolation formation region is formed on the silicon nitride film 52 by photolithography, and the silicon nitride film 52 and the first silicon oxide film are formed using the resist pattern as a mask. The silicon nitride film 52 and the first silicon oxide film 51 are patterned by performing dry etching on the silicon nitride film 52. Then, after the resist pattern is removed by ashing, the silicon substrate 50 is removed.
Wash.

Next, as shown in FIG. 8B, dry etching is performed on the silicon substrate 50 using the patterned silicon nitride film 52 as a mask, and then the silicon substrate 50 is cleaned. The deposits formed during the dry etching for 50 are removed. As a result, an isolation groove 53 is formed in the silicon substrate 50.

Next, as shown in FIG. 8C, the vicinity of the wall surface and the bottom surface of the element isolation groove 53 in the silicon substrate 50 is oxidized to form a second silicon oxide film 54.
Thereby, the groove 5 for element isolation in the silicon substrate 50 is formed.
3, the surface level near the wall surface and the bottom surface can be reduced, and the breakdown voltage of element isolation can be improved by rounding the corner of the element isolation groove 53. In the fifth embodiment, the oxidation step shown in FIG. 8C is performed using a dual power supply type dry etching apparatus. Here, the oxidation step shown in FIG. 8C will be described in detail. First, a silicon substrate 50 having a device isolation groove 53 formed therein is placed in a chamber (not shown) of a dual power supply type dry etching apparatus. After that, the inside of the chamber is evacuated until a predetermined degree of vacuum is reached, and then a process gas required to oxidize the silicon substrate 50 in the chamber,
That is, a process gas containing at least oxygen is introduced.
Thereafter, by generating a plasma composed of the process gas by applying the source power without applying the bias power, oxygen radicals in the plasma and the vicinity of the wall surface and the bottom surface of the element isolation groove 53 in the silicon substrate 50 are reduced. To form a second silicon oxide film 54.

In the oxidation step shown in FIG. 8C, for example, an inductively coupled plasma etching apparatus is used as a dry etching apparatus of the dual power supply type, and the effective value of the source power is set to, for example, 600 W (effective value of the bias power). Is set to 0 W). As a process gas, for example, O ₂ gas (pressure: 7 Pa, gas flow rate: 60 ml / mi)
n) is used.

Next, after taking out the silicon substrate 50 from the chamber, for example, a CVD
The third silicon oxide film 55 is formed by the
Is completely buried, the surface of the silicon nitride film 52 including the surface of the third silicon oxide film 55 is removed by CMP.
The third silicon oxide film 55 outside the element isolation groove 53 is removed by flattening by a method. Note that the second silicon oxide film 54 is integrated with the third silicon oxide film 55 when the third silicon oxide film 55 is deposited. Then, FIG.
As shown in (d), the silicon nitride film 52 is removed by wet etching, and the silicon substrate 50 is washed to remove the first silicon oxide film 51 remaining on the surface of the silicon substrate 50. As a result, an element isolation composed of the third silicon oxide film 55 buried in the element isolation groove 53 is formed.

As described above, according to the fifth embodiment, by applying source power without applying bias power by using a dual power supply type dry etching apparatus, the device isolation for the silicon substrate 50 can be reduced. Groove 53
Is oxidized near the wall and near the bottom to form a silicon oxide film (second silicon oxide film 54). For this reason, the surface level near the wall surface and the bottom surface of the element isolation groove 53 in the silicon substrate 50 can be reduced without using an oxidation furnace. Also, without using an oxidation furnace, the device isolation grooves 5 can be used.
By rounding the corner of No. 3, the dielectric breakdown voltage of element isolation can be improved. Therefore, the manufacturing cost of the semiconductor device can be significantly reduced.

In the fifth embodiment, an inductively coupled plasma etching apparatus is used as a dual power supply type dry etching apparatus. Instead, an electron cyclone resonance type, a capacitively coupled plasma dual frequency type or a surface etching method may be used. Another dual power supply type dry etching apparatus such as a wave plasma type may be used.

Further, in the fifth embodiment, the O ₂ gas is used as the process gas, but a mixed gas of the O ₂ gas and the inert gas may be used instead.

Also, in the fifth embodiment, FIG.
The step of forming the element isolation groove shown in FIG. 2B may be performed using a dual power supply type dry etching apparatus. At this time,
It is preferable to start applying the bias power before the oxidation of the exposed portion of the silicon substrate 50 proceeds. Specifically, the application of the bias power is started before the application of the source power is started, or the effective value of the source power is changed to the second setting after the effective value of the bias power reaches the first set value. It is preferable to apply the source power and the bias power to reach the values.

Also, in the fifth embodiment, FIG.
The silicon substrate 50 is formed in the element isolation groove forming step shown in FIG.
And then applying source power without applying bias power using a dual-power-supply dry etching apparatus, so that the vicinity of the wall surface and the bottom surface of the isolation trench 53 in the silicon substrate 50 is Preferably, the damaged layer generated during dry etching is oxidized, and then the oxidized damaged layer is removed by washing the substrate. At this time, when dry etching is performed on the silicon substrate 50 using a dual-power-supply dry etching apparatus, the same dry etching apparatus may be used subsequent to the oxidation of the damaged layer. FIG.
By oxidizing the vicinity of the wall surface and the bottom surface of the element isolation groove 53 in the silicon substrate 50 deeper than the damaged layer in the oxidation step shown in FIG.
It can be performed simultaneously in the oxidation step shown in (c). In this case, a cleaning step for removing the oxidized damaged layer can be omitted.

(Sixth Embodiment) Hereinafter, a dry etching apparatus according to a sixth embodiment of the present invention, specifically, a dual power supply type dry etching apparatus will be described with reference to the drawings.

FIG. 9 shows a schematic structure of a dry etching apparatus according to the sixth embodiment (hereinafter referred to as a dry etching apparatus of the present invention).

As shown in FIG. 9, a dry etching apparatus 60 of the present invention comprises a chamber 61 for generating plasma.
And a sample stage 62 arranged at the bottom of the chamber 61
A gas supply port 63 for introducing a process gas into the chamber 61, a bias power supply power supply 64 connected to the sample table 62 and applying bias power to the sample table 62, and a sample connected to the bias power supply power supply 64. A bias power monitor 65 for measuring the effective value of the bias power applied to the table 62; a timer 66 connected to the bias power monitor 65 for measuring an elapsed time from the start of the application of the bias power; Coil (not shown) connected and provided on the outer wall of chamber 61
And the like, and a source power supply power supply 67 for applying source power to the power supply.

Hereinafter, a dry etching method using the dry etching apparatus of the present invention will be described with reference to a flowchart shown in FIG.

First, in step S1, after an object to be etched 70 such as a silicon substrate is set on a sample stage 62 in a chamber 61, the inside of the chamber 61 is evacuated until a predetermined degree of vacuum is reached. A process gas required for etching the object 70 to be etched, for example, a mixed gas of a halogen-containing gas and an oxygen gas is introduced into the gas supply port 63 from the gas supply port 63.

Next, in step S2, it is checked whether the pressure of the process gas introduced into the chamber 61 is equal to the set value. If the pressure of the process gas is not equal to the set value, in step S3, the pressure of the process gas is adjusted by opening and closing an exhaust valve (not shown) until the pressure of the process gas becomes equal to the set value.

Next, when the pressure of the process gas becomes equal to the set value, in step S4, the bias power supply 64 starts applying the bias power. At this time, at the same time, in step S5, the bias power supply power source 6
4 initializes the timer 65 and starts the operation.

Next, in step S6, it is confirmed whether or not the effective value of the bias power measured by the bias power monitor 65 is equal to the set value. If the effective value of the bias power is not equal to the set value, in step S7, the effective value of the bias power is
The effective value of the bias power is adjusted using a bias power application matching circuit (not shown) or the like.

Next, when the effective value of the bias power becomes equal to the set value, it is checked in step S8 whether the elapsed time after the start of the bias power application, measured by the timer 66, has reached a predetermined time. If the elapsed time has not reached the predetermined time, in step S9, only the application of the bias power is continued until the elapsed time reaches the predetermined time.

Next, when the elapsed time reaches a predetermined time,
In step S10, the bias power monitor 65 sends the source power application instruction signal S _G to the source power supply power supply 67.
Outgoing. The source power supply 67 starts applying the source power upon receiving a source power applied instruction signal S _G. That is, in the sixth embodiment, when the effective value of the bias power becomes equal to the set value and the elapsed time after the start of the bias power application reaches a predetermined time,
The application of the source power is started.

Next, in step S11, it is checked whether or not the effective value of the source power is equal to the set value. If the effective value of the source power is not equal to the set value, step S
At 12, the matching circuit for applying the source power (not shown) until the effective value of the source power becomes equal to the set value.
And the like to adjust the effective value of the source power. In the sixth embodiment, for example, by connecting the bias power monitor 65 to a coil to which the source power is applied, the effective value of the source power may be measured using the bias power monitor 65.

Next, when the effective value of the bias power becomes equal to the set value, in step S13, etching is performed on the object 70 to be etched. More specifically, in step S13, the plasma 71 composed of the process gas is generated by the application of the source power, and the ions in the plasma 71 are drawn into the workpiece 70 by the application of the bias power. As a result, ions in the plasma 71 react with the object to be etched 70 to form a volatile reaction product. At this time, the above-mentioned volatile reaction product is exhausted from the chamber 61 by evacuating the chamber 61.
The dry etching is performed on the etching target 70 by discharging from the substrate.

As described above, according to the sixth embodiment, the bias power supply power source 6 which starts and applies the bias power and initializes and operates the timer 66 at the same time.
4 and a source power supply power supply 67 that starts applying source power when the elapsed time measured by the timer 66 reaches a predetermined time. That is, when the application of the bias power by the bias power supply power supply 64 is started and the elapsed time reaches a predetermined time, the application of the source power by the source power supply power supply 67 is started. Is applied before the start of the operation. Therefore, even when etching is performed on the silicon-containing member, which is the etching target 70, using the process gas containing oxygen, the etching target 70 is generated by the oxygen radicals in the plasma 71 generated by the application of the source power. Bias power is started before oxygen is oxidized, so that ions in the plasma 71 can be reliably drawn into the workpiece 70. As a result, the etching target 70 of the ions in the plasma 71 is removed.
Is not hindered by an oxide film formed on the surface of the etching target 70, so that dry etching of the etching target 70 can be reliably prevented from being stopped halfway.

In the sixth embodiment, when the effective value of the bias power becomes equal to the set value and the elapsed time after the start of the application of the bias power reaches a predetermined time, the source power supply power supply 67 Is started, but if the set value for the effective value of the source power is higher than the set value for the effective value of the bias power, the bias power is applied without measuring the effective value of the bias power by the bias power monitor 65. The source power supply power supply 67 may start applying the source power when the elapsed time after the start reaches a predetermined time. In this case, the predetermined time may be set to 0, and the source power supply power supply 67 may start applying the source power at the same time as the bias power supply power supply 64 starts to apply the bias power.

In the sixth embodiment, a bias power supply 64 for applying bias power, a bias power monitor 65 for measuring the effective value of bias power,
Although a timer 66 for measuring the elapsed time from the start of the application of the bias power is provided separately, instead of this,
A bias power supply unit having a function of the bias power supply power supply 64 and a function of the bias power monitor 65 or the timer 66 may be provided.

[0150]

According to the present invention, the attraction of ions in the plasma to the silicon-containing member is not hindered by the oxide film formed on the surface of the silicon-containing member. Stopping halfway can be reliably prevented.

According to the present invention, instead of the oxidation furnace,
By using a dual-power-supply dry etching apparatus used at the time of dry etching, a damaged layer generated in a silicon-containing member is oxidized, or a vicinity of a wall surface and a bottom surface of an element isolation groove in a silicon substrate is oxidized. Thus, the surface level near the wall surface and the bottom surface can be reduced, so that the manufacturing cost of the semiconductor device can be significantly reduced.

[Brief description of the drawings]

FIGS. 1A to 1D are cross-sectional views showing each step of a method for manufacturing a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a diagram illustrating an example of a time change of an effective value of each of a source power and a bias power in a dry etching process in the method for manufacturing a semiconductor device according to the first embodiment of the present invention.

FIGS. 3A to 3C are diagrams showing a change in a state inside a chamber of the dry etching apparatus in a dry etching step in the method for manufacturing a semiconductor device according to the first embodiment of the present invention;

FIG. 4 is a diagram showing an example of a time change of an effective value of each of a source power and a bias power in a dry etching step in the method for manufacturing a semiconductor device according to the first embodiment of the present invention.

FIGS. 5A to 5C are cross-sectional views illustrating steps of a method for manufacturing a semiconductor device according to a second embodiment of the present invention.

FIGS. 6A to 6E are cross-sectional views illustrating steps of a method for manufacturing a semiconductor device according to a third embodiment of the present invention.

FIGS. 7A to 7D are cross-sectional views illustrating respective steps of a method for manufacturing a semiconductor device according to a fourth embodiment of the present invention.

FIGS. 8A to 8D are cross-sectional views illustrating steps of a method for manufacturing a semiconductor device according to a fifth embodiment of the present invention.

FIG. 9 is a diagram showing a schematic structure of a dry etching apparatus according to a sixth embodiment of the present invention.

FIG. 10 is a flowchart of a dry etching method using a dry etching apparatus according to a sixth embodiment of the present invention.

FIGS. 11A to 11D are cross-sectional views illustrating respective steps of a conventional method for manufacturing a semiconductor device.

FIG. 12 is a diagram showing an example of a time change of an effective value of each of a source power and a bias power in a dry etching step in a conventional method of manufacturing a semiconductor device.

13 (a) to 13 (c) are diagrams showing a change in a state inside a chamber of a dry etching apparatus in a dry etching step in a conventional method of manufacturing a semiconductor device.

FIG. 14 is a diagram illustrating a problem of a conventional method of manufacturing a semiconductor device.

FIGS. 15A to 15C are diagrams showing a state in which an etching stop occurs in a dry etching step in a conventional method for manufacturing a semiconductor device.

FIG. 16 is a diagram showing the dependence of the thickness of an oxide film formed on the surface of a silicon substrate on the source power application time when source power application is continued before the start of bias power application.

FIG. 17 shows a delay time (source power) of a silicon shaving amount when dry etching is performed on a silicon substrate while changing variously the source power application start timing and the bias power application start timing. FIG. 9 is a diagram illustrating the dependence on the application start time as a reference time).

[Explanation of symbols]

Reference Signs List 10 silicon substrate 11 first silicon oxide film 12 silicon nitride film 13 resist pattern 14 isolation groove 15 second silicon oxide film 17 chamber 18 process gas 18A first plasma 18B second plasma 19 ion 20 silicon substrate 21 Gate insulating film 22 Polysilicon film 23 Resist pattern 24 Gate electrode 30 Silicon substrate 31 First silicon oxide film 32 Silicon nitride film 33 Element isolation groove 34 Damage layer 34A Oxidation damage layer 35 Second silicon oxide film 40 Silicon substrate 41 Gate insulating film 42 Polysilicon film 43 Resist pattern 44 Gate electrode 45 Damage layer 45A Oxidation damage layer 50 Silicon substrate 51 First silicon oxide film 52 Silicon nitride film 53 Element isolation groove 54 Second silicon Phosphorylation film 55 third silicon oxide film 60 a dry-etching apparatus 61 the chamber 62 the sample stage 63 gas supply ports 64 bias power supply source 65 bias power monitor 66 timer 67 source power supply 70 object to be etched 71 plasma S _G source power applied Indication signal

──────────────────────────────────────────────────続 き Continuation of front page (56) References JP-A-8-288256 (JP, A) JP-A-11-238722 (JP, A) JP-A-1-106432 (JP, A) JP-A 9-1998 82495 (JP, A) JP-A-3-280536 (JP, A) JP-A-11-251292 (JP, A) JP-A-11-145111 (JP, A) JP-A 2001-156051 (JP, A) JP-A-7-183097 (JP, A) JP-A-8-213362 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 21/3065 C23F 4/00

Claims (18)

(57) [Claims] A dual power supply type dry etching system capable of independently controlling a source power for generating plasma in a chamber and a bias power for drawing ions in the plasma to an object to be etched in the chamber. A dry etching method using an apparatus, comprising: installing a substrate having at least a member including silicon exposed in the chamber; and introducing a process gas including at least oxygen into the chamber in which the substrate is installed. And etching the member by generating plasma comprising the process gas by applying the source power and drawing ions in the plasma into the member by applying the bias power. The step of performing etching on the member includes the step of: The dry etching method which comprises the engineering <br/> extent for generating the plasma by initiating the application of the bias power before oxidation at the surface proceeds. 2. The dry etching according to claim 1, wherein the step of etching the member includes a step of starting the application of the bias power before starting the application of the source power. Method. 3. The step of performing etching on the member includes the step of: so that an effective value of the source power reaches a second set value after the effective value of the bias power reaches a first set value. 2. The dry etching method according to claim 1, further comprising a step of applying power and bias power. 4. The dry etching method according to claim 1, wherein said member is a silicon substrate, a polysilicon film, an amorphous silicon film, or a silicide film. 5. A dual power source dry etching system capable of independently controlling a source power for generating plasma in a chamber and a bias power for drawing ions in the plasma to an object to be etched in the chamber. A method of manufacturing a semiconductor device using a device, comprising: a step of forming a mask pattern having an opening in an element isolation formation region on a silicon substrate; and the silicon substrate having the mask pattern formed in the chamber. Installing a process gas containing at least oxygen into the chamber in which the silicon substrate is installed, generating plasma comprising the process gas by applying the source power, and applying the bias power. By drawing ions in the plasma into the silicon substrate. Forming an element isolation groove in the silicon substrate by etching the silicon substrate, wherein the step of forming the element isolation groove is performed before oxidation in an exposed portion of the silicon substrate progresses. Starting the application of the bias power to generate the plasma
A method of manufacturing a semiconductor device, comprising the steps of: 6. The semiconductor device according to claim 5, wherein the step of forming the element isolation groove includes a step of starting the application of the bias power before starting the application of the source power. Manufacturing method. 7. The method according to claim 7, wherein the step of forming the element isolation groove includes the step of: so that an effective value of the source power reaches a second set value after the effective value of the bias power reaches a first set value. 6. The method according to claim 5, further comprising the step of applying power and bias power. 8. A dual power source dry etching system capable of independently controlling a source power for generating plasma in a chamber and a bias power for drawing ions in the plasma to an object to be etched in the chamber. A method of manufacturing a semiconductor device using a device, comprising: forming a conductive film containing at least silicon on a substrate; forming a mask pattern covering a gate electrode formation region on the conductive film; Installing the substrate on which the conductive film and the mask pattern are formed, introducing a process gas containing at least oxygen into the chamber in which the substrate is installed, and applying the source power to the process. A plasma consisting of gas is generated, and ions in the plasma are generated by applying the bias power. Forming a gate electrode made of the conductive film by etching the conductive film by drawing the conductive film into the conductive film, and forming the gate electrode in the exposed portion of the conductive film. A method for manufacturing a semiconductor device, comprising: generating the plasma by starting application of the bias power before oxidation proceeds. 9. The method according to claim 8, wherein the step of forming the gate electrode includes the step of starting the application of the bias power before starting the application of the source power. Method. 10. The step of forming the gate electrode, wherein the source power and the source power are adjusted so that the effective value of the source power reaches a second set value after the effective value of the bias power reaches a first set value. 9. The method according to claim 8, further comprising the step of applying a bias power. 11. The method according to claim 8, wherein the conductive film is a polysilicon film, an amorphous silicon film, or a silicide film. 12. Dual-source dry etching capable of independently controlling a source power for generating plasma in a chamber and a bias power for drawing ions in the plasma into an object to be etched in the chamber. A method of manufacturing a semiconductor device using a device, comprising: installing a substrate in which at least a member containing silicon is exposed in the chamber; introducing a first process gas into the chamber; Generating a first plasma made of the first process gas by applying the first process gas and drawing ions in the first plasma into the member by applying the bias power, thereby etching the member. And after the step of etching the member,
Evacuating the first process gas from the chamber;
Then, a step of introducing a second process gas containing at least oxygen into the chamber while the substrate is installed in the chamber, and applying the source power without applying the bias power. By generating a second plasma comprising a process gas ,
Oxidizing a damaged layer generated in the member in a step of performing etching on the member while the substrate is installed ; and removing the substrate from the chamber, and then cleaning the substrate, thereby oxidizing the substrate. Removing the damaged layer. 13. The member is a silicon substrate, the step of etching the member includes the step of forming an element isolation groove in the silicon substrate, and the step of oxidizing the damaged layer includes the step of 13. The method of manufacturing a semiconductor device according to claim 12, further comprising a step of oxidizing the damaged layer formed near a wall surface and a bottom surface of the element isolation groove in the substrate. 14. The member is a conductive film containing at least silicon formed on the substrate, and the step of etching the member forms a gate electrode made of the conductive film on the substrate. 13. The method according to claim 12, wherein the step of oxidizing the damaged layer includes the step of oxidizing the damaged layer formed on a side surface of the gate electrode. 15. The method according to claim 14, wherein the conductive film is a polysilicon film, an amorphous silicon film, or a silicide film. 16. Dual power source dry etching capable of independently controlling source power for generating plasma in a chamber and bias power for drawing ions in the plasma into an object to be etched in the chamber. A method of manufacturing a semiconductor device using a device, comprising: installing a silicon substrate in which an element isolation groove is formed in the chamber; and a process including at least oxygen in the chamber in which the silicon substrate is installed. A step of introducing a gas, and by generating a plasma made of the process gas by applying the source power without applying the bias power, the vicinity of a wall surface and a bottom surface vicinity of the element isolation groove in the silicon substrate. Oxidizing to form a silicon oxide film; and After removal, a method of manufacturing a semiconductor device, characterized in that a step of forming a embedded device separating the silicon oxide insulation film on the element isolation grooves are formed. 17. The step of forming the element isolation includes forming the insulating film on the silicon substrate so that the element isolation groove is completely filled, and then including the surface of the insulating film. 17. The method of manufacturing a semiconductor device according to claim 16, further comprising the step of: planarizing the substrate by a CMP method to remove a portion of the insulating film outside the element isolation trench. 18. A source power for generating plasma in a chamber and a bias power for drawing ions in the plasma into an etching target made of a silicon-containing member in the chamber can be independently controlled. A power supply type dry etching apparatus, wherein a sample stage arranged in the chamber and a process gas containing oxygen gas are introduced into the chamber.
A gas supply port, a bias power supply for applying a bias power to the sample stage
And means, and a source power supply means connected to the timer, the bias power supply unit initializes to operate the timer simultaneously generating the plasma by initiating the application of the bias power, wherein source power supply means, a dry etching apparatus, characterized in that the elapsed time measured by the timer starts the application of the source power when it reaches a predetermined time.