JP3339331B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device including a step of patterning a conductive film to be an electrode or a wiring by a lift-off method.

[0002]

2. Description of the Related Art As a method of processing electrodes and wirings of a semiconductor device, for example, as shown in FIG. 4A, a resist region 43 surrounded by a resist film 43 formed on a semiconductor substrate 41 is formed. Is used as a mask to form a metal film 45 by a vacuum deposition process, which is immersed in an organic solvent such as acetone to remove the resist film 43 and the metal film 45o formed on the resist film 43 by a lift-off method. Formation is often used.

In the pattern formation by the lift-off method, a thin metal film is formed on the side wall of the resist film 43 of the semiconductor substrate 41 due to the scattering and diffusion of the deposited metal particles during the vacuum deposition of the metal film 45. Is formed. The side wall adhesion layer 45s prevents the organic solvent from penetrating into the resist film. For this reason, a method is usually employed in which the semiconductor substrate 41 is immersed in an organic solvent and mechanical force such as ultrasonic vibration is applied to accelerate the destruction of the side wall adhesion layer 45s.

[0004]

However, the cross-sectional shape of the positive resist film 43 which is usually used is not a vertical shape but rather a forward tapered shape. Therefore, when the metal film 45 becomes thicker, the side wall adhesion layer 45s becomes thicker. As a result, the lift-off processing time becomes longer.

Further, as shown in FIG. 4B, the metal film 45 having a predetermined pattern formed after the lift-off process has a sidewall adhesion layer 4 which is not completely removed by the lift-off.
5s may adhere as burrs 45a or the metal film 4
5 on the surface of the semiconductor substrate 41 in the vicinity of the
5b) or remain in a state protruding from the metal film 45 (burrs 45c). As a result, there is a problem that the wiring is disconnected or short-circuited at the time of multilayer wiring.

Conventionally, various measures have been taken for the cross-sectional shape of the resist film 43 in order to reduce the thickness of the side wall adhesion layer 45s of the resist film 43.

For example, as shown in FIG. 5, after exposure of the positive resist film 51, chlorobenzene treatment or irradiation with Deep UV light or the like is performed to make the surface layer of the resist film 51 hardly soluble in a developing solution. After the development, the resist film 51 is developed to make the cross-sectional shape of the resist film 51 close to a T-shape (the surface layer is made upright), or as shown in FIG. 6, a single resist film 61 is formed. After that, the entire surface is exposed, and after increasing the sensitivity of the resist, a resist film 61 is further formed thereon, pattern exposure and development are performed, and the cross-sectional shape of the resist film 61 is formed into an inverse tapered shape. I have been.

However, none of these methods can reduce the accuracy of the resist pattern or sufficiently prevent metal particles entering obliquely from entering the side wall of the resist film during vacuum deposition. Could not be completely prevented.

Accordingly, an object of the present invention is to solve the above-mentioned problems, to provide a method of manufacturing a semiconductor device capable of forming a pattern having excellent dimensional accuracy by significantly reducing a lift-off processing time and preventing the occurrence of burrs. Is to do.

[0010]

According to a first aspect of the present invention, a photoresist film is formed on a substrate or a film formed thereon by only a post-exposure heat treatment.
Surface resist layer that is inverted and a diazo / novolak type
From the lower resist layer formed by the photoresist
After forming the two layers comprising, a resist pattern is formed, after which the surface resist layer is reversed to insolubilize by machining the lower resist layer to undercut shape with respect to the surface resist layer is dissolved from the resist side wall Thereafter, a conductive film is formed on the resist pattern, and the resist pattern is dissolved and the conductive film on the resist pattern is removed to perform patterning.

The invention according to claim 2 is a method wherein the lower resist layer is formed with a thickness of 1.0 to 2.5 μm and the surface resist layer is formed with a thickness of 2.0 to 4.0 μm. is there. According to the above configuration, at the time of vacuum deposition of the conductive film, metal particles obliquely incident on the resist pattern are blocked by the forward-tapered surface resist layer, and thus are deposited on the lower resist layer which is an undercut portion. No metal particles adhere. As a result, the side wall adhesion layer connected to the metal pattern portion serving as the electrode / wiring is not formed, so that the lift-off processing time can be greatly reduced, and no burrs are generated on the outer peripheral portion of the metal pattern formed by the lift-off processing. .

[0012]

Next, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

First, a method of manufacturing a resist pattern according to the present invention will be described with reference to FIG.

As shown in FIG. 2A, the semiconductor substrate 11
A positive resist of diazo / novolak type is formed to a thickness of about 1.0 to 2.0 μm on the surface of the substrate to form a lower resist layer 13.

Next, as shown in FIG. 2B, a positive type photoresist of AZ5200 series (Shipley Co., Ltd.), which is often used for image reversal technology, is applied on the lower resist layer 13 as shown in FIG. The surface resist layer 15 is formed with a thickness of about 4.0 μm. Incidentally, the positive type photoresist of the surface resist layer 15 is made of a normal diazo /
Compared to a novolak-type positive photoresist, it is reversed to a negative type only by heat treatment without performing diffusion treatment of amine catalyst after exposure, and the exposed negative type resist is insoluble in alkaline developer. Having.

Then, as shown in FIG. 2C, pattern exposure and development are performed on the resist layers 13 and 15 to form a resist pattern 10.

The process so far is a standard process, and the cross-sectional shape of the resist is a forward tapered shape.

Next, after the entire surface of the resist pattern 10 is exposed, a heat treatment is performed on a hot plate at a temperature of 110 to 120 ° C. for 60 to 300 seconds to form a surface resist layer 15 as shown in FIG. To a negative resist layer 15n
To make it insoluble in an alkaline developer.

Finally, development processing is again performed for 20 to 30 times.
Seconds. As a result, since the surface resist layer 15n inverted to the negative type is insoluble in the alkali developing solution, only the lower resist layer 13 is dissolved in the alkali developing solution from the side wall of the resist, and as shown in FIG. The lower resist layer 13 is different from the forward tapered surface resist layer 15n.
It becomes an undercut shape, and the resist pattern 10 of the present invention is formed.

The surface resist layer 1 shown in FIG.
After inverting 5n to a negative type, before the final development processing shown in FIG. 2E, the entire resist pattern is exposed again in order to increase the dissolution rate of the underlying resist layer 13 in an alkali developing solution. Further, the resist cross-sectional shape of the present invention shown in FIG.

Next, when forming a metal pattern to be an electrode and a wiring, first, a metal is vacuum-deposited on the resist pattern 10 shown in FIG.
Is formed. This state is shown in FIG.

FIG. 1 is a sectional view of a semiconductor substrate having a resist pattern 10 formed according to the present invention and a metal pattern formed using the resist pattern 10 as a mask.

As shown in FIG. 1, a metal pattern 20p of the present invention is surrounded by a resist pattern 10 and is formed on a semiconductor substrate 11 so as to be separated from a side wall adhesion layer 20s.

Then, the semiconductor substrate 30 on which the metal film 20 is formed is immersed in an organic solvent such as acetone to remove the resist layers 13 and 15 and the metal film 20o formed on the surface resist layer 15. As a result, only the metal pattern 20p serving as the electrode / wiring of the semiconductor element remains. FIG. 3 shows the metal pattern 20p thus formed.

According to the method of the present invention, metal particles obliquely incident on the resist pattern 10 at the time of vacuum deposition are blocked by the surface resist layer 15 having a forward tapered shape, and the lower resist is undercut with respect to the surface resist layer 15. No deposited metal particles adhere to the layer 13, and no metal film is formed on the undercut portion.

As a result, the metal pattern 20p of the present invention is not formed integrally with the side wall adhesion layer 20s, so that the lift-off processing time can be greatly reduced, and when the lift-off processing is performed next, the outer peripheral portion of the metal pattern 20p There is no burr at all. Further, since the metal film is not formed in the undercut portion, there is almost no difference (dimension conversion amount) between the resist dimension and the finished dimension, and a metal pattern with high dimensional accuracy can be obtained.

In this embodiment, an example has been described in which the metal film 20 is formed as a conductive film on the semiconductor substrate 11, but the substrate on which the conductive film is formed may be an insulating substrate, an insulating film, or the like. But it goes without saying that it is good.

[0028]

In summary, according to the present invention, the conductive film pattern and the side wall adhesion layer are not integrally formed, so that the lift-off processing time can be greatly reduced.

Further, since no burrs are generated on the finished conductive film pattern, there is almost no difference between the resist dimension and the finished dimension (dimension conversion amount), and a pattern with high dimensional accuracy can be obtained. There is no problem that the wiring is disconnected or short-circuited.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing a state where a conductive film pattern is formed using a resist pattern formed on a semiconductor substrate as a mask according to the present invention.

FIG. 2 is a diagram illustrating a method of forming a resist pattern formed on a semiconductor substrate according to the present invention.

FIG. 3 is a cross-sectional view showing a state where a lift-off process has been performed on the semiconductor substrate shown in FIG. 1;

4A and 4B are diagrams showing a metal pattern formed by a conventional method, in which FIG. 4A is a cross-sectional view showing a state in which a metal film is formed using a positive photoresist film as a mask, and FIG. FIG. 4 is a cross-sectional view showing a state where a lift-off process has been performed on the semiconductor substrate of FIG.

FIG. 5 is a cross-sectional view showing a state in which a metal pattern is formed using a positive photoresist film formed on a semiconductor substrate by a conventional method as a mask.

FIG. 6 is a cross-sectional view showing a state in which a metal pattern is formed using a positive photoresist film formed on a semiconductor substrate by a conventional method as a mask.

[Explanation of symbols]

 Reference Signs List 10 resist pattern 11 semiconductor substrate 13 lower resist layer 15 surface resist layer 20 conductive film (metal film)

Claims (2)

(57) [Claims] 1. A photoresist film is inverted on a substrate or a film formed thereon only by a heat treatment after exposure.
Surface resist layer and diazo / novolak photo
A resist pattern is formed after forming a two-layer structure comprising a lower resist layer formed by a resist, and then the surface resist layer is inverted and insolubilized, and the lower resist layer is dissolved from the resist side wall to form a surface resist layer. And then forming a conductive film on the resist pattern, dissolving the resist pattern and removing the conductive film on the resist pattern for patterning. A method for manufacturing a semiconductor device. 2. The method according to claim 1, wherein the lower resist layer has a thickness of 1.0 to 2.5.
μm , and the thickness of the surface resist layer is 2.0-4.
2. The method for manufacturing a semiconductor device according to claim 1, wherein said semiconductor device is formed to have a thickness of 0 μm.