JP3330214B2 - Method of forming multilayer resist pattern and method of manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a multi-layer resist pattern and a method of manufacturing a semiconductor device using the multi-layer resist pattern, and more particularly to forming a resist pattern of each layer in a desired pattern shape with good reproducibility. And a method of manufacturing a semiconductor device using the multilayer resist pattern.

[0002]

2. Description of the Related Art Conventionally, in a compound semiconductor device such as a GaAs FET, for example, a T-type gate electrode (hereinafter, referred to as a T-type gate) is used as a gate electrode in order to compensate for an increase in gate resistance due to a shortened gate length. Have been. FIG. 6 shows the T-type gate in the conventional compound semiconductor device as 2
FIG. 4 is a cross-sectional view showing a step of forming a resist pattern using a multilayer resist pattern in which three different resist patterns are stacked. In the drawing, 1 is a compound semiconductor substrate, 1a is a recess, 2 is a lower resist pattern, 2a is an opening, 3 Is an upper resist pattern, 3a is an opening, 4 is a T-type gate, 30
Is a resist film, and 40 is a gate metal.

Hereinafter, a process for forming a T-type gate will be described with reference to the drawings. First, after a resist film (not shown) is formed on the compound semiconductor substrate 1, pattern exposure and development are performed on the resist film to form a lower resist pattern 2 having an opening 2a as shown in FIG. To form Next, as shown in FIG. 6B, a resist film 30 is formed on the lower resist pattern 2 and the compound semiconductor substrate 1, and then the resist film 30 is subjected to pattern exposure and development, so 2), an upper resist pattern 3 is formed. At this time, the opening 2 is placed on the opening 2a.
An opening 3a whose opening width is larger than a is formed. Next, the compound semiconductor substrate 1 is subjected to isotropic etching using the lower resist pattern 2 and the upper resist pattern 3 as masks, and as shown in FIG.
To form Next, as shown in FIG. 6 (e), a gate metal 40 is deposited on the entire surface of the compound semiconductor substrate 1 and lifted off. As shown in FIG. 6 (f), a T-type gate is formed on the bottom of the recess 1a. 4 are formed.

[0004]

In the process of forming a conventional T-type gate shown in FIG. 6, two different resist patterns are laminated to form a multilayer resist pattern. Usually, a resist film is formed. Is performed by applying a photoresist material in which a photosensitive resin is dissolved in a solvent or a photoresist material in which a resin is dissolved in a solvent together with a photosensitive agent to a required thickness on a surface on which a film is to be formed, and evaporating (evaporating) the solvent. Will be

FIG. 6 shows a state where two resist patterns are formed in an ideal state. As shown in FIG.
In order to selectively pattern the resist film 30 at the time of forming the resist film 30, that is, the photoresist material for forming the resist film 30 is
When coating on the top, it is necessary that the lower resist pattern 2 does not dissolve in the solvent in the photoresist material. However, at present, general-purpose photoresist materials produced industrially have similar components, and two types of photoresist materials satisfying such conditions, that is, one resin is used in the other solvent. It is extremely difficult to select two types of photoresist materials that do not dissolve in water from general-purpose photoresist materials that are industrially produced. In particular, many general-purpose photoresist materials suitable for microfabrication, which can form an opening pattern of 2 μm or less for forming the T-type gate as described above, are often made of a novolak resin which is sensitive to ultraviolet light. Together with a carboxylic acid ester-based solvent such as ethylcellosolve acetate (ECA), ethyl lactate (EL), propylene glycol monomethyl ether acetate (PGMEA), and methyl methoxypropinate (MMP). Therefore, it is not possible to select two types of photoresist materials in which one resin does not dissolve in the other solvent.

Therefore, in practice, when the step of forming the T-type date shown in FIG. 6 is performed, when the resist film 30 for forming the upper resist pattern 3 is formed, the resist film 30 is formed. The lower resist pattern 2 is dissolved in the solvent of the photoresist material to be used, and as shown in FIG.
As a result, a mixing layer 5 in which the lower resist pattern 2 and the resist film 30 are mixed is formed. As shown in FIG. 7B, when the resist film 30 is patterned, an opening penetrating the substrate surface can be formed. As a result, there arises a problem that a T-type gate electrode cannot be formed.

[0008] As shown in FIG.
Does not completely cover the surface of the substrate 1, an opening penetrating the substrate surface can be formed in the resist film 30 by patterning the resist film 30, but the thickness of the mixing layer 5 is small. It is not uniform and is not always formed to have the same thickness, which causes a problem that an opening having a desired opening width cannot be formed with good reproducibility.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and a method of forming a multilayer resist pattern capable of forming a resist pattern of each layer into a desired pattern shape with good reproducibility. An object of the present invention is to provide a method for manufacturing a semiconductor device using a multilayer resist pattern.

[0009]

According to a method of forming a multilayer resist pattern according to the present invention, a first resist pattern having an overhang-shaped opening is formed on a semiconductor substrate by optical exposure . The pattern is heated to a temperature equal to or higher than the glass transition temperature, and a second resist pattern is formed on the first resist pattern heated to a temperature equal to or higher than the glass transition temperature.

Further, in the method of manufacturing a semiconductor device according to the present invention, the overhang on the semiconductor substrate by the optical exposure is provided.
Forming a first resist pattern having a shaped opening ,
Heating the first resist pattern to a temperature equal to or higher than the glass transition temperature, forming a second resist pattern on the first resist pattern heated to a temperature equal to or higher than the glass transition temperature; After depositing a gate metal on the entire surface, the T-type gate is formed by removing the gate metal deposited on the second resist pattern together with the first and second resist patterns. .

Further, in the method of manufacturing a semiconductor device according to the present invention, the overhang on the semiconductor substrate by the optical exposure
Forming a first resist pattern having a shaped opening ,
Heating the first resist pattern to a temperature equal to or higher than the glass transition temperature, forming a second resist pattern on the first resist pattern heated to a temperature equal to or higher than the glass transition temperature; After depositing a gate metal on the entire surface, the gate metal deposited on the second resist pattern is removed together with the first and second resist patterns to form an air bridge wiring. .

Furthermore, the method of forming the multi-layer resist pattern according to the present invention, the optical exposure, O on a semiconductor substrate
Forming a first resist pattern having a bar-hanging opening, curing the surface of the first resist pattern by light irradiation, and heating the first resist pattern having the cured surface to a temperature equal to or higher than its glass transition temperature; And a second resist pattern is formed on the first resist pattern heated to a temperature equal to or higher than the glass transition temperature.

Further, in the method of manufacturing a semiconductor device according to the present invention, an overhang on a semiconductor substrate by optical exposure is provided.
Forming a first resist pattern having a shaped opening ,
The surface of the first resist pattern is cured by light irradiation, the first resist pattern having the cured surface is heated to a temperature equal to or higher than the glass transition temperature, and heated to a temperature equal to or higher than the glass transition temperature. Forming a second resist pattern on the first resist pattern, depositing a gate metal on the entire surface of the semiconductor substrate, and forming the second resist pattern together with the formed first and second resist patterns; The gate metal deposited on the resist pattern is removed to form a T-type gate.

Further, in the method of manufacturing a semiconductor device according to the present invention, the overhang on the semiconductor substrate by the optical exposure is performed.
Forming a first resist pattern having a shaped opening ,
The surface of the first resist pattern is cured by light irradiation, and the first resist pattern whose surface is cured is heated to a temperature equal to or higher than the glass transition temperature, and heated to a temperature equal to or higher than the glass transition temperature. Forming a second resist pattern on the first resist pattern, depositing a gate metal on the entire surface of the semiconductor substrate, and forming the second resist pattern together with the formed first and second resist patterns; The gate metal deposited on the resist pattern is removed to form an air bridge wiring.

[0015]

[0016]

[0017]

[0018]

According to the present invention, a first resist pattern having an overhang-shaped opening is formed on a semiconductor substrate by optical exposure, and the first resist pattern is heated to a temperature equal to or higher than its glass transition temperature. Since the second resist pattern is formed on the heated first resist pattern, the crystallization of the first resist pattern proceeds by the heating, and the second resist pattern is The second resist pattern is not dissolved in a solvent contained in a photoresist material used for formation, and the second resist pattern can be formed in a desired pattern shape.

Further, in the present invention, the first and the second
After the formation of the resist pattern, a gate metal is deposited on the entire surface of the semiconductor substrate.
By removing the gate metal deposited on the second resist pattern together with the resist pattern of
Since the mold gate is formed, with a small number of processes,
A T-type gate having a desired gate length can be formed with good reproducibility.

Further, in the present invention, the first and the second
After the formation of the resist pattern, a gate metal is deposited on the entire surface of the semiconductor substrate.
The air bridge wiring is formed by removing the gate metal deposited on the second resist pattern together with the resist pattern of the above, so that the air bridge wiring is formed with a smaller number of steps as compared with the related art. be able to.

Further, in the present invention, since the heating is performed after the surface of the first resist pattern is cured by light irradiation, the degree of deformation of the first resist pattern due to the heating is large. It is possible to prevent excessive bending, and it is possible to improve the dimensional controllability of the opening formed by the first resist pattern.

[0022]

[0023]

【Example】

Embodiment 1 FIG. FIG. 1 is a sectional view showing the steps of forming a T-type gate using a multilayer resist pattern in a compound semiconductor device according to Embodiment 1 of the present invention. FIG. 2 shows the steps shown in FIG. It is a sectional view for every process for dividing into a plurality of processes and explaining. In these figures, FIG.
The same reference numerals denote the same or corresponding parts, 6 denotes a lower resist pattern, 6a denotes an opening, 7 denotes an upper resist pattern, 7a denotes an opening, 70 denotes a resist film, and A denotes a state before the lower resist pattern 6a is heated. Opening 6a at
, B is the lowermost opening width of the opening 6a, and C is the uppermost opening width of the opening 6a.
Is the uppermost opening width of the opening 6a in a state where the lower resist pattern 6a is thermally deformed.

Hereinafter, the steps of forming a T-type gate electrode according to the present embodiment will be described with reference to FIGS. First, Fig. 1 (a)
As shown in FIG. 1, a lower resist pattern 6 having an opening 6a having an overhang shape is formed on a compound semiconductor substrate 1. Here, this step will be described in more detail with reference to FIG. First, an image reversal photoresist material in which a novolak resin and a photosensitive agent having a sensitivity peak to ultraviolet light are dissolved in a carboxylic acid ester-based solvent,
As shown in FIG. 2A, a resist film 60 was formed using Z5214E (trade name, manufactured by Hoechst).
Is formed on the substrate 1 so as to have a desired thickness, the mask member 8 is arranged at a predetermined position in the space above the substrate 1, and in this state, a resist is applied from a light source (not shown) arranged above the mask member 8. Ultraviolet light (for example, i-line or g
Line) to perform pattern exposure.

Next, the resist film 6 exposed to the pattern
2 is heated to 110 ° C. to 120 ° C. and reversal baked, as shown in FIG. 2B, a cross-linking reaction occurs in the portion 60 a of the resist film 60 which has been irradiated with light in the step of FIG. Progresses. Next, as shown in FIG.
After irradiating the entire surface of the resist film 60 with ultraviolet rays (for example, i-line or g-line) from a light source (not shown),
To tetramethylammonium hydroxide (TMA
H) and the like, when developed with an alkaline developer such as that shown in FIG.
As shown in FIG. 1A, a lower resist pattern 6 having an overhang-shaped opening 6a is formed. Here, assuming that the thickness of the lower resist pattern 6 is 0.6 μm, the uppermost opening width of the opening 6a specified by reference symbol A in the figure is 0.5 μm, and the lowermost opening width of the opening 6a specified by reference symbol B in the drawing. Is 0.8 μm.

Next, the lower resist pattern 6 formed of the above-mentioned image reversal photoresist material, AZ5214E, is heated to a temperature higher than its glass transition temperature (140 ° C., preferably 30 ° C. or higher than the glass transition temperature). And bake. Here, the lower resist pattern 6 is formed by evaporation of the residual solvent contained therein and reflow by heating.
1B, as shown in FIG. 1B, the terminal end adjacent to the opening 6a has a forward tapered shape, and the uppermost opening width of the opening 6a specified by the symbol C in FIG. 0.9μ
m.

Next, as shown in FIG. 1C, a resist film 70 having a desired thickness is formed on the substrate 1 and the lower resist pattern 6 by using the above-mentioned image reversal photoresist material, AZ5214E. After that, the same steps as those shown in FIG. 2 are performed to form an upper resist pattern 7 having an overhang-shaped opening 7a as shown in FIG. 1 (d). Here, the lower resist pattern 6 is heated to a temperature equal to or higher than its glass transition temperature in the step of FIG. 1 (b), so that its crystallization progresses and its crystallinity is increased. , Resist film 7
The swellability of the above-mentioned image reversal photoresist material, AZ5214E, which is used for formation of No. 0, with respect to the solvent component is remarkably reduced, and the dissolution into the solvent is suppressed.
Therefore, here, as shown in FIG. 1 (d), there is no mixing between the upper resist pattern 7 and the lower resist pattern 6 to form a mixing layer. It will be formed in a pattern shape.

Next, using the lower resist pattern 6 and the upper resist pattern 7 as masks, the compound semiconductor substrate 1
Is subjected to isotropic etching, and as shown in FIG.
After the formation of the recess 1a, a gate metal is deposited on the entire surface of the compound semiconductor substrate 1 and lifted off.
As shown in (f), a T-type gate (T
A mold recess gate 4 is formed.

In the step of forming the T-type gate according to the present embodiment, after forming the lower resist pattern 6, the lower resist pattern 6 is heated to a temperature higher than its glass transition temperature and baked to form a crystal. Since the upper resist pattern 7 is formed after that, the lower resist pattern 6 may dissolve in the solvent component of the resist solution used for the formation when the upper resist pattern 7 is formed. Suppressed, upper resist pattern 7
Can be formed in a desired pattern shape with good reproducibility. Therefore, according to the present embodiment, a mask pattern for forming the T-type gate 4 can be formed in a desired pattern shape with good reproducibility only by sequentially forming two different resist patterns, and the desired gate length can be reduced. T-type gate 4
Can be formed with a small number of steps and with good reproducibility.

As shown in FIG. 1B, when the lower resist pattern 6 is baked by heating to a temperature higher than its glass transition temperature, the openings 6a of the lower resist pattern 6 are formed.
1 has a forward tapered shape, so that the coverage at the time of gate metal deposition is improved, and FIG.
As shown in (f), the T-type gate has a thicker connecting portion between the eaves portion 4b and the support portion 4a, is stable in strength, and improves the reliability of the obtained semiconductor device. An effect can also be obtained.

Embodiment 2 FIG. The step of forming the T-type recess gate electrode according to the second embodiment is basically the same as the step shown in FIG. 1 of the first embodiment, and the positive resist is used instead of the image reversal photoresist material to form the lower resist pattern 6. In this case, a photoresist material is used.

Hereinafter, this step will be described in detail with reference to FIG. First, a lower resist pattern 6 having an opening 6a on a compound semiconductor substrate 1 is formed by dissolving a novolak resin and a photosensitive agent having a sensitivity peak in ultraviolet light in a carboxylate-based solvent, T
It is formed using HMR-iP3100 (trade name, manufactured by Tokyo Ohka Kogyo Co., Ltd.) (see FIG. 1A). Here, assuming that the thickness of the lower resist pattern 6 is 0.6 μm, FIG.
(a) The uppermost opening width of the opening 6a specified by the reference symbol A and the lowermost opening width of the opening 6a specified by the reference symbol B are 0.
5 μm.

Next, the above positive photoresist material, T
The lower resist pattern 6 formed by the HMR-iP 3100 is baked by heating to a temperature equal to or higher than its glass transition temperature (140 ° C.). Here, the lower resist pattern 6 has a forward tapered shape at the end portion adjacent to the opening 6a due to evaporation of the residual solvent contained therein and reflow due to heating, and the opening 6
The opening width at the uppermost part of the pattern a is 0.8 μm (see FIG. 1B). In addition, the crystallization of the lower resist pattern 6 progresses by the heating, and the degree of crystallization increases.

Next, when the same steps as those shown in FIGS. 1 (c) to 1 (e) are performed, the crystallinity of the lower resist pattern 6 is high as described above. Similarly, the upper resist pattern 7 can be formed into a desired pattern shape without forming a mixing layer between the upper resist pattern 7 and the lower resist pattern 6 (FIGS. 1 (c) to 1).
(e).) Then, a T-type gate 4 is formed on the bottom surface of the recess 1a of the compound semiconductor substrate 1 by performing gate metal vapor deposition and lift-off (see FIG. 1 (f)).

As described above, also in the second embodiment using the positive resist for forming the lower resist pattern, the T-gate 4 having a desired gate length and having a stable strength can be obtained.
With a small number of steps, the film can be formed with good reproducibility, and the same effect as in the first embodiment can be obtained.

In the first and second embodiments, immediately after the formation of the lower resist pattern 6, the lower resist pattern 6
Is heated to a temperature equal to or higher than the glass transition temperature and baked. However, the lower resist pattern 6 has a small molecular weight and causes a reflow due to thermal deformation when heated to a temperature equal to or higher than the glass transition temperature. When the degree is large, the opening 6a is completely closed by the heating, or the opening width fluctuates even if the opening 6a is not closed. Hereinafter, a third embodiment that can solve such a disadvantage will be described.

Embodiment 3 FIG. FIG. 3 is a cross-sectional view showing main steps in a process of forming a T-type recess gate of a compound semiconductor device according to Embodiment 3 of the present invention. In the drawings, the same reference numerals as those in FIGS. , 6
b is a cured layer formed on the surface of the lower resist pattern 6, and 9 is far ultraviolet rays.

The step of forming a T-type recess gate according to this embodiment is performed by forming a positive photoresist material in which a novolak resin and a photosensitive agent having a sensitivity peak in ultraviolet light are dissolved in a carboxylate-based solvent on the compound semiconductor substrate 1. ,
As shown in FIG. 3A, a lower resist pattern 6 is formed by using HPR 1182 (trade name, manufactured by Fuji Hunt Co., Ltd.), and as shown in FIG.
(0 nm to 300 nm) 9 is irradiated onto the surface of the lower resist pattern 6 under irradiation conditions of, for example, 0.5 W / cm ² and 100 ° C. to cure the surface, and the lower resist pattern 6 having the cured surface is cured. Is the glass transition temperature (110
° C) and baking by heating to a temperature higher than or equal to
The upper resist pattern is formed in the same manner as described above. Here, the above-mentioned positive type photoresist material, HPR1182 [trade name, manufactured by Fuji Hunt Co., Ltd.]
Is the positive photoresist material used in Example 2 above, THMR-iP3100 [manufactured by Tokyo Ohka Kogyo Co., Ltd.
Novolak resin has a smaller molecular weight than that of [No.

In this embodiment, the surface of the lower resist pattern 6 is irradiated with far ultraviolet rays 9 to form a hardened layer 6b, and then the lower resist pattern 6 is heated to a temperature higher than its glass transition temperature. Since the lower resist pattern 6 is not deformed by the heating, the lower resist pattern 6 is not deformed such that the opening 6a is closed or the opening width of the opening 6a is changed. A T-type gate electrode having a gate length can be formed with good reproducibility.

Embodiment 4 FIG. FIG. 4 is a sectional view showing the steps of forming a T-type recess gate using a multilayer resist pattern in a compound semiconductor device according to Embodiment 4 of the present invention. The corresponding portions are shown, 10 is a resist film, and 10a is an opening.

Hereinafter, T based on this embodiment will be described with reference to FIG.
The step of forming the mold recess gate electrode will be described. First, FIG.
As shown in (a), a resist film 10 is formed on a compound semiconductor substrate by using a positive photoresist material in which cyclopentanone is dissolved in polydimethyl glutarimide (PMGI) having sensitivity to far ultraviolet rays. After the formation, the resist film 10 is baked by heating to a temperature higher than its glass transition temperature (170 ° C.). Here, the resist film 1
In the case of 0, crystallization proceeds, and the degree of crystallization increases.

Next, as shown in FIG. 4B, an image reversal photoresist material, A
Using Z5214E (trade name, manufactured by Hoechst), a lower resist pattern 6 having an overhang-shaped opening 6a is formed on the resist film 10. Next, far ultraviolet rays (wavelength: 200 nm to 300 n
m) is applied to the entire surface of the substrate 1 and developed with an alkali developing solution such as tetramethylammonium hydroxide (TMAH). As shown in FIG. An opening 10a having an opening width equal to the opening width A of the uppermost portion of the opening 6a is formed, and the side wall of the opening 10a is perpendicular to the substrate. Here, such an opening 10a can be formed by:
The lower resist pattern 6 (that is, novolak resin) is i
This is because light having a wavelength equal to or less than a line (wavelength: 365 nm) is not transmitted at all.

Next, when the lower resist pattern 6 is baked at a temperature higher than its glass transition temperature (140 ° C.), as shown in FIG. The pattern 6 has a forward tapered shape at the end portion adjacent to the opening 6a, and at the same time, its crystallization proceeds. Next, in the same manner as in Example 1, the lower resist pattern 6 was formed using the image reversal photoresist material, AZ5214E, as shown in FIG.
An upper resist pattern 7 is formed thereon. Here, the crystallinity of both the lower resist pattern 6 and the resist film 10 is increased by the baking, and the solubility of the image reversal photoresist material AZ5214E used for forming the upper resist pattern 7 in the solvent component is extremely low. The upper layer resist pattern 7
Is formed in a desired pattern shape without forming a mixing layer between the lower resist pattern 6 and the resist film 10.

Next, the compound semiconductor substrate 1 is subjected to isotropic etching using the lower resist pattern 6, the upper resist pattern 7, and the resist film 10 as a mask in the same manner as in the first embodiment, as shown in FIG. ), The recess 1a
Is formed, a gate metal is vapor-deposited on the entire surface of the compound semiconductor substrate 1 and lifted off. As shown in FIG. 4 (g), a T-type gate (T-type recess gate) 4 is formed on the bottom surface of the recess 1a. You.

As described above, in the step of forming the T-type recess gate of this embodiment, the opening 10a formed in the resist film 10 is formed.
Since the opening width is equal to the uppermost opening width A of the overhang-shaped opening 6a formed when the lower-layer resist pattern 6 is formed, the side wall of the opening is perpendicular to the substrate 1. In the process of Example 1, the gate length is the lowermost opening width B of the overhang-shaped opening 6a.
However, in this embodiment, the gate length is the uppermost opening width A of the overhang-shaped opening 6a.
Thus, a T-type gate having a shorter gate length than the T-type gate obtained by the process of the first embodiment can be formed with high reproducibility. Therefore, according to the present embodiment, there is an effect that a compound semiconductor device (FET) having excellent switching characteristics as compared with the first embodiment can be manufactured. In the first to fourth embodiments, the example in which the T-type gate is formed using the multilayer resist pattern is described. In the fifth embodiment, an example in which the air bridge wiring is formed using the multilayer resist pattern will be described.

Embodiment 5 FIG. FIG. 5 is a sectional view of each step showing a step of forming an air bridge wiring connecting the plurality of FETs in a compound semiconductor device having a plurality of FETs formed on the same substrate according to the fifth embodiment of the present invention. , 1 is a compound semiconductor substrate, 50a and 50b are FETs formed on the compound semiconductor substrate 1, 11a and 11b are gates, 12a and 12b are sources, and 13 is an FET 50a and
A drain commonly provided for 50b, 6d is a lower resist pattern, and 7b is an upper resist pattern.

Hereinafter, the steps of forming the air bridge wiring according to the present embodiment will be described with reference to FIG. First, FIG.
As shown in (a), a plurality of FETs 50a and 50b are formed in a predetermined region of the compound semiconductor substrate 1. Where FET
50a and the FET 50b are formed with the drain 13 as both drains.

Next, the above-mentioned image reversal photoresist material, AZ, is applied to the entire surface of the compound semiconductor substrate 1.
After a resist film having a predetermined thickness (not shown) was formed using 5214E (trade name, manufactured by Hoechst), the resist film was patterned in the same manner as in Example 1 to obtain an FET.
A lower resist pattern 6d is formed so that an opening 6e is formed on each of the sources 12a and 12b of the FET 50a and the FET 50b. Thereafter, the lower resist pattern 6d is heated to a temperature higher than its glass transition temperature (140 ° C.). After heating and baking, the state shown in FIG.

Next, a resist film having a predetermined thickness (not shown) is formed on the lower resist pattern 6d and the opening 6e by using the above-mentioned image reversal photoresist material, AZ5214E. By patterning the film, an opening 7 is formed on the lower resist pattern 6d and the opening 6e as shown in FIG.
An upper resist pattern 7b is formed so that c is formed. Here, the lower layer resist pattern 6d has a higher degree of crystallinity due to the above-mentioned heating, and the solubility of the image reversal photoresist material AZ5214E used for forming the upper layer resist pattern 7b in the solvent component is extremely low. Resist pattern 7b
Is formed such that an opening 7c is reliably left in a region where a wiring is to be formed on the lower resist pattern 6d without forming a mixing layer with the lower resist pattern 6d. Next, a wiring metal is deposited on the entire surface of the substrate 1 and lifted off to form an air bridge wiring 14 as shown in FIG. 5D.

As described above, in the present embodiment, after the step of forming the multilayer resist pattern (the lower resist pattern 6d and the upper resist pattern 7b), the air bridge wiring 14 is reliably formed only by performing the vapor deposition and lift-off of the wiring metal. Therefore, the number of steps is reduced as compared with the conventional method of forming an air bridge wiring, which requires at least an insulating film forming step and an insulating film etching step in addition to the resist pattern forming step. be able to. Therefore, a semiconductor device can be manufactured more efficiently than in the past.

In the first to fourth embodiments, a negative image is obtained by using an image reversal photoresist material or a positive image is obtained by using a positive photoresist material in a resist pattern forming step. By exposing to the vapor of hexamethylene disilazarane (HMDS), a negative image may be obtained from a positive photoresist material in which a negative reaction proceeds.

In the fifth embodiment, the image reversal photoresist material is used for forming the resist pattern. However, the contact portion of the air bridge wiring, that is, the junction between the air bridge wiring 14 and the sources 12a and 12b is formed of T Since the restrictions on miniaturization such as the gate length of the mold gate are not strict and the width may be 2 μm or more, a resist pattern is formed using a generally used cyclized rubber-based negative photoresist material. You may make it.

[0053]

As described above, according to the method for forming a multilayer resist pattern according to the present invention, a first resist pattern having an overhang-shaped opening is formed on a semiconductor substrate by optical exposure . Is heated to a temperature equal to or higher than the glass transition temperature, and a second resist pattern is formed on the first resist pattern heated to a temperature equal to or higher than the glass transition temperature. Each of the second resist patterns is formed in a desired pattern shape with good reproducibility, and there is an effect that a multilayer resist pattern having a desired pattern shape can be formed with good reproducibility.

Further, according to the method of manufacturing a semiconductor device according to the present invention, after the formation of the second resist pattern, a gate metal is deposited on the entire surface of the semiconductor substrate and lifted off to form a T-type gate. As a result, a T-type gate having a desired gate length can be formed with a small number of steps with good reproducibility, and there is an effect that the manufacturing efficiency of the semiconductor device can be improved.

Further, according to the method of manufacturing a semiconductor device according to the present invention, after the formation of the second resist pattern, a gate metal is deposited on the entire surface of the semiconductor substrate and lifted off to form an air bridge wiring. As a result, the air bridge wiring can be formed in a smaller number of steps than in the related art, and there is an effect that the manufacturing efficiency of the semiconductor device can be improved.

Further, according to the method of forming a multilayer resist pattern according to the present invention, a first resist pattern having an overhang-shaped opening is formed on a semiconductor substrate by optical exposure, and the first resist pattern is formed on the semiconductor substrate. After curing the surface by light irradiation and heating the first resist pattern having the cured surface to a temperature equal to or higher than the glass transition temperature, the first resist pattern heated to a temperature equal to or higher than the glass transition temperature Since the second resist pattern is formed thereon, the first resist pattern can be prevented from being excessively deformed by the heating, and as a result, the opening formed by the formation of the first resist pattern can be prevented. This has the effect of improving the dimensional controllability of.

Further, according to the method of manufacturing a semiconductor device according to the present invention, after forming the second resist pattern, a gate metal is deposited on the entire surface of the semiconductor substrate and lifted off to form a T-type gate. As a result, a T-type gate having a desired gate length can be formed with a small number of steps and with high reproducibility, and there is an effect that the manufacturing efficiency of the semiconductor device can be further improved.

Further, according to the method of manufacturing a semiconductor device of the present invention, after forming the second resist pattern, a gate metal is deposited on the entire surface of the semiconductor substrate and lifted off to form an air bridge wiring. I decided to
The air bridge wiring can be formed in a smaller number of steps than before, without forming defects, and there is an effect that the manufacturing efficiency of the semiconductor device can be further improved.

[0059]

[0060]

[0061]

[Brief description of the drawings]

FIG. 1 is a sectional view of each step showing a step of forming a T-type gate using a multilayer resist pattern in a compound semiconductor device according to Embodiment 1 of the present invention.

FIG. 2 is a sectional view of each step for explaining the step shown in FIG. 1A in a plurality of steps.

FIG. 3 is a cross-sectional view showing main steps of a step of forming a T-type gate using a multilayer resist pattern in a compound semiconductor device according to Embodiment 3 of the present invention.

FIG. 4 is a sectional view showing the steps of forming a T-type gate using a multilayer resist pattern in a compound semiconductor device according to Embodiment 4 of the present invention.

FIG. 5 is a cross-sectional view showing a process of forming an air bridge wiring using a multilayer resist pattern in a compound semiconductor device according to Embodiment 5 of the present invention.

FIG. 6 is a cross-sectional view showing a step of forming a T-type gate of a conventional compound semiconductor device using a multilayer resist pattern.

FIG. 7 is a diagram illustrating a problem that occurs when a T-type gate of a conventional compound semiconductor device is formed using a multilayer resist pattern.

FIG. 8 is a diagram for explaining a problem that occurs when a T-type gate of a conventional compound semiconductor device is formed using a multilayer resist pattern.

[Explanation of symbols]

 6, 6d Lower resist pattern 6a, 6e, 7a, 10a Opening 6b Hardened layer 7, 7b Upper resist pattern 9 Far ultraviolet rays 10, 60, 70 Resist film 11 Gate 12a, 12b Source 13a, 13b Drain 14 Air bridge wiring

────────────────────────────────────────────────── ─── Continuation of the front page Examiner Kosuke Minami (56) References JP-A-4-218053 (JP, A) JP-A-62-181714 (JP, A) JP-A 5-90300 (JP, A) ( 58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 21/027 G03F 7/26 511

Claims (10)

(57) [Claims] The method according to claim 1 optical exposure, you heat forming a first resist pattern having openings overhanging on a semiconductor substrate, a resist pattern of the first to the glass transition temperature or higher Engineering And a step of forming a second resist pattern on the first resist pattern heated to a temperature equal to or higher than the glass transition temperature. By wherein optical exposure, you heat forming a first resist pattern having openings overhanging on a semiconductor substrate, a resist pattern of the first to the glass transition temperature or higher Engineering Forming a second resist pattern on the first resist pattern heated to a temperature equal to or higher than the glass transition temperature; and depositing a gate metal on the entire surface of the semiconductor substrate. A step of forming a T-type gate by removing a gate metal deposited on the second resist pattern, together with the second resist pattern. By wherein optical exposure, you heat forming a first resist pattern having openings overhanging on a semiconductor substrate, a resist pattern of the first to the glass transition temperature or higher Engineering Forming a second resist pattern on the first resist pattern heated to a temperature equal to or higher than the glass transition temperature; and depositing a gate metal on the entire surface of the semiconductor substrate. (1) a method of forming an air bridge wiring by removing a gate metal deposited on the second resist pattern together with the second resist pattern. 4. The method according to claim 1, wherein said first and second resist patterns are mainly composed of a novolak resin and a photosensitive agent having sensitivity to ultraviolet rays. A method of forming a multilayer resist pattern, wherein the method is formed using a resist material or a positive photoresist material. 5. The image reversal method according to claim 2, wherein said first and second resist patterns are mainly composed of a novolak resin and a photosensitive agent having sensitivity to ultraviolet rays. A method for manufacturing a semiconductor device, wherein the semiconductor device is formed using a photoresist material or a positive photoresist material. 6. A step of forming a first resist pattern having an overhang-shaped opening on a semiconductor substrate by optical exposure, a step of curing the surface of the first resist pattern by light irradiation, a first resist pattern surface is cured as engineering you heated to its glass transition temperature or higher, a second resist pattern on the first resist pattern on which is heated above its glass transition temperature or higher Forming a multi-layer resist pattern. 7. A step of forming a first resist pattern having an overhang-shaped opening on a semiconductor substrate by optical exposure, a step of curing the surface of the first resist pattern by light irradiation, a first resist pattern surface is cured as engineering you heated to its glass transition temperature or higher, a second resist pattern on the first resist pattern on which is heated above its glass transition temperature or higher Forming a gate metal on the entire surface of the semiconductor substrate, removing the gate metal deposited on the second resist pattern together with the formed first and second resist patterns. Forming a T-type gate by using the method. 8. A step of forming a first resist pattern having an overhang-shaped opening on the semiconductor substrate by optical exposure, a step of curing the surface of the first resist pattern by light irradiation, a first resist pattern surface is cured as engineering you heated to its glass transition temperature or higher, a second resist pattern on the first resist pattern on which is heated above its glass transition temperature or higher Forming a gate metal on the entire surface of the semiconductor substrate, removing the gate metal deposited on the second resist pattern together with the formed first and second resist patterns. Forming an air bridge wiring by using a method for manufacturing a semiconductor device. 9. The method of forming a multilayer resist pattern according to claim 6, wherein the first and second resist patterns are mainly composed of a novolak resin and a photosensitive agent having sensitivity to ultraviolet rays. A method for forming a multi-layer resist pattern, wherein the method is formed by using a resist material or a positive photoresist material, and curing the surface of the first resist pattern by irradiation with far ultraviolet rays. 10. The method of manufacturing a semiconductor device according to claim 7, wherein the first and second resist patterns are mainly composed of a novolak resin and a photosensitive agent having sensitivity to ultraviolet rays. A method for manufacturing a semiconductor device, comprising: forming a photoresist material or a positive photoresist material; and curing the surface of the first resist pattern by irradiation with far ultraviolet rays.