JP3398603B2 - Method of forming resist pattern and method of manufacturing semiconductor device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a resist pattern for forming a wiring or a gate electrode by lift-off, and in particular, a resist suitable for lift-off having a convex opening cross section with a narrow upper opening. The present invention relates to a pattern forming method.

In a manufacturing process of a semiconductor device, an opening for defining a wiring or a gate electrode is provided in a resist film on a substrate, a wiring or a gate electrode material is deposited on a bottom surface of the opening and an upper surface of the resist film, and then the resist film is removed. Therefore, a lift-off method is often used to form a wiring or a gate electrode made of a wiring or a gate electrode material deposited on the bottom surface of the opening.

It is preferable that the opening of the resist film has a cross-sectional shape in which the upper part of the opening is narrow and the lower part of the opening is wide so as to be suitable for lift-off. In addition, it is necessary to precisely control the opening size so that the wiring and the gate electrode can be miniaturized.

[0004]

2. Description of the Related Art The lift-off process is widely used in the manufacture of semiconductor devices as a method of forming wirings or gate electrodes. 3A and 3B are explanatory views of the electrode forming step and FIG. 4 is an explanatory view of the T-type electrode forming step, both of which show the gate electrode forming step by lift-off with a substrate sectional view.

In order to perform lift-off, first, referring to FIG. 3A, a resist film 10 is applied on a substrate 1, and the resist film 10 has an opening 10c having a convex cross-section whose upper surface is narrower than its lower surface. To form. Next, referring to FIG. 3B, after depositing the gate electrode material 5 on the upper surface of the resist film 10 and the bottom surface of the opening 10c by vapor deposition, the resist film 10 is formed.
Is removed together with the gate electrode material 5 deposited on its upper surface,
With reference to FIG. 3C, the gate electrode material 5 remaining on the bottom surface of the opening 10c is used as the gate electrode 6.

When a T-type gate electrode is formed, the process shown in FIG.
Referring to (a), an insulating film 12 having an opening 12c defining a gate width is formed on the upper surface of the substrate 1, and a resist film 10 having a convex opening 10c is formed thereon. Next, referring to FIG. 4B, the gate electrode material 5 is deposited and then lifted off to form the gate electrode 6 having a T-shaped cross section that fills the opening 12c with reference to FIG. 4C. It

In any of the liftoffs described above, the opening 1
The gate electrode 6 deposited on the bottom surface of 0c and the gate electrode material 5 deposited on the upper surface of the resist film 10 must be completely cut and separated. For this reason, it is desired that the cross-sectional shape of the opening 10c be a completely convex shape.

Conventionally, as a method of forming a convex opening having a narrow upper portion and a wide lower portion in a resist film provided on a substrate,
A method using a resist film having a multilayer structure is known. Hereinafter, a conventional method of forming a resist pattern will be described.

FIG. 5 is a sectional view of the first conventional example, and shows the step of forming a resist pattern in a sectional view perpendicular to the main surface of the substrate. Referring to FIG. 5A, first, a high-sensitivity resist film 21 and a low-sensitivity resist film 22 are sequentially stacked on the upper surface (main surface) of the substrate 1, and then exposure light 20 that defines an opening is irradiated to increase the height. The sensitive resist film 21 and the low sensitive resist film 22 are simultaneously exposed. At this time, the exposure region 22a of the low-sensitivity resist film 22 is narrow and the high-sensitivity resist film 21 is
The exposure area 21a of is widely exposed. This exposure area 21
A and 22a are removed by development, and referring to FIG. 5B, a convex opening 28c having a narrow upper portion and a wide lower portion is formed in the resist film.

However, in the method of forming a resist pattern in which resists having different sensitivities are laminated and a convex opening is formed by one exposure and development, the widths of the upper and lower portions of the opening are determined only by the width of the exposure light. However, it varies depending on other conditions such as exposure intensity and developing conditions. Therefore, it is difficult to precisely control the opening size. Moreover, the resist sensitivity often changes gently due to mixing that occurs between the stacked resist films. In this case, the cross section of the opening becomes an inverted trapezoid, and the ideal convex opening is not formed. In particular, in a spin-coated multilayer resist film, the amount of mixing in the central portion of the wafer where the discharged resist stays is large, and the amount of mixing in the peripheral portion of the wafer where the resist spreads due to rotation of the wafer is small. As a result, the aperture accuracy is deteriorated due to the in-plane distribution of the mixing amount on the wafer.

Therefore, a method of individually exposing each layer of the two-layer resist to improve the opening accuracy has been devised, and is disclosed in Japanese Laid-Open Patent Publication No. 60-34015. Figure 6
[FIG. 8] is a second conventional example cross-sectional process drawing, in which the resist pattern forming process is shown by a cross-sectional view perpendicular to the main surface of the substrate.

In this improved resist pattern forming method, referring to FIG. 6A, a lower resist film 23 is applied to the upper surface of the substrate 1 and then the first resist film 23 having the width L1 of the lower opening is exposed. The exposure area 23 having the width L1 is exposed by the light 7a.
a is formed. Next, referring to FIG. 6B, the upper resist film 24 is applied, and the width L2 (however, L2
<L1. The second exposure light 7b having a width of 4) is used to form an exposure region 24b having a width L2 in the upper layer resist film 24 immediately above the exposure region 23a of the lower layer resist film 23. Next, referring to FIG. 6C, the upper layer resist film 24 and the lower layer resist film 23 are sequentially developed by one development, the exposed regions 24a and 23a are removed, and the unexposed regions 24b and 23 are removed.
By leaving b, an opening 28c having a convex cross section with an upper width L2 and a lower width L1 corresponding to the exposure regions 24a and 23a is formed.

However, even with this improved resist pattern forming method, it is difficult to completely avoid the deterioration of the opening accuracy due to the mixing between the resist films. Further, when selecting a resist that can suppress this mixing and further develop the upper layer resist film and the lower layer resist film at the same time, the resist material that can be actually selected is considerably limited.

FIGS. 7 and 8 are a sectional view of a third conventional example and a sectional view of a fourth conventional example, respectively, showing a section perpendicular to the upper surface of the substrate. In the third conventional example, the exposure of the lower layer resist film in the second conventional example described above is an entire surface exposure. In this example, referring to FIG. 7A, after the lower layer resist film 25 is applied, the first exposure light 7a is applied to the entire surface of the substrate 1 to make the entire lower layer resist film 25 an exposure region. Next, referring to FIG. 7B, after the upper resist film 26 is applied, a second exposure light 7b having a width L2 above the opening is irradiated to expose the upper resist film 26 to the width L2.
The exposed area 26a is formed. Next, referring to FIG. 7C, the exposed area 26a of the upper layer resist film 26 is developed and removed, an opening 26c is opened in the upper layer resist film 26, and then the lower layer resist film 25 exposed immediately below the opening 26c is formed. develop. The lower resist film 25 is overdeveloped to form an opening 28c having a convex cross section.

However, in the method of exposing the lower resist film 25 on the entire surface, it is difficult to control the width of the opening 28c precisely because the lower width of the opening 28c varies depending on the development amount. As a result, when there are adjacent wirings, the upper resist film may peel off due to overdevelopment.

The problem of the laminated resist film described above can be avoided by using a single-layer resist film as in the fourth conventional example disclosed in Japanese Patent Laid-Open No. 5-291303. In this method, referring to FIG. 8A, after the negative type insulating resist film 11 is applied on the upper surface of the substrate 1, the entire surface of the insulating resist film 11 is exposed by leaving an unexposed region 11b corresponding to the gate width. To do. Next, the mixing prevention layer 3
Is formed, and a negative resist film 27 is applied thereon. Next, the entire surface of the resist film 27 is exposed to the exposure light 29 to be exposed, leaving the unexposed region 27b corresponding to the opening width. Then, the unexposed regions 27b and 11b are removed by development to form an opening 27c having a trapezoidal cross section in the resist film 27 and an opening having a rectangular cross section defining the gate width in the insulating resist film 11. Next, the gate electrode material 5 is deposited and the resist film 27 is lifted off to form the T-shaped gate electrode 6.

In this method, since the mixing prevention layer 3 is interposed between the insulating resist film 11 and the lift-off resist film 27, both resist materials can be selected without considering mixing. However, in this method, in order to make the opening 27c trapezoidal, the resist film 27 has to be a negative type, and a positive type resist cannot be used. In addition, since the resist pattern used for lift-off is formed by one-time exposure / development on one layer of the resist film 27, the change in the shape and size of the opening due to changes in the exposure / development conditions is large, and precise pattern formation is possible. Have difficulty.

[0018]

As described above, in the conventional method of forming the resist pattern for lift-off, there are two methods.
Since the layer resist film is formed by one exposure and development process,
Since there is a large change in the shape and size of the opening due to mixing between resist films or fluctuations in exposure / development conditions, there is the drawback that the resist pattern cannot be formed accurately.

Further, even with the method of forming a pattern by exposing the two-layer resist twice, there is a problem that the deterioration of the pattern accuracy due to the mixing cannot be avoided. Furthermore, in the method of exposing the lower resist film over the entire surface,
It is difficult to control the size of the lower part of the opening, and this has the drawback of inducing peeling of the upper resist film.

Furthermore, in the method of forming an inverted trapezoidal opening in the single-layer resist film, it is difficult to form a precise pattern because the trapezoidal shape changes depending on the exposure conditions. Furthermore, it is necessary to use a positive resist. There is a drawback that you cannot do it.

According to the present invention, an anti-mixing layer is interposed between two layers of resist films to prevent mixing, and two layers of resist films are separately deposited, exposed, and developed to form an exposed region. It is an object of the present invention to provide a method for forming a resist pattern, which accurately forms an opening having a convex cross section corresponding to the above.

[0022]

FIG. 1 is a sectional process drawing of a first embodiment of the present invention, showing a section perpendicular to the upper surface of a substrate in a region where an opening is formed in a resist film. FIG. 2 is a cross-sectional process diagram of a second embodiment of the present invention, showing a cross section perpendicular to the upper surface of the substrate in a region where an opening of a resist film is formed to form a T-type gate electrode.

In order to solve the above problems, a method of forming a resist pattern having a first structure of the present invention is described with reference to FIG. 1 in which a lower resist film 2 formed on a substrate 1 is exposed to light, A step of forming a first exposure region 2a defining a first opening 2c in the lower resist film 2, a step of providing a mixing prevention layer 3 on the entire surface of the lower resist film 2, and a step of forming the mixing prevention layer. 3, a step of forming an upper resist film 4 on the upper resist film 4 is performed, and then the upper resist film 4 is exposed to light so as to be narrower than the first opening 2c in a region on the first exposed region 2a of the upper resist film 4. Forming a second exposure region 4a defining a second opening 4c having a width, and then developing the upper layer resist film 4 to form the second opening 4c in the upper layer resist film 4. And then exposed on the bottom surface of the second opening 4c Removing the mixing preventing layer 3 that, then, developing the lower layer resist film 2 exposed in said second opening 4c bottom, lower layer resist film 2
And a step of forming the first opening 2c, and the second configuration, referring to FIG.
In the method of forming a resist pattern having the first configuration, before the formation of the lower layer resist film 2, a third opening 11c narrower than the second opening 2c is formed in the formation region of the second opening 2c.
Forming an insulative resist film 11 on the substrate 1, and then performing heat treatment after forming the lower resist film 2 to form an upper surface of the insulative resist film 11 and a side wall surface of the third opening 11c. A step of forming a mixing layer 11a, which is formed by mixing the insulating resist film 11 and the lower resist film 2 and is not removed in the developing step of the lower resist film 2, at the interface between the lower resist film 2 and the lower resist film 2. And a third configuration is shown in FIG.
2 and FIG. 2, in the method of forming a resist pattern having the first or second configuration, the development of the upper layer resist film 4, the removal of the mixing prevention layer 3, and the development of the lower layer resist film 2 are performed as follows. In the method of forming a resist pattern having the first, second or third configuration, the fourth configuration is performed by one developing step, and the fourth configuration is the upper layer. The resist film 4 and the lower resist film 2 are characterized by being made of a positive type resist.

Referring to FIG. 1, the method of manufacturing a semiconductor device having the fifth structure comprises the steps of forming a lower layer resist film 2 on a semiconductor substrate 1, exposing the lower layer resist film 2 and exposing the lower layer resist film 2. A step of forming a first exposure region 2b defining a first opening 2c in the film 2, and then the lower resist film 2
The step of providing the mixing prevention layer 3 on the entire upper surface , and then,
A step of forming an upper layer resist film 4 on the mixing prevention layer 2, and then exposing the upper layer resist film 4 to expose the first upper layer resist film 4 to a region on the first exposed region 2a of the upper layer resist film 4; A step of forming a second exposure region 4a defining a second opening 4c narrower than the opening 2c, and then developing the upper layer resist film 4 so that the second opening 4c is formed in the upper layer resist film 4. And a step of removing the mixing prevention layer 3 exposed on the bottom surface of the second opening 4c.
Next, a step of developing the lower layer resist film 2 exposed on the bottom surface of the second opening 4c to form the first opening 2c in the lower layer resist film 2, and then forming a gate on the entire surface of the substrate 1. After the electrode material 5 is deposited, a lift-off process of removing the upper resist film 4, the mixing prevention film 3 and the lower resist film 2 is performed to remove the substrate 1 directly below the second opening 4c.
And a step of forming a gate electrode 6 on the surface. The sixth structure is the method of manufacturing a semiconductor device of the fifth structure with reference to FIG. Before forming, a step of forming an insulating resist film 11 having a third opening 11c narrower than the second opening 4c in the formation region of the second opening 4c on the substrate 1, and then, After the formation of the lower resist film 2, heat treatment is performed so that the insulating resist film 11 and the lower layer are formed on the upper surface of the insulating resist film 11 and the interface between the side wall surface of the third opening 11c and the lower resist film 2. And a step of forming a mixing layer 11a which is formed by mixing with the resist film 2 and is not removed in the developing step of the lower resist film 2.

In the first structure of the present invention described above, referring to FIG. 1, after the lower resist film 2 is exposed, the mixing prevention layer 3 is provided, and the upper resist film 4 is deposited on the mixing prevention layer 3. Then, the upper resist film 4 is exposed.
After that, the upper layer resist film 4 and the lower layer resist film 2 are successively developed to form openings 8c in the upper layer and lower layer resist films 4 and 2.

In the first structure, the upper resist film 4 is formed.
And the lower resist film 2 is exposed independently. That is,
The exposed region 4a of the upper resist film 4 and the exposed region 2a of the lower resist film 2 are defined by different exposures. On the other hand, the shape of the opening 8c is determined by the shape of the exposure regions 4a, 2a of the upper and lower resist films 4, 2. Therefore, the opening 8c
Is precisely formed as a shape in which two exposure patterns are vertically stacked.

Further, in the first structure, the lower resist film 2
The mixing prevention layer 3 is provided between the upper resist film 4 and the upper resist film 4. Therefore, mixing does not occur between the upper and lower resist films 4 and 2, and the sensitivity distribution in the resist thickness direction does not occur. Therefore, even if the exposure and development conditions change,
A change in the cross-sectional shape of the opening 8c, for example, a change in which the side wall surface of the opening 8c that should be vertical is an inclined surface or a curved surface is extremely small.

As described above, in the first configuration, the cross-sectional shape does not change due to mixing, and the opening shape is defined by the exposure pattern, so that the opening shape is precisely formed with the exposure accuracy.

In the first structure, the upper and lower layer resists 4 and 2 can be positive resists. This makes it possible to reduce the area of the exposure region when applied to a use in which the opening area occupying the entire surface of the substrate is small, for example, in the formation process by lift-off of the gate electrode or wiring. This is advantageous when using an exposure apparatus such as electron beam exposure that has a limited exposure area. When the positive resist is used, the exposed area 2a of the lower resist film 2 is larger than the exposed area 4a of the upper resist film 4, so that even when the lower resist film 2 is exposed during the exposure of the upper resist film 4, the lower resist film 2 is exposed. The second exposure area 2a has no adverse effect. These upper and lower layer resists 4 and 2 are, for example, 4
In order to form a fine pattern, it is preferable to use a novolac-based positive resist that is sensitive to light having a short wavelength of 00 nm or less or a novolac-based positive resist that is sensitive to an electron beam. The sensitivities, viscosities, and film thicknesses of the upper and lower resist films 4 and 2 can be individually selected for each layer according to the application.

The mixing prevention layer 3 of the first structure is a layer for preventing mixing between the upper and lower resist films 4 and 2, and for example, a resin thin film or a metal thin film can be used. The anti-mixing layer 3 can be generally opaque to exposure light or exposure beam (hereinafter referred to as "exposure light"). As a result, the present invention can be applied even when the lower layer resist film 2 or the upper layer resist film 4 is a negative type. If the upper and lower resist films 4 and 2 are both positive, they may be opaque or transparent. This is because when both the upper and lower resist films 4 and 2 are of a positive type, the pattern of the exposed region 4a of the upper resist film 4 is included inside the pattern of the exposed region 2a of the lower resist film 2 as described above. This is because the exposure of the upper layer resist film 4 does not enlarge the exposed region 2a of the lower layer resist film 2 and therefore does not affect the shape of the opening 8c.

As the mixing prevention layer 3, it is possible to select a material which is removed at the same time when the upper resist film 4 or the lower resist film 2 is developed. With this choice,
The step of removing the mixing prevention layer 3 can be omitted. Also, by this selection, the upper and lower resist films 4 and 2 can be simultaneously developed. In this way, by using the mixing prevention layer 3 that is removed during development, the resist pattern forming process is simplified.

In the second structure of the present invention, referring to FIG. 2, first, the insulating resist film 11 having the opening 11c is formed on the upper surface of the substrate 1, and then the first insulating resist film 11 is formed on the insulating resist film 11. The lower resist film 2 having the above structure is provided. Then,
A heat treatment is performed to form a mixing layer 11a at the interface between the insulating resist film 11 and the lower resist film 2. Further, after the lower layer resist film 2 is provided, the opening 8c is formed through the formation, exposure and development of the mixing prevention layer 3 and the upper layer resist film 4 as in the first structure. The heat treatment can be performed at any time after the formation of the lower resist film 2 and before the development of the lower resist film 2.

In the second structure, the insulating resist film 11 is used.
The materials of the insulating resist film 11 and the lower resist film 2 are selected so that the mixing layer 11a formed at the interface between the lower resist film 2 and the lower resist film 2 is converted into a substance that is not removed by the development of the lower resist film 2. This mixing layer 11
The a protects the insulating resist film 11 when the lower resist film 2 is developed. Therefore, the shape and dimensions of the insulating resist film 11 do not change due to development. Therefore, the opening 11c of the insulating resist film 11 is precisely held during the resist pattern forming process.

The mixing layer 11a of the second structure is also used.
Is also formed on the sidewall of the opening 11c of the insulating resist film 11, so that the size of the opening 11c becomes narrow. Since the thickness of the mixing layer 11a can be precisely controlled by the heat treatment conditions, it is possible to easily and precisely form an opening narrower than the minimum opening size determined by the exposure resolution. Depending on the heat treatment conditions, the opening 11 covered with the mixing layer 11a may be formed.
It is also possible to make the upper corner of c gentle and form the opening 11c having an inverted trapezoidal cross section. This prevents breakage of the wiring or gate electrode provided thereon. Further, in the second structure, the adhesion between the insulating resist film 11 and the lower resist film 2 is strengthened by forming the mixing layer 11a.

In the third structure of the present invention, referring to FIGS. 1 and 2, the development of the upper resist film 4, the removal of the mixing prevention layer 3, and the development of the lower resist film 2 are carried out by one developing process. To do. Therefore, the resist pattern forming process is simplified.

In the fourth structure of the present invention, referring to FIGS. 1 and 2, the upper resist film 4 and the lower resist film 2 are both positive resists. With this configuration, when forming the opening 8c having a convex cross-section, the pattern of the exposure region 4a of the upper layer resist film 4 is included in the pattern of the exposure region 2a of the lower layer resist film 2, so that the upper layer resist film 4 is exposed. The exposed area 2a of the lower resist film 2 does not expand. Therefore, since the shape of the opening 8c is defined by the exposure patterns of the upper and lower resist films 4 and 2, a precise resist pattern is formed.

In the fifth and sixth configurations of the present invention,
Referring to FIGS. 1 and 2, respectively, in the fifth structure, the resist pattern formed by the method of the first structure is used, and in the sixth structure, the resist pattern formed by the method of the second structure is used. The gate electrode is formed by lift-off using the resist pattern. Therefore, precise dimensions,
The shaped gate electrode can be easily formed.

[0038]

A first embodiment of the present invention relates to a method for forming a resist pattern used for forming a wiring or a gate electrode having a rectangular cross section by lift-off.

In the first embodiment, referring to FIG. 1 (a), a thickness of 1.2 μm is formed on the upper surface (main surface) of the GaAs substrate 1.
The lower resist film 2 made of the positive type photoresist was applied. Such a resist is, for example, a resist of an alkali-soluble phenol novolac resin, and THMR
(THMR is a product name of Tokyo Ohka Kogyo Co., Ltd.)
Is marketed as.

Next, the lower layer resist film 2 was exposed by irradiating the first exposure light 7a with a stepper to form an exposed region 2a having a width of 1 μm in the lower layer resist film 2. Next, referring to FIG. 1B, a mixing prevention layer 3 was formed on the entire surface of the lower resist film 2. The anti-mixing layer 3 has a thickness of 0.
A 03 μm PVA (polyvinyl alcohol) thin film can be used.

Then, referring to FIG. 1C, an upper resist film 4 of THMR having a thickness of 0.6 μm was applied on the entire surface of the mixing prevention layer 3. The upper resist film 4 may be made of another resist, if necessary.

Next, the upper resist film 4 was exposed by irradiating it with the second exposure light 7b using a stepper, and an exposed region 4a having a width of 0.5 μm was formed in the upper resist film 4. Next, referring to FIG. 1D, the upper resist film 4, the mixing prevention layer 3 and the lower resist film 2 are developed to remove the exposed regions 4a and 2a, and the opening 4c of the upper resist film 4 is removed.
And an opening 8c having a convex cross-section formed by the opening 2c of the lower resist film 2. The developing time was, for example, 30 seconds when NMD-W described later was used. The openings 4c and 2c were formed by removing the exposed areas 4a and 2a by development, respectively. A developer such as TMAH (tetramethylammonium hydroxide) can be used for this development. This developer is, for example, NMD
-W (NMD-W is a trade name of Tokyo Ohka Kogyo Co., Ltd.). The development by this NMD-W is performed by the upper and lower resist films 4 and 2 made of THMR.
Is removed by development, and the mixing prevention layer 3 made of PVA exposed on the bottom surface of the opening 4c of the upper resist film 4 is also removed. Therefore, the development of the upper and lower resist films 4 and 2 and the mixing prevention layer 3 can be completed by one development, and the opening 8c can be formed.

Next, after rinsing with pure water for 10 seconds, spin drying was carried out for 20 seconds to form a resist pattern having an opening 8c having a convex cross section. Then, referring to FIG. 1E, the gate electrode material 5 was deposited by vapor deposition. After that, the upper and lower resist films 4 and 2 and the mixing prevention layer 3 were removed by lift-off, and a gate electrode 6 having a rectangular cross section with a width of 0.5 μm was formed on the substrate 1.

The second embodiment of the present invention relates to a method of forming a resist pattern used for forming a wiring or a gate electrode having a T-shaped cross section by lift-off. In this embodiment, referring to FIG. 2A, first, a positive type electron beam exposure resist such as ZEP is formed on the upper surface of the GaAs substrate 1.
(ZEP is a trade name of Nippon Zeon Co., Ltd.) and an insulating resist film 11 having a thickness of 0.2 μm was applied. Then, through an electron beam exposure and development process, an opening 11c having a width of 0.18 μm was formed in the insulating resist film 11.

Next, referring to FIG. 2B, the opening 11
A lower resist film 2 having a thickness of 1.2 μm and made of a positive type resist was applied to the entire surface of the substrate 1 in which c was embedded. The material of the lower resist film 2 is THMR, for example. Then,
The upper surface of the lower resist film 2 was irradiated with the first exposure light 7a using a stepper to form an exposure region 2a having a width of 1 μm.

Next, referring to FIG. 2C, a mixing prevention layer 3 was formed on the entire surface of the lower resist film 2. This mixing prevention layer is, for example, an Al vapor deposition layer having a thickness of 20 nm deposited by resistance heating vapor deposition.

Next, with reference to FIG. 2D, an upper resist film 4 made of, for example, THMR is formed on the entire surface of the mixing prevention layer 3. Then, heat treatment was performed at 130 ° C. for 90 seconds. As a result, the mixing layer 11a is formed at the interface between the insulating resist film 11 and the lower resist film 2.
Therefore, the adhesion strength between the insulating resist film 11 and the lower resist film 2 is improved. Further, this heat treatment improves the adhesion strength between the mixing prevention layer 3 and the upper and lower resist films 4 and 2.

Next, referring to FIG. 2E, the upper resist film 4 is exposed by irradiating the upper resist film 4 with a second exposure light 7b using a stepper, and the upper resist film 4 is exposed to an exposure region 4a having a width of 0.5 μm. Was formed.

Next, referring to FIG. 2F, similar to the development of the first embodiment, for example, NMD-W is used as a developing solution to form the upper resist film 4, the lower resist film 2 and the opening 8c.
The mixing prevention layer 3 therein is developed and removed for 30 seconds. At this time, the mixing layer 11a formed near the surface of the insulating resist film 11 is insoluble in the developing solution. Therefore, the opening 11 of the insulating resist film 11 having a width of 0.18 μm is formed.
c is narrowed by about the thickness of the mixing layer 11a and has a width of 0.
It became 13 μm. The amount of this narrowing can be precisely controlled by the heat treatment conditions. Furthermore, the mixing layer 11
It is also possible to select heat treatment conditions such that a is inclined at the opening 11c. Then, washing with pure water for 10 seconds and spin drying for 20 seconds are performed, and a convex opening 8c is formed on the opening 11c.
Then, a resist pattern in which was formed was formed.

Next, referring to FIG. 2G, a gate electrode material 5 was deposited by vapor deposition and lifted off to form a T-shaped gate electrode having a gate length of 0.13 μm. In this embodiment, the T-shaped gate electrode having the gate length equal to or shorter than the exposure accuracy is precisely formed.

[0051]

As described above, according to the present invention, the mixing prevention layer is provided between the upper resist film and the lower resist film, and the upper resist film and the lower resist film are exposed individually. The convex opening suitable for lift-off can be precisely formed, which greatly contributes to the performance improvement of the semiconductor device.

[Brief description of drawings]

FIG. 1 is a sectional process drawing of a first embodiment example of the present invention.

FIG. 2 is a sectional process drawing of a second embodiment example of the present invention.

FIG. 3 is an explanatory diagram of an electrode forming process

FIG. 4 is an explanatory diagram of a T-type electrode forming process

FIG. 5 is a sectional view of a first conventional example.

FIG. 6 is a sectional process diagram of a second conventional example.

FIG. 7 is a sectional process diagram of a third conventional example.

FIG. 8 is a sectional view of a fourth conventional example.

[Explanation of symbols]

1 Substrate 2, 23, 25 Lower layer resist film 2a, 4a, 21a, 22a, 23a, 24a, 26
a, 111a Exposure areas 2b, 4b, 11b, 21b, 22b, 23b, 24
b, 26b Unexposed region 3 Mixing prevention layers 4, 24, 26 Upper resist film 5 Gate electrode material 6 Gate electrode 7a First exposure light 7b Second exposure light 2c, 4c, 8c, 10c, 11c, 12c, 26c ，
27c, 28c Opening 10, 27 Resist film 11 Insulating resist film 11a Mixing layer 20, 29 Exposure light 21 High sensitivity resist film 22 Low sensitivity resist film

─────────────────────────────────────────────────── ─── Continuation of the front page (72) Gozo Makiyama 4-1-1 Kamiotanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Within Fujitsu Limited (72) Inventor Hiroshi Endo 4-chome, 1-chome, Nakahara-ku, Kawasaki, Kanagawa No. 1 within Fujitsu Limited (56) Reference JP-A-61-170738 (JP, A) JP-A-7-153666 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) G03F 7/26 H01L 21/027 H01L 21/28 H01L 21/306

Claims (6)

(57) [Claims] 1. A step of exposing a lower-layer resist film formed on a substrate to form a first exposure region defining a first opening in the lower-layer resist film, and then the entire surface of the lower-layer resist film. And a step of forming an upper resist film on the mixing prevention layer, and then exposing the upper resist film to expose the upper resist film on the first exposed region. Forming a second exposure region defining a second opening narrower than the first opening in the region, and then developing the upper resist film to form the second opening in the upper resist film. And a step of removing the mixing prevention layer exposed on the bottom surface of the second opening, and then developing the lower resist film exposed on the bottom surface of the second opening. Form the first opening in the lower resist film A method of forming a resist pattern, comprising the steps of: 2. The method for forming a resist pattern according to claim 1, wherein a third opening having a width narrower than that of the second opening is formed in the formation region of the second opening before the formation of the lower resist film. A step of forming an insulative resist film on the substrate, and then performing a heat treatment after forming the lower layer resist film to form an upper surface of the insulative resist film, a side wall surface of the third opening, and the lower layer resist film. Forming a mixing layer, which is formed by mixing the insulating resist film and the lower resist film, and is not removed in the developing process of the lower resist film, at the interface of Method. 3. The method for forming a resist pattern according to claim 1, wherein the upper resist film is developed, the mixing prevention layer is removed,
And a method for forming a resist pattern, wherein the development of the lower resist film is performed in one developing step. 4. The method of forming a resist pattern according to claim 1, 2, or 3, wherein the upper resist film and the lower resist film are made of a positive resist. 5. A step of forming a lower layer resist film on a semiconductor substrate, a step of exposing the lower layer resist film to form a first exposure region defining a first opening in the lower layer resist film, Next, a step of forming a mixing prevention layer on the entire surface of the lower layer resist film, a step of forming an upper layer resist film on the mixing prevention layer, and a step of exposing the upper layer resist film to expose the upper layer resist film. Forming a second exposure region defining a second opening narrower than the first opening in a region on the first exposure region, and then developing the upper resist film to form the upper layer A step of forming the second opening in the resist film, a step of removing the mixing prevention layer exposed on the bottom surface of the second opening, and a step of removing the lower layer exposed on the bottom surface of the second opening. After developing the resist film, the lower layer Forming said first opening in the strike layer, then after depositing a gate electrode material on the substrate whole surface,
And a step of forming a gate electrode on the substrate surface immediately below the second opening by a lift-off step of removing the upper resist film, the mixing prevention film, and the lower resist film. Method. 6. The method for manufacturing a semiconductor device according to claim 5, wherein a third opening having a width narrower than that of the second opening is formed in the formation region of the second opening before the formation of the lower resist film. A step of forming an insulative resist film on the substrate, and then performing a heat treatment after forming the lower layer resist film to form an upper surface of the insulative resist film, a side wall surface of the third opening, and the lower layer resist film. A step of forming a mixing layer, which is formed by mixing the insulating resist film and the lower resist film, and which is not removed by a developing process of the lower resist film, at a boundary surface of the semiconductor device. Method.