JPS63138736A - Method for patterning resist - Google Patents

Method for patterning resist

Info

Publication number
JPS63138736A
JPS63138736A JP61286483A JP28648386A JPS63138736A JP S63138736 A JPS63138736 A JP S63138736A JP 61286483 A JP61286483 A JP 61286483A JP 28648386 A JP28648386 A JP 28648386A JP S63138736 A JPS63138736 A JP S63138736A
Authority
JP
Japan
Prior art keywords
resist
exposure
cel
resist layer
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61286483A
Other languages
Japanese (ja)
Inventor
Naoaki Sugimoto
杉本 直明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP61286483A priority Critical patent/JPS63138736A/en
Publication of JPS63138736A publication Critical patent/JPS63138736A/en
Pending legal-status Critical Current

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  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)

Abstract

PURPOSE:To make the cross-sectional shape of a resist pattern from the overhang type to the vertical type by forming a contrast enhancement layer (CEL) on a positive-type resist layer, and performing the first exposure. CONSTITUTION:A title method is comprised of a process (a) for forming a contrast enhancement layer (CEL) 3 on a positive resist layer 2 and applying an exposure 4 through a glass mask, a process (b) for peeling off the CEL 3 and performing a baking 5, a process (c) for performing a whole surface exposure 4, and a process (d) for developing the resist layer 2. By exposing the resist layer 2 through the CEL 3 in this way, the reduced contrast can be enhanced and the resist pattern shape obtained by an image reversal can be made vertical. In addition, this is possible even if the resist pattern size is 1mum or less, whereby the pattern size is easily made very small.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置の製造におけるレジストのパターニ
ング方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a resist patterning method in the manufacture of semiconductor devices.

〔発明の概要〕[Summary of the invention]

ポジ型レジスト層に、露光部と未露光部を作りこれをベ
ークし、さらに全面露光を行うことにより、初めの露光
における未露光部を現像液によって溶解させる、いわゆ
る画像反転によるレジストパターニング方法において、
ポジ型レジスト層上にコントラスト増強層(以下CKL
という)を形成し、最初の露光を行うことにより、レジ
ストパターンの断面形状をオーバーハング型から直立型
にしたものである。
In a resist patterning method using so-called image reversal, in which an exposed area and an unexposed area are created in a positive resist layer, this is baked, and the entire surface is exposed, the unexposed area in the first exposure is dissolved by a developer.
A contrast enhancement layer (hereinafter referred to as CKL) is placed on the positive resist layer.
The cross-sectional shape of the resist pattern is changed from an overhang type to an upright type by forming a resist pattern and performing an initial exposure.

〔従来の技術〕[Conventional technology]

従来の画像反転によるレジストパターニング方法は、第
2図(α)〜(d)に示すごとく、ポジ型レジスト層上
に直接露光を行っていた。
In the conventional resist patterning method using image reversal, as shown in FIGS. 2(α) to (d), a positive resist layer is directly exposed to light.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかし、前述の従来技術では、ガラスマスクからの透過
光はコントラストを低下したまま、レジストを感光する
ために、これから画像反転して得られるレジストパター
ンの断面形状は第1図cd)のようなオーバーハング型
となり易かった。このオーバーハング型のレジストパタ
ーンでは寸法制御が離しく、エツチングに困難を生じさ
せていた。
However, in the above-mentioned conventional technology, since the transmitted light from the glass mask exposes the resist while reducing the contrast, the cross-sectional shape of the resist pattern obtained by inverting the image has an overlapping shape as shown in Figure 1 c). It could easily become a hang type. With this overhang type resist pattern, dimensional control is difficult, making etching difficult.

本発明はこの様な問題点を解決するもので、その目的と
するところは、01!Lを介してレジストを感光するこ
とによって、低下したコントラストを増強させ、画像反
転によって得られるレジストパターン形状を直立にする
ことにある。
The present invention is intended to solve these problems, and its purpose is 01! By exposing the resist to light through L, the reduced contrast is enhanced and the shape of the resist pattern obtained by image reversal is made upright.

〔問題点を解決するための手段〕[Means for solving problems]

本発明のレジストのパターニング方法は、α)レジスト
層上に0ELIを形成し、ガラスマスクを介して露光す
る工程と、 b>O’l、Lを剥離し、ベークを行う工程と、C)全
面一光を行う工程と、 d)レジスト層を現像する工程と、 かうなることを特徴とする。
The resist patterning method of the present invention includes α) a step of forming 0ELI on the resist layer and exposing it to light through a glass mask, a step of peeling off b>O'l, L, and baking, and C) the entire surface. The method is characterized by the following steps: d) developing the resist layer.

〔実施例〕〔Example〕

以下、本発明について、実施例に基づき詳細に説明する
Hereinafter, the present invention will be described in detail based on examples.

第1図(α)〜(d)は本発明の実施例を工程順に示す
図である。まず(a)の如く加工基板1上に、画像反転
処理用のポジ型レジストN2を形成する。実施例では、
ヘキスト製のポジ型しジス)、AZ5214を使用し、
1.’lpm厚のぎジ型レジスト層2をスピンコード法
により形成した。
FIGS. 1(α) to 1(d) are diagrams showing an embodiment of the present invention in the order of steps. First, as shown in (a), a positive resist N2 for image reversal processing is formed on the processed substrate 1. In the example,
Using Hoechst's positive type resistor, AZ5214,
1. A resist layer 2 having a thickness of 1 pm was formed by a spin code method.

AZ5214は456nmの露光波長に対し、はとんど
感光性を持たない、非常に感度の低いポジ型レジストで
ある。プレベークは、ホットプレートにより、90℃で
、5分間行った。このポジ型レジスト層2の上に、0K
L5を形成する。実施例としては、ゼネラル、士しクト
リック社製のCEM−420を使用した。CICM−4
20は、露光波長λが、456nrnO時、最も効果的
にブリーチング特性を示すよう合成された0KL5であ
る。OEM−420は、スピンコード法により、約80
00にの膜厚に形成する。
AZ5214 is a positive resist with very low sensitivity, having almost no photosensitivity to the exposure wavelength of 456 nm. Prebaking was performed at 90° C. for 5 minutes using a hot plate. On this positive resist layer 2, 0K
Form L5. As an example, CEM-420 manufactured by General Medical Co., Ltd. was used. CICM-4
No. 20 is 0KL5 synthesized so as to exhibit the most effective bleaching property when the exposure wavelength λ is 456nrnO. OEM-420 is approximately 80
It is formed to a film thickness of 0.00.

この後、ベークは行わず、第一の露光4を行う。After this, first exposure 4 is performed without baking.

この第一の露光4では、通常のパターニングで、露光部
と来露光部が逆となるようなパターンをマスクとする。
In this first exposure 4, a pattern is used as a mask in which the exposed area and the next exposed area are reversed in normal patterning.

実施例では、日本光学工業C株°)の縮少露光装置s 
N S R1505−G S A (縮少率115ti
i!光波長λ=4563m)で、照度が、400nsW
の時、2.5秒面の露光を行った。この露光時間は、加
工基板1の反射率などによりて異なり、2.5秒間とは
、加工基板1がpo17511の時である。
In the example, a reduction exposure device s manufactured by Nippon Kogaku Kogyo C Co., Ltd.
NSR1505-GSA (Reduction rate 115ti
i! Light wavelength λ = 4563 m), illumination intensity is 400 nsW
At this time, exposure was performed for 2.5 seconds. This exposure time varies depending on the reflectance of the processed substrate 1, etc., and 2.5 seconds is when the processed substrate 1 is po17511.

次いで(A)の如(、CK1.5を専用液によって剥離
する。01!!M−420を使った場合、専用液はCE
iMストリッパー人−15となる。OEMストリッパー
A−15は、ウェハな回転させた所へ、加圧によりスプ
レーされる。axLsを剥離した後、ベーク75を行う
、実施例では、ホットプレートにより、115℃で15
0秒間行った。
Next, as shown in (A), CK1.5 is removed using a special solution.01!!When using M-420, the special solution is CE
iM stripper person-15. OEM Stripper A-15 is sprayed under pressure onto the rotating wafer. After peeling off the axLs, baking 75 is performed.
This was done for 0 seconds.

次に<c>の如く全面一光4を行う。実施例では、キャ
ノン販売(株)のPLAにより、10秒11j (12
5m J / cj s露光波長λ;405ルm)行っ
た。
Next, the entire surface is illuminated 4 as shown in <c>. In the example, 10 seconds 11j (12
5 m J/cj s exposure wavelength λ; 405 lm).

この後、現像を行う、実施例では、ヘキスト社製、AZ
512MIIF(1:1)で60秒間ツバドル現像を行
った。
After this, development is performed. In the example, AZ
512 MIIF (1:1) was used for 60 seconds of Tsubadoru development.

従来の方法は、第2図(α)〜(d)に示すように、0
IL3の形成、並びに剥離工程がないだけで、他は上述
と同じ方法である。ただ第一の露光4の露光時間が、本
発明よりも短かく、1程度度となる。
The conventional method, as shown in Fig. 2 (α) to (d),
The method is the same as described above except for the formation of IL3 and the peeling process. However, the exposure time of the first exposure 4 is shorter than that of the present invention, and is about 1 degree.

〔発明の効果〕〔Effect of the invention〕

上述の如く本発明のレジストのパターニング工程によれ
ば、従来のようなパターン形状のオーバーハング化がな
くなり、寸法制御、並びにエツチングを容易にした。
As described above, according to the resist patterning process of the present invention, overhanging of the pattern shape as in the conventional method is eliminated, and dimensional control and etching are facilitated.

このパターニング方法は、レジストパターン寸法が1μ
m以下でも可能であり、これは、パターンサイズの微細
化を容易にすることにつながる。
In this patterning method, the resist pattern size is 1 μm.
It is also possible to make the pattern size smaller than m, which facilitates miniaturization of the pattern size.

【図面の簡単な説明】 第1図(α)〜(d)は、本発明の笑施mjによるレジ
ストのパターニング方法を示す工程断面図第2図(α)
〜Cd)は、従来の技術によるレジストのパターニング
方法を示す工1断面図。 1・・・・・・加工基板 2・・・・・・ポジ型レジスト 3 ・・・・・・ 0WL 4・・・・・・露光 5・・・・・・ベーク 以上 出願人 セイコーエプソン株式会社 第70      第20
[BRIEF DESCRIPTION OF THE DRAWINGS] FIGS. 1(α) to (d) are process cross-sectional views showing a method for patterning a resist using a photomask according to the present invention. FIG. 2(α)
~Cd) is a cross-sectional view of process 1 showing a resist patterning method according to a conventional technique. 1...Processed substrate 2...Positive resist 3...0WL 4...Exposure 5...Bake and above Applicant: Seiko Epson Corporation 70th 20th

Claims (1)

【特許請求の範囲】 a)レジスト層上にコントラスト増強層を形成し、ガラ
スマスクを介して露光する工程と、 b)前記コントラスト増強層を剥離し、ベークを行う工
程と、 c)全面露光を行う工程と、 d)レジスト層を現像する工程からなることを特徴とす
るレジストのパターニング方法。
[Claims] a) forming a contrast-enhancing layer on the resist layer and exposing it to light through a glass mask; b) peeling off the contrast-enhancing layer and baking; c) exposing the entire surface to light. d) developing the resist layer.
JP61286483A 1986-12-01 1986-12-01 Method for patterning resist Pending JPS63138736A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61286483A JPS63138736A (en) 1986-12-01 1986-12-01 Method for patterning resist

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61286483A JPS63138736A (en) 1986-12-01 1986-12-01 Method for patterning resist

Publications (1)

Publication Number Publication Date
JPS63138736A true JPS63138736A (en) 1988-06-10

Family

ID=17704980

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61286483A Pending JPS63138736A (en) 1986-12-01 1986-12-01 Method for patterning resist

Country Status (1)

Country Link
JP (1) JPS63138736A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63215038A (en) * 1987-03-04 1988-09-07 Toshiba Corp Formation of resist pattern
JP2002365806A (en) * 2001-06-07 2002-12-18 National Institute Of Advanced Industrial & Technology Fine pattern drawing material, drawing method using the same and fine pattern forming method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63215038A (en) * 1987-03-04 1988-09-07 Toshiba Corp Formation of resist pattern
JP2002365806A (en) * 2001-06-07 2002-12-18 National Institute Of Advanced Industrial & Technology Fine pattern drawing material, drawing method using the same and fine pattern forming method

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