JP3303226B2 - Flip chip mounting structure - Google Patents

Flip chip mounting structure

Info

Publication number
JP3303226B2
JP3303226B2 JP04689696A JP4689696A JP3303226B2 JP 3303226 B2 JP3303226 B2 JP 3303226B2 JP 04689696 A JP04689696 A JP 04689696A JP 4689696 A JP4689696 A JP 4689696A JP 3303226 B2 JP3303226 B2 JP 3303226B2
Authority
JP
Japan
Prior art keywords
conductor
transmission line
line
ground
transmission
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP04689696A
Other languages
Japanese (ja)
Other versions
JPH09219422A (en
Inventor
登 岩崎
文則 石塚
直哉 久々津
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP04689696A priority Critical patent/JP3303226B2/en
Publication of JPH09219422A publication Critical patent/JPH09219422A/en
Application granted granted Critical
Publication of JP3303226B2 publication Critical patent/JP3303226B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0237High frequency adaptations
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Wire Bonding (AREA)
  • Waveguide Connection Structure (AREA)
  • Waveguides (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、導電性バンプを用
いて2つの高周波伝送線路をプリップチップ実装する構
造に係り、特にコプレーナ構造もしくはグランドプレー
ナ構造の2つの伝送線路を相互にプリップチップ実装に
より接続する構造に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure in which two high-frequency transmission lines are mounted in a flip-chip manner using conductive bumps, and more particularly, to a structure in which two transmission lines having a coplanar structure or a ground planar structure are mutually mounted by a flip-chip mounting method. It relates to a structure for connection.

【0002】[0002]

【従来の技術】図8は従来のコプレーナ構造の伝送線路
とグランドコプレーナ構造の伝送路の接続部の構造の一
例を示す図である。(a)は斜視図、(b)は(a)の
b−b線断面図、(c)は(b)のc−c線断面図、
(d)は(b)のd−d線断面図である。
2. Description of the Related Art FIG. 8 is a diagram showing an example of a structure of a connection portion between a conventional transmission line having a coplanar structure and a transmission line having a ground coplanar structure. (A) is a perspective view, (b) is a sectional view taken along line bb of (a), (c) is a sectional view taken along line cc of (b),
(D) is a sectional view taken along line dd of (b).

【0003】コプレーナ構造の伝送線路70とグランド
コプレーナ構造の伝送線路80とを電気的に接続するに
当たり、2つの伝送線路70、80を相互に近付けて対
向させ、インダクタンス成分を極力低減するために、伝
送線路70の信号線導体71と、伝送線路80の信号線
導体81との間を導電性バンプ74により、また伝送線
路70の接地導体72と、伝送線路80の接地導体82
との間を導電性バンプ84により接続していた。なお、
伝送線路70は図8の(a)の紙面において左上方向に
延び、伝送線路80は右下方向に延びるものであるが、
ここでは接続部分のみを示している。他の(b)〜
(d)も接続部分のみを示している。
In order to electrically connect the transmission line 70 having the coplanar structure and the transmission line 80 having the ground coplanar structure, the two transmission lines 70 and 80 are brought close to each other to face each other, and the inductance component is reduced as much as possible. A conductive bump 74 connects between the signal line conductor 71 of the transmission line 70 and the signal line conductor 81 of the transmission line 80, and a ground conductor 72 of the transmission line 70 and a ground conductor 82 of the transmission line 80.
Are connected by a conductive bump 84. In addition,
The transmission line 70 extends in the upper left direction on the plane of FIG. 8A, and the transmission line 80 extends in the lower right direction.
Here, only the connection portion is shown. Other (b) ~
(D) also shows only the connection part.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、図8に
示した構造では、導電性バンプ74、84を介して互い
に対向する領域75、85における信号線導体71と接
地導体72との間、あるいは信号線導体81と接地導体
82との間における特性インピーダンスに不整合をもた
らし、伝送線路70の入力部76から接続部を経由して
伝送線路80の出力部86へ、数十GHz以上の高周波
信号を伝送する場合、接続部での反射が増大するなど、
伝送特性が著しく劣化する欠点があった。
However, in the structure shown in FIG. 8, between the signal line conductor 71 and the ground conductor 72 in the regions 75 and 85 facing each other via the conductive bumps 74 and 84, or in the structure shown in FIG. A mismatch is caused in the characteristic impedance between the line conductor 81 and the ground conductor 82, and a high-frequency signal of several tens GHz or more is transmitted from the input section 76 of the transmission line 70 to the output section 86 of the transmission line 80 via the connection section. When transmitting, reflection at the connection increases, etc.
There is a disadvantage that the transmission characteristics are significantly deteriorated.

【0005】本発明の目的は、2つの高周波伝送線路の
接続部におけるインピーダンスの不整合が生ぜず、良好
な高周波伝送特性が得られるようにしたフリップチップ
実装構造を提供することである。
An object of the present invention is to provide a flip-chip mounting structure in which a good high-frequency transmission characteristic can be obtained without causing an impedance mismatch at a connection portion between two high-frequency transmission lines.

【0006】[0006]

【課題を解決するための手段】このために本発明は、信
号線導体と同一面に形成された接地導体とのギャップが
g1であるコプレーナ構造またはグランドコプレーナ構
造の第1の伝送線路と、信号線導体と同一面に形成され
た接地導体とのギャップがg2であるコプレーナ構造ま
たはグランドコプレーナ構造の第2の伝送線路と、前記
第1、第2の伝送線路の信号線導体と接地導体とを相互
に対向させて電気的に接続する導電性バンプとを具備す
るフリップチップ実装構造において、前記第1、第2の
伝送線路の互いに対面する領域における前記第1の伝送
線路の前記信号線導体と前記接地導体とのギャップをg
3に拡げるとともに、前記第1、第2の伝送線路の互い
に対面する領域における前記第2の伝送線路の前記信号
線導体と前記接地導体とのギャップをg4に拡げ、前記
導電性バンプの高さをhとしたとき、前記ギッャプg1
〜G4を、 g3−g1≒g4−g2≒2.5h に設定したことを特徴とするフリップフロップ実装構造
として構成した。
For this purpose, the present invention provides a first transmission line having a coplanar structure or a ground coplanar structure in which a gap between a signal line conductor and a ground conductor formed on the same plane is g1, A second transmission line having a coplanar structure or a ground coplanar structure in which a gap between the line conductor and a ground conductor formed on the same surface is g2, and a signal line conductor and a ground conductor of the first and second transmission lines. A flip-chip mounting structure comprising: conductive bumps electrically opposed to each other and electrically connected to the signal line conductors of the first transmission line in regions of the first and second transmission lines facing each other. The gap with the ground conductor is g
3, the gap between the signal line conductor and the ground conductor of the second transmission line in the region of the first and second transmission lines facing each other is increased to g4, and the height of the conductive bump is increased. Is h, the gap g1
GG4 is set as g3-g14−g4-g2h2.5h to form a flip-flop mounting structure.

【0007】[0007]

【発明の実施の形態】BEST MODE FOR CARRYING OUT THE INVENTION

[第1の実施の形態]図1は本発明の第1の実施の形態
を示すプリップチップ実装構造を説明するための図であ
って、(a)はその斜視図、(b)は(a)のb−b線
断面図、(c)は(b)のc−c線断面図、(d)は
(b)のd−d線断面図である。
[First Embodiment] FIGS. 1A and 1B are diagrams for explaining a flip chip mounting structure according to a first embodiment of the present invention, wherein FIG. 1A is a perspective view thereof, and FIG. ) Is a sectional view taken along line bb, (c) is a sectional view taken along line cc in (b), and (d) is a sectional view taken along line dd in (b).

【0008】コプレーナ構造の伝送線路10は、特性イ
ンピーダンスZoが50Ω、信号線導体11の幅が50
μm、信号線導体11と接地導体12との間の入力部1
6のギャップg1が35μm、絶縁体基板13の比誘電
率が12.5、厚さが150μmである。また、導電性
バンプ14、24の位置する部分(入力部16と反対側
の部分、つまり他方の伝送路20と対向する領域部分1
5)に対応する信号線導体11と接地導体12との対向
部分は、そのギャップg3が「g1<g3」に設定さ
れ、そのギャップが「g3−g1=Δg」だけ拡げられ
ている。
The transmission line 10 having the coplanar structure has a characteristic impedance Zo of 50Ω and a signal line conductor 11 having a width of 50Ω.
μm, input portion 1 between signal line conductor 11 and ground conductor 12
6, the gap g1 is 35 μm, the relative permittivity of the insulator substrate 13 is 12.5, and the thickness is 150 μm. In addition, the portion where the conductive bumps 14 and 24 are located (the portion opposite to the input portion 16, that is, the region portion 1 facing the other transmission path 20).
In the opposing portion of the signal line conductor 11 and the ground conductor 12 corresponding to (5), the gap g3 is set to “g1 <g3”, and the gap is widened by “g3−g1 = Δg”.

【0009】グランドコプレーナ構造の伝送線路20
は、特性インピーダンスが50Ω、信号線導体21の幅
が50μm、信号線導体21と接地導体22との間の出
力部26のギャップg2が35μm、絶縁体基板23の
比誘電率が12.6、厚さが600μmである。また、
導電性バンプ14、24の位置する部分(出力部26と
反対側の部分、つまり他方の伝送路10と対向する領域
部分25)に対応する信号線導体21と接地導体22と
の対向部分は、そのギャップg4が「g2<g4」に設
定され、そのギャップが「g4−g2=Δg」だけ拡げ
られている。
A transmission line 20 having a ground coplanar structure
Has a characteristic impedance of 50Ω, a width of the signal line conductor 21 of 50 μm, a gap g2 of the output portion 26 between the signal line conductor 21 and the ground conductor 22 of 35 μm, a relative permittivity of the insulator substrate 23 of 12.6, The thickness is 600 μm. Also,
The opposing portions of the signal line conductor 21 and the ground conductor 22 corresponding to the portions where the conductive bumps 14 and 24 are located (the portion opposite to the output portion 26, that is, the region portion 25 facing the other transmission path 10) The gap g4 is set to “g2 <g4”, and the gap is expanded by “g4−g2 = Δg”.

【0010】なお、伝送線路10は図1の(a)の紙面
において左上方向に延び、伝送線路20は右下方向に延
びるものであるが、ここでは接続部分のみを示してい
る。他の(b)〜(d)も接続部分のみを示している。
The transmission line 10 extends in the upper left direction on the paper surface of FIG. 1A, and the transmission line 20 extends in the lower right direction. Here, only the connection portion is shown. The other (b) to (d) also show only the connection part.

【0011】ここでは、前記導電性バンプ14、24と
して、高さhが50μmのものを用い、伝送線路10と
伝送線路20の信号線導体11、21の相互間は導電性
バンプ14で、また接地導体12、22の相互間は導電
線バンプ24で、各々接続する。
Here, the conductive bumps 14 and 24 having a height h of 50 μm are used. The conductive bumps 14 are provided between the signal line conductors 11 and 21 of the transmission line 10 and the transmission line 20. The conductive conductor bumps 24 connect between the ground conductors 12 and 22 respectively.

【0012】伝送線路10の入力部16から伝送線路2
0の出力部26に至るまでの伝送線路の特性インピーダ
ンスZoを50Ω、60Ω、70Ωとするための導電性
バンプ14、24の高さhとギッャプ拡げ幅Δgとの関
係を図2に示した。いずれの特性インピーダンスでも、
導電性バンプの高さhが約30μm〜150μmにおい
て、Δg/hは約2.5の傾きとなっている。なお、前
述したように、 Δg=g3−g1 =g4−g2 である。
[0012] From the input section 16 of the transmission line 10 to the transmission line 2
FIG. 2 shows the relationship between the height h of the conductive bumps 14 and 24 and the gap expansion width Δg for setting the characteristic impedance Zo of the transmission line up to the zero output section 26 to 50Ω, 60Ω and 70Ω. For any characteristic impedance,
When the height h of the conductive bump is about 30 μm to 150 μm, Δg / h has a slope of about 2.5. Note that, as described above, Δg = g3-g1 = g4-g2.

【0013】導電性バンプの高さh=50μmのとき、
50Ωの特性インピーダンスを得ようとする際は、Δg
/h=2.5の関係から、拡げ幅Δg=125μmであ
り、伝送線路10のギッャプg3、g4は、 g3=g1+Δg=35μm+125μm=160μm g4=g2+Δg=35μm+125μm=160μm となる。このようにして、コプレーナ構造の伝送線路1
0の入力部16からグランドコプレーナ構造の伝送線路
20の出力部26に至るまでの特性インピーダンスを5
0Ωに整合させることが可能となる。
When the height h of the conductive bump is 50 μm,
When trying to obtain a characteristic impedance of 50Ω, Δg
From the relationship of /h=2.5, the expansion width Δg is 125 μm, and the gaps g3 and g4 of the transmission line 10 are g3 = g1 + Δg = 35 μm + 125 μm = 160 μm g4 = g2 + Δg = 35 μm + 125 μm = 160 μm. Thus, the transmission line 1 having the coplanar structure
The characteristic impedance from the input section 16 of 0 to the output section 26 of the transmission line 20 of the ground coplanar structure is 5
It becomes possible to match to 0Ω.

【0014】また、特性インピーダンスZoが60Ωの
とき、70Ωのときにおいても、導電性バンプ14、2
4の高さhが30μm以上であれば、Δg/hは約2.
5であるので、上記と同様にして拡げ幅Δgを見つけ、
ギャップg3、g4を設定すれば良い。なお、本構造で
は、接地導体12、22の相互間を2個のバンプ24を
1組として用いて接続しているが、3個以上のバンプを
1組として用いて接続することもできることは勿論であ
る。
When the characteristic impedance Zo is 60Ω or 70Ω, the conductive bumps 14, 2
If the height h of No. 4 is 30 μm or more, Δg / h is about 2.
5, so the expansion width Δg is found in the same manner as above,
The gaps g3 and g4 may be set. In the present structure, the ground conductors 12 and 22 are connected to each other by using two bumps 24 as one set. However, it is needless to say that three or more bumps can be connected as one set. It is.

【0015】図3は、コプレーナ構造の伝送線路10の
入力部16からグラントコプレーナ構造の伝送線路20
の出力部26に至るまでの経路の反射損失の周波数特性
を示す図である。本構造(拡げ幅Δg=125μm)
は、拡げ幅Δg=0の従来構造に比べて、40GHzの
広い帯域に亙って40dB以上となり、周波数特性が著
しく改善されている。
FIG. 3 is a diagram showing the structure of the transmission line 20 having the grant coplanar structure from the input portion 16 of the transmission line 10 having the coplanar structure.
FIG. 7 is a diagram illustrating frequency characteristics of reflection loss of a path leading to an output unit 26 of FIG. This structure (expansion width Δg = 125 μm)
Is 40 dB or more over a wide band of 40 GHz as compared with the conventional structure having the expansion width Δg = 0, and the frequency characteristics are significantly improved.

【0016】図4は、コプレーナ構造の伝送線路10の
入力部16からグラントコプレーナ構造の伝送線路20
の出力部26に至るまでの経路の挿入損失の周波数特性
を示す図である。本構造では40GHzの広い帯域に亙
って損失がみられず、その特性が従来構造よりも著しく
改善されていることが分かる。
FIG. 4 is a diagram showing a structure of the transmission line 20 having the grant coplanar structure from the input portion 16 of the transmission line 10 having the coplanar structure.
FIG. 7 is a diagram illustrating frequency characteristics of insertion loss of a path leading to an output unit 26 of FIG. In this structure, no loss is observed over a wide band of 40 GHz, which indicates that the characteristics are significantly improved as compared with the conventional structure.

【0017】図5は変形例のプリップチップ実装構造を
説明するための図であって、(a)はその斜視図、
(b)は(a)のb−b線断面図、(c)は(b)のc
−c線断面図、(d)は(b)のd−d線断面図であ
る。
FIGS. 5A and 5B are views for explaining a flip chip mounting structure according to a modification, in which FIG.
(B) is a sectional view taken along line bb of (a), (c) is c of (b).
FIG. 3D is a cross-sectional view taken along the line c, and FIG. 4D is a cross-sectional view taken along the line d-d in FIG.

【0018】この図5では、2つの伝送線路が対向する
領域35、45と対向しない領域における信号線導体と
接地導体との間のギャップの変化の構造として、そのギ
ャップのg1とg3の間の変化、g2とg4の間の変化
が各々緩慢になるように、接地導体32、42にテーパ
37、47を形成している。作用や効果については図1
で説明したものと全く同様である。
In FIG. 5, the structure of the change in the gap between the signal line conductor and the ground conductor in the regions 35 and 45 where the two transmission lines are not opposed to each other is defined as the structure between the gaps g1 and g3. Tapers 37, 47 are formed in the ground conductors 32, 42 so that the change, the change between g2 and g4, becomes slower, respectively. Fig. 1
This is exactly the same as that described above.

【0019】[第2の実施の形態]図6および図7は第
2の実施の形態のプリップチップ実装構造を説明するた
めの図であって、図6の(a)はその斜視図、(b)は
図6の(a)のb−b線断面図、図7の(a)は図6の
(b)のa−a線断面図、(b)は図6の(b)ののb
−b線断面図である。
[Second Embodiment] FIGS. 6 and 7 are views for explaining a flip-chip mounting structure according to a second embodiment. FIG. 6A is a perspective view of FIG. 6B is a sectional view taken along the line bb of FIG. 6A, FIG. 7A is a sectional view taken along the line aa of FIG. 6B, and FIG. b
It is a -b line sectional view.

【0020】ここでは、入出力部を兼ね備えるグランド
コプレーナ構造の伝送線路60の上に、コプレーナ構造
の伝送線路50をバンプ電極を用いてフリップチップ接
続した例を示す。なお、伝送線路50には電子部品が搭
載されて電気回路が構成され、伝送線路60の入力部6
8に入力した信号がこの電気回路で処理されてから伝送
回路60の出力部66から出力するものであるが、上記
では接続部分の説明に限ったため、伝送線路50におけ
る電気回路については説明していない。
Here, an example is shown in which a transmission line 50 having a coplanar structure is flip-chip connected to a transmission line 60 having a ground coplanar structure which also serves as an input / output unit by using bump electrodes. Electronic components are mounted on the transmission line 50 to form an electric circuit.
The signal input to the transmission line 8 is processed by this electric circuit and then output from the output unit 66 of the transmission circuit 60. However, the electric circuit in the transmission line 50 is described above because the description is limited to the connection part. Absent.

【0021】伝送線路50は、特性インピーダンスが5
0Ω、信号線導体51の幅が50μm、信号線導体51
と接地導体52との間のギャップg1が35μm、絶縁
体基板53の比誘電率が12.5、厚さが150μmで
ある。導電性バンプ54、64の位置する部分(他方の
伝送路60と対向する領域部分55、57)に対応する
信号線導体51と接地導体52との対向部分のギャップ
g3が「g1<g3」に設定され、そのギャップが「g
3−g1=Δg」だけ拡げられている。
The transmission line 50 has a characteristic impedance of 5
0 Ω, the width of the signal line conductor 51 is 50 μm,
The gap g1 between the conductor and the ground conductor 52 is 35 μm, the relative permittivity of the insulator substrate 53 is 12.5, and the thickness is 150 μm. The gap g3 of the opposing portion between the signal line conductor 51 and the ground conductor 52 corresponding to the portion where the conductive bumps 54 and 64 are located (region portions 55 and 57 facing the other transmission path 60) is "g1 <g3". Is set and the gap is
3-g1 = Δg ”.

【0022】また伝送線路60は、入力部68および出
力部66を兼ねた特性インピーダンスが50Ω、中央で
分断された信号線導体61の幅が50μm、信号線導体
61と接地導体62との間のギャップg2が35μm、
絶縁体基板63の比誘電率が12.6、厚さが600μ
mである。導電性バンプ54、64の位置する部分(他
方の伝送路50と対向する領域部分65、67)に対応
する信号線導体61と接地導体62との対向部分のギャ
ップg4が「g1<g4」に設定され、そのギャップが
「g4−g1=Δg」だけ拡げられている。
The transmission line 60 has a characteristic impedance of 50 Ω serving also as the input section 68 and the output section 66, the width of the signal line conductor 61 divided at the center is 50 μm, and the transmission line 60 between the signal line conductor 61 and the ground conductor 62. The gap g2 is 35 μm,
The dielectric substrate 63 has a relative dielectric constant of 12.6 and a thickness of 600 μm.
m. The gap g4 between the signal line conductor 61 and the ground conductor 62 corresponding to the portion where the conductive bumps 54 and 64 are located (the region portions 65 and 67 facing the other transmission path 50) is "g1 <g4". Is set, and the gap is widened by “g4−g1 = Δg”.

【0023】以上のように、伝送線路60の入力部68
から出力部66に至るまでの特性インピーダンスを整合
させるために、2つの伝送線路50、60が対向する領
域55、57、65、67におけるギャップの拡げ幅Δ
gを、前述した図2の特性から得られる、Δg/h=
2.5に基づいて決める。このようにして、伝送線路5
0のギャップg3と伝送線路60のギャップg4を、お
のおの160μmに設定することにより、伝送線路60
の入力部68から出力部66に至るまでの特性インピー
ダンスを50Ωに整合させることができる。
As described above, the input section 68 of the transmission line 60
In order to match the characteristic impedance from the output line 66 to the output section 66, the gap width Δ in the regions 55, 57, 65, 67 where the two transmission lines 50, 60 face each other.
g is obtained by Δg / h =
Determine based on 2.5. Thus, the transmission line 5
The gap g3 of the transmission line 60 and the gap g4 of the transmission line 60 are set to 160 μm, respectively.
The characteristic impedance from the input unit 68 to the output unit 66 can be matched to 50Ω.

【0024】なお、本構造では、伝送線路50と60を
接続する部分を2個で1組のバンプで接続しているが、
3個以上を1組としたものであっても良い。また、前記
した図5の説明と同様に、ギャップが変化する部分にテ
ーパを設けてその変化を緩慢にしても同様の作用効果を
得ることができる。
In this structure, two portions connecting the transmission lines 50 and 60 are connected by one set of bumps.
A set of three or more may be used. Similar to the description of FIG. 5 described above, a similar effect can be obtained even if a taper is provided in a portion where the gap changes and the change is made slower.

【0025】[その他の実施の形態]前記した第1、第
2の実施の形態では、コプレーナ構造の伝送線路とグラ
ンドコプレーナ構造の伝送線路の接続構造について説明
したが、コプレーナ構造の伝送線路を相互に接続する場
合、あるいはグランドコプレーナ構造の伝送線路を相互
に接続する場合であっても、同様の作用効果を得ること
ができる。
[Other Embodiments] In the first and second embodiments described above, the connection structure between the transmission line having the coplanar structure and the transmission line having the ground coplanar structure has been described. The same operation and effect can be obtained even when the transmission lines are connected to each other or when the transmission lines having the ground coplanar structure are connected to each other.

【0026】[0026]

【発明の効果】以上から本発明によれば、2つの伝送線
路の信号線導体と接地導体との間の容量性結合によるリ
アクタンス成分を低減することができ、入力部から出力
部に至る経路の特性インピーダンスを整合させることが
可能となり、特に数十GHz以上の超高周波領域での信
号伝送特性が大幅に改善される。
As described above, according to the present invention, the reactance component due to the capacitive coupling between the signal line conductor and the ground conductor of the two transmission lines can be reduced, and the path from the input section to the output section can be reduced. The characteristic impedance can be matched, and the signal transmission characteristics particularly in an ultra-high frequency range of several tens of GHz or more are greatly improved.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 本発明の第1の実施の形態を示すプリップチ
ップ実装構造を説明するための図であって、(a)はそ
の斜視図、(b)は(a)のb−b線断面図、(c)は
(b)のc−c線断面図、(d)は(b)のd−d線断
面図である。
FIGS. 1A and 1B are views for explaining a flip-chip mounting structure according to a first embodiment of the present invention, wherein FIG. 1A is a perspective view thereof, and FIG. 1B is a cross-sectional view taken along line bb of FIG. FIG. 2C is a cross-sectional view taken along line cc of FIG. 2B, and FIG. 2D is a cross-sectional view taken along line dd of FIG.

【図2】 特定の特性インピーダンスを得るための導電
性バンプの高さhとギャップの拡げ幅Δgの関係を示す
図である。
FIG. 2 is a diagram showing a relationship between a height h of a conductive bump and a width Δg of a gap for obtaining a specific characteristic impedance.

【図3】 反射損失の周波数特性を示す図である。FIG. 3 is a diagram illustrating frequency characteristics of return loss.

【図4】 挿入損失の周波数特性を示す図である。FIG. 4 is a diagram illustrating frequency characteristics of insertion loss.

【図5】 第1の実施の形態の変形例を示すプリップチ
ップ実装構造を説明するための図であって、(a)はそ
の斜視図、(b)は(a)のb−b線断面図、(c)は
(b)のc−c線断面図、(d)は(b)のd−d線断
面図である。
5A and 5B are views for explaining a flip chip mounting structure showing a modification of the first embodiment, wherein FIG. 5A is a perspective view thereof, and FIG. 5B is a cross-sectional view taken along line bb of FIG. FIG. 2C is a cross-sectional view taken along line cc of FIG. 2B, and FIG. 2D is a cross-sectional view taken along line dd of FIG.

【図6】 第2の実施の形態を示すフリップチップ実装
構造を説明するための図であって、(a)はその斜視
図、(b)は(a)のb−b線断面図である。
6A and 6B are views for explaining a flip-chip mounting structure according to the second embodiment, wherein FIG. 6A is a perspective view thereof, and FIG. 6B is a sectional view taken along line bb of FIG. .

【図7】 第2の実施の形態を示すフリップチップ実装
構造を説明するための図であって、(a)は図6の
(b)のa−a線断面図、(b)は図6の(b)のb−
b線断面図である。
7A and 7B are views for explaining a flip-chip mounting structure according to a second embodiment, in which FIG. 7A is a cross-sectional view taken along line aa of FIG. 6B, and FIG. B- of (b)
It is a sectional view taken on line b.

【図8】 従来のプリップチップ実装構造を説明するた
めの図であって、(a)はその斜視図、(b)は(a)
のb−b線断面図、(c)は(b)のc−c線断面図、
(d)は(b)のd−d線断面図である。
8A and 8B are views for explaining a conventional flip chip mounting structure, wherein FIG. 8A is a perspective view thereof, and FIG.
(C) is a cross-sectional view taken along line cc of (b),
(D) is a sectional view taken along line dd of (b).

【符号の説明】[Explanation of symbols]

10、30、50、70:プレーナ構造の伝送線路 20、40、60、80:グランドコプレーナ構造の伝
送線路 11、21、31、41、51、61、71、81:信
号線導体 12、22、32、42、52、62、72、82:接
地導体 13、23、33、43、53、63:絶縁体基板 14、24、34、44、54、64、74、84:導
電性バンプ 15、25、35、45、55、57、65、67、7
5、85:伝送線路が対向する領域 16、36、68、76:入力部 26、46、66、86:出力部 37、47:テーパ
10, 30, 50, 70: Planar structure transmission line 20, 40, 60, 80: Ground coplanar structure transmission line 11, 21, 31, 41, 51, 61, 71, 81: Signal line conductor 12, 22, 32, 42, 52, 62, 72, 82: ground conductors 13, 23, 33, 43, 53, 63: insulator substrate 14, 24, 34, 44, 54, 64, 74, 84: conductive bumps 15, 25, 35, 45, 55, 57, 65, 67, 7
5, 85: area where transmission lines face each other 16, 36, 68, 76: input section 26, 46, 66, 86: output section 37, 47: taper

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平2−291140(JP,A) 特開 平6−120302(JP,A) 特開 平7−74285(JP,A) 特開 平7−240482(JP,A) (58)調査した分野(Int.Cl.7,DB名) H01L 21/60 H01L 23/12 H01P 3/08 H01P 5/08 ──────────────────────────────────────────────────続 き Continuation of front page (56) References JP-A-2-291140 (JP, A) JP-A-6-120302 (JP, A) JP-A-7-74285 (JP, A) JP-A-7-74 240482 (JP, A) (58) Field surveyed (Int. Cl. 7 , DB name) H01L 21/60 H01L 23/12 H01P 3/08 H01P 5/08

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】信号線導体と該信号線導体と同一面に形成
された接地導体とのギャップがg1であるコプレーナ構
造またはグランドコプレーナ構造の第1の伝送線路と、
信号線導体と該信号線導体と同一面に形成された接地導
体とのギャップがg2であるコプレーナ構造またはグラ
ンドコプレーナ構造の第2の伝送線路と、前記第1、第
2の伝送線路の信号線導体と接地導体とを相互に対向さ
せて電気的に接続する導電性バンプとを具備するフリッ
プチップ実装構造において前記第1、第2の伝送線路の
互いに対面する領域における前記第1の伝送線路の前記
信号線導体と前記接地導体とのギャップをg3に拡げる
とともに、 前記第1、第2の伝送線路の互いに対面する領域におけ
る前記第2の伝送線路の前記信号線導体と前記接地導体
とのギャップをg4に拡げ、 前記導電性バンプの高さをhとしたとき、前記ギッャプ
g1〜g4を、 g3−g1≒g4−g2≒2.5h に設定したことを特徴とするフリップフロップ実装構
造。
A first transmission line having a coplanar structure or a ground coplanar structure in which a gap between a signal line conductor and a ground conductor formed on the same surface as the signal line conductor is g1;
A second transmission line having a coplanar structure or a ground coplanar structure in which a gap between a signal line conductor and a ground conductor formed on the same surface as the signal line conductor is g2, and a signal line of the first and second transmission lines In a flip-chip mounting structure including a conductive bump for electrically connecting a conductor and a ground conductor to each other to electrically connect the first and second transmission lines to each other, A gap between the signal line conductor and the ground conductor is increased to g3, and a gap between the signal line conductor and the ground conductor of the second transmission line in a region of the first and second transmission lines facing each other. G4, and when the height of the conductive bump is h, the gaps g1 to g4 are set as g3-g1 ≒ g4-g2 ≒ 2.5h. Flop mounting structure.
JP04689696A 1996-02-09 1996-02-09 Flip chip mounting structure Expired - Fee Related JP3303226B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP04689696A JP3303226B2 (en) 1996-02-09 1996-02-09 Flip chip mounting structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP04689696A JP3303226B2 (en) 1996-02-09 1996-02-09 Flip chip mounting structure

Publications (2)

Publication Number Publication Date
JPH09219422A JPH09219422A (en) 1997-08-19
JP3303226B2 true JP3303226B2 (en) 2002-07-15

Family

ID=12760137

Family Applications (1)

Application Number Title Priority Date Filing Date
JP04689696A Expired - Fee Related JP3303226B2 (en) 1996-02-09 1996-02-09 Flip chip mounting structure

Country Status (1)

Country Link
JP (1) JP3303226B2 (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002057513A (en) * 2000-08-11 2002-02-22 Denso Corp Extremely high frequency module
KR100394377B1 (en) * 2000-09-07 2003-08-14 이진구 manufacturing method of bump for flip chip
WO2002093685A1 (en) * 2001-05-17 2002-11-21 Cypress Semiconductor Corp. Ball grid array antenna
JP2004095869A (en) * 2002-08-30 2004-03-25 Mitsubishi Electric Corp Light receiving element and light receiving device
US7958981B2 (en) * 2005-06-06 2011-06-14 Kayaba Industry Co., Ltd. Shock absorber
JP5767622B2 (en) * 2012-12-26 2015-08-19 日本電信電話株式会社 High frequency connection line
CN114520212B (en) * 2022-04-20 2022-08-23 之江实验室 Wideband chip packaging structure supporting high-speed signal transmission

Also Published As

Publication number Publication date
JPH09219422A (en) 1997-08-19

Similar Documents

Publication Publication Date Title
JP3241019B2 (en) Coplanar railway track
US4882553A (en) Microwave balun
EP0511728B1 (en) Coplanar waveguide directional coupler and flip-chip microwave monolithic integrated circuit assembly incorporating the coupler
US6674347B1 (en) Multi-layer substrate suppressing an unwanted transmission mode
JP2651336B2 (en) Directional coupler
JPH06232217A (en) Film carrier signal transmission line
JP4004048B2 (en) High frequency transmission line
JP3303226B2 (en) Flip chip mounting structure
JP2000510299A (en) Coplanar waveguide coupler
JP2002185201A (en) Wiring board for high frequency
JP3158031B2 (en) Microstrip line coupling structure
JP3409767B2 (en) High frequency circuit board
JPS644361B2 (en)
JP3470052B2 (en) Connection structure for high frequency components
JP3470053B2 (en) Connection structure for high frequency components
JP2828009B2 (en) Microwave / millimeter-wave integrated circuit substrate connection method and connection line
JP2004304233A (en) Transmission line and semiconductor device
JP3395290B2 (en) High frequency circuit board
JPS6112402B2 (en)
JPH05199019A (en) High frequency circuit package
KR960010010B1 (en) Lange coupler
JP3913937B2 (en) Semiconductor device
JP3077487B2 (en) High frequency circuit
JP2001185918A (en) Wiring board for high frequency
JP3351366B2 (en) High frequency transmission line and method of manufacturing the same

Legal Events

Date Code Title Description
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20020409

LAPS Cancellation because of no payment of annual fees