JP3263956B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device in which an ion-implanted semiconductor substrate is heat-treated (called annealing).

[0002]

2. Description of the Related Art In a conventional method of manufacturing a semiconductor device, an annealing temperature is performed in only one step.

[0003]

In THE INVENTION Problems to be Solved by the conventional method, there is residual damage to the surface, which is to the peculiar behavior in annealing, easily formed metamorphic layer on the surface, also not
Since the activation of the pure substance is not stable, there is a problem that the characteristics of the device are deteriorated and the yield is not stable.

An object of the present invention is to solve the above-mentioned problems, and an object of the present invention is to provide a method of manufacturing a semiconductor device in which residual damage is eliminated, formation of a metamorphic layer is prevented, yield is improved, and variation is drastically reduced.

[0005]

Means for Solving the Problems To accomplish the above object, after ion implantation into a surface of a compound semiconductor substrate, the surface is capped with a surface protective film, then the substrate is thermally treated Forming a one-conductivity-type diffusion layer by heat treatment.
Or, the process is performed in three steps, and the first step temperature is lower than the second step temperature .
Heat treatment at the first step temperature.
Formed during heat treatment at the second step temperature
The metamorphic layer consisting of the very low-concentration carriers of other conductivity type
It is characterized by avoiding .

[0006]

With this configuration, a metamorphic layer formed during the annealing at the second step temperature can be avoided, only the implanted ions can be activated stably, and the characteristics of the device and the yield can be improved.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS As one embodiment of the present invention, a GaAs substrate is made of Si.
A case in which the substrate is cap-annealed with a plasma silicon nitride film after the implantation will be described.

[0008] Figure 1 is a temperature profile in the annealing used in an embodiment of the present invention, the first step temperature
The temperature is 550 ° C and the temperature of the second step is 820 ° C.
The temperature for the three steps is 300 ° C. It employs three steps as annealing process, at temperature of the first steps to recover the plasma damage caused in forming the plasma silicon nitride film, to activate the implanted ions at a temperature of the second step, a third step It is intended to stabilize the crystals temperature of up.

[0009] Figure 2 is 820 ° C. The temperature of the second step, the time to minutes 15, the time of the first step as 10 minutes, the change of the activation rate when changing the temperature of the first steps Show the situation. 3, the temperature <br/> of the first steps in FIG. 1 and 550 ° C., a diagram illustrating a change in the activity rate when changing the processing time of the first step. 2 to 3 to 55
It can be seen that the activation is highest at 0 to 650 ° C. for 10 to 15 minutes and the variation is small. The activation rate by the conventional one-step annealing at 20% to 60%, yet there is also variation, it is possible to improve and stabilize the activation rate by treatment with temperature of the first step.

FIG. 4 is a diagram showing a carrier profile in a method of manufacturing a semiconductor device according to the present invention in comparison with a conventional example. From this figure, it can be seen that the carrier concentration on the GaAs surface and the depth 20
It can be seen that a metamorphic layer composed of extremely low-concentration P-type carriers due to plasma damage existing near 00 ° can be avoided, and the steepness of the carrier profile is also improved.

FIG. 5 shows a characteristic distribution of a field effect transistor (abbreviated as FET) manufactured according to the present invention. The mutual conductance gm of the FET is improved by 30% or more, and the variation is reduced to half or less.

The heat treatment method in the method of manufacturing a semiconductor according to the present invention can be used for recovery from damage when ion implantation is performed on a semiconductor substrate, and recovery from damage when plasma processing is performed on a semiconductor substrate.

The present invention can also be used for heat treatment in the case where multiple ions of different types of ions are implanted into a semiconductor substrate. In this case, heat treatment is performed at the activation temperature of ions having the next largest diffusion coefficient, The heat treatment may be performed sequentially at the crystallization temperature. For example, Zn may be added to GaAs.
When annealing is performed by performing implantation and Si implantation, the Zn annealing temperature may be set in the second step, and the Si annealing temperature may be set in the second step.

[0014]

As is apparent from the above embodiments, the present invention relates to a method for manufacturing a semiconductor device comprising a step of continuously performing heat treatment at two or three steps of temperature. Condition lower than the second step temperature
And heat at the first step temperature
The heat treatment at the second step temperature
Consists of extremely low-concentration carriers of other conductivity type formed during processing
Because of the configuration that avoids the metamorphic layer, a method of manufacturing a semiconductor device can be provided in which a stable carrier profile can be realized, the characteristics of the FET can be improved by 30% or more, and the variation can be reduced to half or less of the conventional case.

[Brief description of the drawings]

FIG. 1 is a diagram showing a temperature profile of a heat treatment step in a method of manufacturing a semiconductor device according to one embodiment of the present invention.

FIG. 2 is a diagram showing a change in an activation rate with respect to a temperature in a first step in FIG. 1;

FIG. 3 is a diagram showing a change in an activation rate with respect to a processing time of a first step in FIG. 1;

FIG. 4 is a diagram showing the relationship between the depth from the surface and the carrier concentration in a semiconductor substrate obtained by the method for manufacturing a semiconductor device of the present invention in FIG. 1 in comparison with a conventional example.

FIG. 5 shows the relationship between the transconductance of the FET obtained by the method for manufacturing a semiconductor device of FIG.
Diagram showing the distribution of the number of

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-64-37010 (JP, A) JP-A-49-12776 (JP, A) JP-A-59-191329 (JP, A) 68134 (JP, A) JP-A-60-119718 (JP, A) JP-A-48-32478 (JP, A) JP-A-2-237023 (JP, A) (58) Fields investigated (Int. ⁷ , DB name) H01L 21/26-21/268 H01L 21/322-21/326 H01L 21/312-21/32

Claims (4)

(57) [Claims] [Claim 1] After ion implantation into a surface of a compound semiconductor substrate, and a cap the surface with a surface protective film, followed by a step of forming a first conductivity type diffusion layer of the substrate was thermally treated semiconductor In the device manufacturing method, the heat treatment is performed in two steps, and the heat treatment is performed under the condition that the first step temperature is lower than the second step temperature.
Heat treatment at the first step temperature
During the heat treatment at the second step temperature
Composed of ultra-low concentration of other conductive type carriers
A method for manufacturing a semiconductor device, comprising: avoiding a layer . 2. The method of manufacturing a semiconductor device according to claim 1, wherein a third heat treatment step is performed after said second heat treatment step.
The third heat treatment step has been added.
Under the condition that the tap temperature is lower than the first step temperature.
A method for manufacturing a semiconductor device, wherein the semiconductor device is processed. 3. A semiconductor according to claim 1, wherein
In the body device manufacturing method, the first step temperature is
A method for manufacturing a semiconductor device, wherein the temperature is in a range of 550 ° C. to 650 ° C. 4. The method according to claim 1, 2 or 3,
In the method for manufacturing a semiconductor device according to
A method of manufacturing a semiconductor device characterized by being a plasma silicon nitride film.