JPH10173036A - Semiconductor device and method of realizing high-resistance semiconductor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To form a gate metal not extending across any stepped part to avoid breaking the gate at the stepped part caused by etching to separate elements by providing Fluorine atom-contg. high-resistance regions in a semiconductor. SOLUTION: On a semi-insulative InP substrate 101 a buffer layer 102, channel layer 103, spacer layer 104, electron feed layer 105, Schottky contact layer 106 and Ohmic contact layer 107 are formed with source electrodes 108 and drain electrodes 109 formed on this grown substrate surface. The Ohmic layer 107 is partly etched between he electrodes 108, 109 and gate electrodes 110 Schottky-contacted to the Schottky contact layer 107 are formed on the etched part where element separating regions 111 are formed. Fluorine-contg. regions 100 are provided on a part of the electron feed layer 105 at the element separating regions 111.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an element isolation region and a resistance element region of a compound semiconductor device. Further, the present invention relates to a method for forming a high-resistance region of a semiconductor device and a method for lowering the resistance of a once-high-resistance region.

[0002]

2. Description of the Related Art As a method for separating elements of an HJFET, there are the following methods.
For example, there is a method of performing etching reaching the high resistance buffer layer (hereinafter, mesa etching). When element isolation is performed by this method, a high-performance high-frequency low-noise heterojunction field-effect transistor (hereinafter, referred to as HJFET) has a short gate length, which causes a problem of reduction in yield due to cut-off of a gate at a step portion. Furthermore, InAlAs / InGaAs-based H expected as a next-generation low-noise element
In the JFBT, in the element isolation method by mesa etching, there is also a problem that a gate metal comes into contact with an InGaAs layer having a small band gap at the step portion, thereby causing a gate leak and deteriorating device characteristics. Further, when fabricating a highly integrated IC device, if element isolation is performed by mesa etching, uneven steps or steps themselves may cause disconnection of metal wiring. In addition, once element separation is performed by etching, the etched area cannot be used as an active element.

[0003]

From the above, it is desirable to perform element isolation without forming a step, that is, by increasing the resistance of the semiconductor crystal.
As a method therefor, an increase in resistance (separation between elements) by ion implantation has been reported. However, in the ion implantation method, the resistance of the product is increased due to crystal destruction.
There is a problem that defects generated at the time of implantation are spread in the horizontal direction due to heat, and a device cannot be manufactured stably. Further, in the case of the InAlAs / InGaAs-based HJFET, it has been difficult to increase the resistance of the n-InAlAs layer having a small resistivity by ion implantation. An object of the present invention is to solve these problems.

[0004]

According to the present invention, there is provided a semiconductor device comprising:
It is characterized by having a high resistance region in which a fluorine atom is introduced into a semiconductor.

[0005] The method for increasing the resistance of a semiconductor according to the present invention comprises:
A step of coating a predetermined surface of the semiconductor with an insulating film, a step of immersing the semiconductor in an aqueous solution containing fluorine ions, and a step of heating the semiconductor at a temperature of 200 ° C or higher and 1000 ° C or lower. I do. In addition, the method for increasing the resistance of a semiconductor according to the present invention includes a step of coating a predetermined surface of the semiconductor with an insulating film, a step of exposing the semiconductor to vapor containing fluorine ions, and a step of exposing the semiconductor to a temperature of 200 ° C or higher and 1000 ° C or lower. And heating at a temperature of Further, in the method for increasing the resistance of a semiconductor according to the present invention, a step of coating a predetermined surface of the semiconductor with an insulating film and a step of heating the semiconductor crystal at a temperature of 200 ° C. or more and 1000 ° C. or less in an atmosphere containing a fluorine-containing gas And characterized in that: Further, the method for increasing the resistance of a semiconductor according to the present invention includes a step of covering a predetermined surface of the semiconductor with an insulating film and a step of implanting fluorine ions or a fluorine compound into the semiconductor. In addition, the method for increasing the resistance of a semiconductor according to the present invention includes a step of implanting fluorine ions or fluorine compound ions into the semiconductor using a focused ion beam.

The method for reducing the resistance of a semiconductor is a method for reducing the resistance of a region whose resistance has been increased by the above method, wherein an insulating film is formed on the surface of the high resistance region or the region having the increased resistance. After that, a heat treatment is performed at a temperature of 200 ° C. or more and 1000 ° C. or less.

[0007]

BEST MODE FOR CARRYING OUT THE INVENTION The high-resistance region of a semiconductor according to the present invention into which fluorine atoms have been introduced refers to a region in which fluorine has entered the inside of a semiconductor. It is formed by a method of performing a heat treatment after exposing to a fluorine ion-containing vapor. Further, it is formed by a method of heat-treating a semiconductor in a fluorine-containing atmosphere or a method of implanting fluorine ions into a semiconductor. Since fluorine atoms have a high electronegativity, they are easily bonded to electrons in the donor layer. In the present invention, by utilizing this property, the resistance of the semiconductor is effectively increased.

The semiconductor in the present invention may be any semiconductor, but preferably contains at least one selected from the group consisting of In, Ga, Al, As, P and Sb.

The method for increasing the resistance of a semiconductor according to the present invention includes a step of coating a predetermined surface with an insulating film. Here, the predetermined surface refers to a surface other than a region where the resistance is desired to be increased. Also,
As the insulating film, for example, photoresist, silicon oxide, silicon nitride, polyimide, or the like can be used.

The aqueous solution containing fluorine ions in the method for increasing the resistance of a semiconductor according to the present invention is, for example, an aqueous solution of potassium fluoride, an aqueous solution of hydrofluoric acid or ammonium fluoride, or a mixed solution of an aqueous solution of hydrofluoric acid and ammonium fluoride. preferable.

The vapor containing fluorine ions in the method for increasing the resistance of a semiconductor according to the present invention refers to the vapor of the above-mentioned aqueous solution containing fluorine ions.

The fluorine-containing gas in the method for increasing the resistance of a semiconductor according to the present invention includes HF, sulfur fluoride, CN
F, OF ₂ , BF ₃ , phosphorus fluoride, ClF, BrF, I
F, NF ₃ , SF ₆ , CH _x F _y Cl _z (y = 1 to 3, x +
y + z = 4), C 2 H x F y Cl z (y = 1~5, x + y +
z = 6) and the like, and in particular, ClF, B
_{rF, IF, NF 3, SF} 6, CH x F y Cl z (y = 1~
3, x + y + z = 4) and C ₂ H _x F _y Cl _z (y = 1 to
5, x + y + z = 6) is preferably used as a gas containing at least one selected from the group consisting of:

The method for increasing the resistance or lowering the resistance of a semiconductor according to the present invention includes a step of heat-treating the semiconductor.
The temperature is preferably set to not more than 250 ° C., and more preferably set to 250 ° C. or more and 500 ° C. or less. If the temperature is lower than 200 ° C., fluorine hardly penetrates into the semiconductor crystal, and if it is higher than 1000 ° C., defects may occur in the semiconductor crystal. The preferable heat treatment time depends on the heat treatment temperature, but is preferably 1 minute or more and 3 hours or less when the treatment temperature is 300 ° C., for example.

The focused ion beam in the method for increasing the resistance of a semiconductor according to the present invention refers to an ion beam focused by a magnetic field.

The method for increasing the resistance of a semiconductor according to the present invention can be repeated two or more times to further improve the effect.

In the semiconductor device of the present invention, the high-resistance region or the region whose resistance has been increased by the method of increasing the resistance of the semiconductor according to the present invention has its surface lowered by performing a heat treatment after covering the surface with an insulating film. be able to. This is because fluorine which has entered the high-resistance region can be taken into the insulating film by the heat treatment. As an insulating film that can be used for lowering resistance, silicon oxide, silicon nitride, SiON, or the like can be used. The area reactivated in this way
Again, it can be used as an active element.

[0017]

【Example】

 (Embodiment 1) An embodiment of a semiconductor device according to the present invention
Between HJFETs fabricated on a simple InP substrate
This case will be described with reference to FIG. Eradication
An i-InAlAs buffer is placed on the edge InP substrate 101
Layer 102, i-InGaAs channel layer 103, iI
nAlAs spacer layer 104, 6 × 10 Si¹⁸cm ^-3
N-InAlAs added electron supply layer 105, i-
InAlAs Schottky contact layer 106, n-InGaAs
s Ohmic contact layer 107 is successively grown epitaxially
Is formed. Here, n-InGaAs ohmic
The contact layer 107 improves ohmic contact.
It is provided for. The source electrode is placed on the surface of this growth substrate.
A pole 108 and a drain electrode 109 are formed, and a source electrode
N-InGaAs between the gate electrode 108 and the drain electrode 109
Contact layer 107 is partially etched away,
The i-InAlAs Schottky contact layer 106
The gate electrode 110 that makes Schottky contact is formed.
You. Two or more such HJFETs exist on the same wafer.
Are there. At this time, n-InGaAs between each HJFET
The s layer 107 has been partially etched away. this
Area for separating HJFET into parts (element isolation area)
Region 111 is formed. This element isolation region 11
1. Part 105 (a) of the n-InAlAs layer 105 in FIG.
6 × 10¹⁸cm-^ThreeHas an area where F is introduced.
You. The isolation between the elements is achieved by the element isolation region 111.
Was sufficient to actually operate the device.

In this embodiment, the case where the high resistance region is used for isolation between elements has been described. However, it is also possible to use the high resistance region for the resistance element region in the MMIC. Further, in the present embodiment, the amount of Si added to the n-InAlAs electron supply layer layer 105 is set to 6 × 10 ¹⁸ cm ⁻³ , but the amount is not particularly limited. In this embodiment, the amount of fluorine introduced (concentration) is set to 8 × 10 ¹⁸ cm ⁻³ . However, when element separation is performed by introducing fluorine, the amount of introduced fluorine is n-
The Si addition weight 112 of the InAlAs electron supply layer 105
It should be bigger. When the fluorine-introduced region is used as the resistance element region, an arbitrary amount of fluorine to be introduced may be used so as to obtain a desired resistance value, and there is no particular limitation on the introduced amount.

(Embodiment 2) One embodiment of the method for increasing the resistance of a semiconductor according to the present invention is described below.
FIG. 2 shows a case where the present invention is applied as a JFET element separation.
This will be described with reference to (a) to (e). Cap layer (ohmic contact layer) in the area where high resistance of the semiconductor crystal is desired
After etching, the area other than the area where high resistance is desired is covered with a resist, and immersed in hydrofluoric acid for 5 seconds (FIG. 2A,
(B)). Next, the resist is peeled off (FIG. 2 (c)), and 30
Heat treatment is performed at 0 ° C. for 1 hour (FIG. 2D). A high resistance region is formed by the above steps (FIG. 2E). Using this region as an element isolation region, an ohmic electrode and a gate electrode are formed to manufacture a device. This method is called I
1 μm thick, doping concentration 1 formed on nP substrate
When used for an n-InAlAs layer of × 10 ¹⁸ cm- ³ ,
Sheet carrier concentration from 1 × 10 ¹⁴ cm- ² to 1 × 10 ¹
It could be reduced to ¹ cm- ² . Thus, it can be seen that good device isolation can be achieved.

In this embodiment, hydrofluoric acid is used as the aqueous solution containing fluorine ions, but the aqueous solution may be an NH ₄ F aqueous solution or a mixed solution of hydrofluoric acid and an NH ₄ F aqueous wave. Although the area other than the area where high resistance is desired is covered with the resist, it may be covered with an insulating film. Further, when covered with an insulating film, it is not necessary to remove it before the heat treatment. The heat treatment temperature was 300 ° C.
The temperature may be at least 00 ° C. In addition, as shown in FIG. 8, the resistance can be further increased by repeating this method.
In the present embodiment, the high resistance region into which fluorine has penetrated was used as the isolation region between the elements, but the concentration of the aqueous solution containing fluorine ions, the time of immersion in the aqueous solution containing fluorine ions, and the heat treatment temperature and time were controlled. By doing so, a desired resistivity can be obtained, and this high-resistance region can be used as a resistance element region.

(Embodiment 3) An embodiment of the method for increasing the resistance of a semiconductor according to the present invention is described below.
FIG. 3 shows a case where the present invention is applied as JFET element isolation.
This will be described with reference to (a) to (e). Cap layer (ohmic contact layer) in the area where high resistance of the semiconductor crystal is desired
After etching, a region other than the region where high resistance is desired is covered with a resist, and is set at a position of 5 cm above hydrofluoric acid.
(FIGS. 3A and 3B). Next, the resist is stripped (FIG. 3C), and heat treatment is performed at 300 ° C. for 1 hour in a nitrogen atmosphere (FIG. 3D). A high resistance region is formed by the above steps (FIG. 3E). Using this region as an element isolation region, an ohmic electrode and a gate electrode are formed to manufacture a device. This method is applied to a 1 μm thick doping concentration of 1 × 10 ¹⁸ c formed on an Inp substrate.
When used in n-InAlAs layer of ^m-3, the sheet carrier concentration could be reduced from 1 × 10 ¹⁴ cm- ² to 1 × 10 ¹¹ cm- ^2. This indicates that good element isolation can be achieved.

Here, hydrofluoric acid is used as the aqueous solution containing fluorine ions, but the aqueous solution may be an NH ₄ F aqueous solution or a mixed solution of hydrofluoric acid and an NH ₄ F aqueous wave. Although the area other than the area where high resistance is desired is covered with the resist, it may be covered with an insulating film. Further, when covered with an insulating film, it is not necessary to remove it before the heat treatment. The heat treatment temperature was 300 ° C.
It is sufficient that the temperature is at least ° C. Further, similarly to the second embodiment, the resistance can be further increased by repeating this method. In this embodiment, the high-resistance region into which fluorine has entered is used as the inter-element separation region. However, by controlling the time of exposure to HF vapor and the temperature and time of the heat treatment, a desired resistivity can be obtained. The resistance region can be used as a resistance element region.

Example 4 nI formed on an InP substrate and having a thickness of 1 μm and a doping concentration of 1 × 10 ¹⁸ cm ⁻³
After the same processing as in Example 2 was performed on the nAlAs layer, the same processing as in Example 3 was performed. As a result, the sheet carrier concentration ranges from 1 × 10 ¹⁴ cm −2 to 8 × 10 ¹⁰ cm.
- it could be reduced to ^2. Thus, it can be seen that good element isolation is possible. Further, the same effect was obtained by performing the processing of the second embodiment after the processing of the third embodiment in the reverse order of the present embodiment.

(Embodiment 5) One embodiment of the method for increasing the resistance of a semiconductor according to the present invention is an HJ manufactured on a general InP substrate.
FIG. 4 shows a case where the present invention is applied as a device isolation between FETs.
This will be described using (a) to (c). Cap layer (ohmic contact layer) in the area where high resistance of semiconductor products is desired
After that, the region other than the region where the resistance is desired to be increased is covered with an insulating film. This sample is heat-treated at 300 ° C. in a furnace into which CHF ₃ gas has been introduced (FIG. 4A).
(B)). A high resistance region is formed by the above steps (FIG. 4C). Using this region as an element isolation region,
An ohmic electrode and a gate electrode are formed to manufacture a device. This method is applied to a 1 μm thick substrate formed on an InP substrate.
m, n-InAl with doping concentration of 1 × 10 ¹⁸ cm- ³
Used for As layer. Here, the CHF ₃ gas flow rate is 10 m
1 / min. As a result, the sheet carrier concentration in the heat treatment of 20 minutes 1 × 10 ¹⁴ cm- ² from 1 × 10 ¹¹ cm
- it could be reduced to ^2. This indicates that good element isolation can be achieved. Here, CHF ₃ gas is used as the fluorine-containing gas, but any gas may be used as long as the gas contains fluorine. Although the region other than the region where high resistance is desired is covered with the insulating film, it may be covered with a resist. In addition, the heat treatment temperature is 300 ° C., but may be 200 ° C. or more. In this embodiment, the high-resistance region into which fluorine has penetrated was used as an element isolation region. However, a desired resistivity can be obtained by controlling the heat treatment temperature and time. It can also be used as a region.

(Embodiment 6) One embodiment of the method for increasing the resistance of a semiconductor according to the present invention is an HJ manufactured on a general InP substrate.
FIG. 5 shows a case where the present invention is applied as an element isolation between FETs.
This will be described with reference to (a) and (b). Cap layer (ohmic contact layer) in the area where high resistance of the semiconductor crystal is desired
After etching, a region other than the region where high resistance is desired is covered with an insulating film and fluorine is ion-implanted into the semiconductor to form a high resistance region (FIGS. 5A and 5B). When using this technique to n-InAlAs layer of 1 × 10 ¹⁸ cm- ³ of 1 [mu] m, the injection amount 1 × 10 ¹⁸ cm- ² at the sheet carrier concentration 1 × 10 ¹⁴ cm-2 from 5 × 10 ¹¹ cm- Could be reduced to ² . This indicates that good element isolation can be achieved. Here, fluorine-ions are ion-implanted, but the injected ions may be any ions as long as they are fluorine compound ions. Although the region other than the region where high resistance is desired is covered with the insulating film, it may be covered with a resist. In this embodiment, the high-resistance region into which fluorine has penetrated was used as the element isolation region. However, a desired resistivity can be obtained by controlling the amount of implantation, and this high-resistance region is used as the resistance element region. Can also.

(Embodiment 7) One embodiment of the method for increasing the resistance of a semiconductor according to the present invention is an HJ manufactured on a general InP substrate.
FIG. 6 shows a case where the present invention is applied as isolation between FET elements.
This will be described with reference to (a) and (b). Cap layer (ohmic contact layer) in the area where high resistance of semiconductor products is desired
After etching, F- is selectively ion-implanted into the region by a focused ion beam method to form a high resistance region (FIGS. 6A and 6B). This method is applied to 1 μm
When used for an n-InAlAs layer of × 10 ¹⁸ cm- ³ ,
Injection amount 1 × 10 ¹⁸ cm- ² and sheet carrier concentration 1 ×
It could be reduced from 10 ¹⁴ cm- ² to 5 × 10 ¹¹ cm- ² . This indicates that good element isolation can be achieved. Here, the fluorine ions are ion-implanted, but the injected ions may be any ions as long as they are fluorine compound ions. In this embodiment, the high-resistance region into which fluorine has penetrated was used as the element isolation region. However, a desired resistivity can be obtained by controlling the amount of implantation, and this high-resistance region is used as the resistance element region. Can also.

(Embodiment 8) An embodiment of the method for lowering the resistance of a semiconductor according to the present invention is an HJ manufactured on a general InP substrate.
FIG. 7 shows a case where the present invention is applied as an element isolation between FETs.
This will be described using (a) to (c). Examples 2 to 7 above
A SiN film is formed on the surface of a high resistance region in a semiconductor crystal formed by using any one or a plurality of (FIG. 7)
(A)), heat treatment is performed to reactivate the donor (FIG. 7)
(B), (c)). The method of Example 1 thickness sheet carrier concentration was decreased to 1 × 10 ¹¹ cm- ² by of 1
FIG. 9 shows the dependence of the sheet carrier concentration on the heat treatment time when used in a μm n-InAlAs layer. in this way,
Once the resistance of the n-InAlAs layer has been increased, the resistance can be reduced (reactivated) again.

In Examples 1 to 8, the present invention is applied to In.
The case where the present invention is applied to an InAlAs / InGaAs heterojunction field effect transistor on a P substrate is described.
A heterojunction field effect transistor other than this type, a heterojunction bipolar transistor, or a metal-semiconductor transistor may be used.

[0029]

As described above, the semiconductor device of the present invention is characterized in that the semiconductor has a high resistance region in which fluorine atoms are introduced. If this high-resistance region is provided in the element isolation region, the gate metal does not cross the step, and as a result, the problem of gate disconnection at the step portion which occurred when element isolation was performed by etching. Can be resolved.

In order to increase the resistance of the semiconductor of the present invention, a method of immersing the semiconductor in hydrofluoric acid or the like, a method of exposing the semiconductor to a fluorine ion-containing vapor and a heat treatment, or
It is formed by a method of heat-treating a semiconductor in a fluorine-containing atmosphere or a method of ion-implanting fluorine ions into a semiconductor. Therefore, it is possible to form a stable high-resistance region that is less likely to change in characteristics in a subsequent device manufacturing process. Further, it can be effectively used even when the resistance of the HJFET is partially increased.

Further, by forming an insulating film containing Si on the surface of the region having a high resistance according to the present invention and performing heat treatment, this region can be reactivated. For example, the area can be used as an active device.

[Brief description of the drawings]

FIG. 1 is a sectional structural view of an example of a semiconductor device of the present invention.

FIG. 2 is a diagram illustrating a method for increasing the resistance of a semiconductor according to the present invention.

FIG. 3 is a diagram illustrating a method for increasing the resistance of a semiconductor according to the present invention.

FIG. 4 is a diagram for explaining a method for increasing the resistance of a semiconductor according to the present invention.

FIG. 5 is a diagram illustrating a method for increasing the resistance of a semiconductor according to the present invention.

FIG. 6 is a diagram illustrating a method for increasing the resistance of a semiconductor according to the present invention.

FIG. 7 is a diagram for explaining a method for lowering the resistance of a semiconductor according to the present invention.

FIG. 8 is a diagram showing the dependence of the sheet carrier concentration on the number of times of processing in the method for increasing the resistance of a semiconductor according to the present invention.

FIG. 9 is a diagram showing the heat treatment time dependency of the sheet carrier concentration in the method for increasing the resistance of a semiconductor according to the present invention.

[Explanation of symbols]

REFERENCE SIGNS LIST 1 semiconductor crystal 2 hydrofluoric acid (HF) aqueous solution 3 furnace 4 quartz tube 5 flow meter 6 valve 100 region of n-InAlAs electron supply layer into which fluorine is introduced 101 semi-insulating InP substrate 102 i-InAlAs buffer layer 103 i- InGaAs channel layer 104 i-InAlAs spacer layer 105 n-InAlAs electron supply layer 106 i-InAlAs Schottky layer 107 n-InGaAs ohmic contact layer 108 source electrode 109 drain electrode 110 gate electrode 111 A region exposed to fluorine in the semiconductor crystal surface Reference Signs List 112 resist 113 high-resistance region 114 insulating film 115 region implanted on semiconductor crystal surface 116 Si-containing insulating film 117 activated region

Claims (15)

[Claims] 1. A semiconductor device having a high resistance region in which fluorine atoms are introduced into a semiconductor. 2. The semiconductor device according to claim 1, wherein said high resistance region is provided in an element isolation region. 3. The semiconductor device according to claim 1, wherein said high resistance region is provided in a resistance element region. 4. The semiconductor according to claim 1, wherein said semiconductor is In, Ga, Al, A
4. The semiconductor device according to claim 1, comprising at least one selected from the group consisting of s, P, and Sb. 5. A step of coating a predetermined surface of a semiconductor with an insulating film, a step of dipping the semiconductor in an aqueous solution containing fluorine ions, and a step of heating the semiconductor at a temperature of 200 ° C. or more and 1000 ° C. or less. A method for increasing the resistance of a semiconductor, comprising: 6. The method for increasing the resistance of a semiconductor according to claim 5, wherein the aqueous solution containing fluorine ions is hydrofluoric acid, an aqueous solution of ammonium fluoride, or a mixed solution of hydrofluoric acid and an aqueous solution of ammonium fluoride. 7. A step of covering a predetermined surface of a semiconductor with an insulating film, a step of exposing the semiconductor to vapor containing fluorine ions, and a step of heating the semiconductor at a temperature of 200 ° C. or more and 1000 ° C. or less. A method for increasing the resistance of a semiconductor, comprising: 8. A step of coating a predetermined surface of a semiconductor with an insulating film, and a step of coating the semiconductor in an atmosphere containing a fluorine-containing gas.
Heating at a temperature of from 00 ° C. to 1000 ° C. 9. The method according to claim 8, wherein the fluorine-containing gas is ClF, Br
F, IF, NF ₃ , SF ₆ , CH _x F _y Cl _z (y = 1 to
3, x + y + z = 4) and C ₂ H _x F _y Cl _z (y = 1 to
9. The method for increasing the resistance of a semiconductor according to claim 8, comprising at least one selected from the group consisting of: 5, x + y + z = 6). 10. A method for increasing the resistance of a semiconductor, comprising: a step of coating a predetermined surface of the semiconductor with an insulating film; and a step of implanting fluorine ions or a fluorine compound into the semiconductor. 11. A method for increasing the resistance of a semiconductor, comprising a step of implanting fluorine ions or fluorine compound ions into the semiconductor by using a focused ion beam. 12. A method for increasing the resistance of a semiconductor, comprising repeating the method for increasing the resistance of a semiconductor according to claim 5 twice or more. 13. The semiconductor according to claim 1, wherein the semiconductor is In, Ga, Al, A
The method for increasing the resistance of a semiconductor according to any one of claims 5 to 12, comprising at least one selected from the group consisting of s, P, and Sb. 14. A method for reducing the resistance of the high resistance region of the semiconductor device according to any one of claims 1 to 4 or the region whose resistance has been increased by the method according to any one of claims 5 to 13. After forming an insulating film on the surface of the high-resistance region or the high-resistance region, the temperature is set to 200 ° C. or higher.
A method for lowering the resistance of a semiconductor, comprising performing heat treatment at a temperature of 000 ° C. or lower. 15. The semiconductor according to claim 1, wherein the semiconductor is In, Ga, Al, A.
The method for reducing the resistance of a semiconductor according to claim 14, comprising at least one selected from the group consisting of s, P, and Sb.