JP3194118B2 - Semiconductor device and method of manufacturing semiconductor component used in the semiconductor device - Google Patents

Semiconductor device and method of manufacturing semiconductor component used in the semiconductor device

Info

Publication number
JP3194118B2
JP3194118B2 JP5730694A JP5730694A JP3194118B2 JP 3194118 B2 JP3194118 B2 JP 3194118B2 JP 5730694 A JP5730694 A JP 5730694A JP 5730694 A JP5730694 A JP 5730694A JP 3194118 B2 JP3194118 B2 JP 3194118B2
Authority
JP
Japan
Prior art keywords
semiconductor
copper
semiconductor component
mounting substrate
weight
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP5730694A
Other languages
Japanese (ja)
Other versions
JPH07307422A (en
Inventor
正 有川
晃 市田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ALMT Corp
Original Assignee
ALMT Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ALMT Corp filed Critical ALMT Corp
Priority to JP5730694A priority Critical patent/JP3194118B2/en
Publication of JPH07307422A publication Critical patent/JPH07307422A/en
Application granted granted Critical
Publication of JP3194118B2 publication Critical patent/JP3194118B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/49105Connecting at different heights
    • H01L2224/49109Connecting at different heights outside the semiconductor or solid-state body

Landscapes

  • Powder Metallurgy (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】半導体装置に関し、特に、半導体
装置に用いられる半導体部品であって、IC等の半導体
素子を搭載するための搭載基板に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor component used in a semiconductor device, and more particularly to a mounting substrate on which a semiconductor element such as an IC is mounted.

【0002】[0002]

【従来の技術】従来、IC等の半導体素子を搭載するた
めの搭載基板としてのヒートシンクが次々と提案され、
半導体チップを収容するためのパッケージに実際に使用
されている。現在、提案されている半導体素子の搭載基
板(以下、ヒートシンクと呼ぶ)の大部分は、その熱膨
張係数を、シリコン(Si)やガリウム砒素(GaA
s)等の半導体素子を形成している半導体材料の熱膨張
係数に近づけるようにしている。これは、半導体チップ
とヒートシンクとの間の熱膨張係数の相違による半導体
チップの破壊を避けるためである。この点を考慮して、
熱膨張係数が半導体素子のそれに近いモリブデン(M
o)、タングステン(W)等の高融点金属がヒートシン
クの材料として用いられている。
2. Description of the Related Art Conventionally, heat sinks as mounting substrates for mounting semiconductor elements such as ICs have been proposed one after another.
It is actually used in packages for housing semiconductor chips. At present, most of the mounting boards (hereinafter, referred to as heat sinks) of semiconductor devices proposed have a thermal expansion coefficient of silicon (Si) or gallium arsenide (GaAs).
s) and the like, so as to approach the thermal expansion coefficient of the semiconductor material forming the semiconductor element. This is to avoid destruction of the semiconductor chip due to a difference in the coefficient of thermal expansion between the semiconductor chip and the heat sink. With this in mind,
Molybdenum (M
o), a high melting point metal such as tungsten (W) is used as a material for the heat sink.

【0003】このような背景から、特公平2−3186
3号では、半導体チップとヒートシンクとの間の熱膨張
係数を一致させるため、熱膨張係数を9×10-6/K以
下にするようにこだわったものが開示されている。
[0003] From such a background, Japanese Patent Publication No. 2-3186
No. 3 discloses that the thermal expansion coefficient is set to 9 × 10 −6 / K or less in order to match the thermal expansion coefficient between the semiconductor chip and the heat sink.

【0004】一方、近年、半導体チップやヒートシンク
などを軽量化し、大量生産によって半導体装置を安価に
することが熱望されている。ところが、モリブデン、タ
ングステン等の高融点金属は一般に高密度を有してお
り、高融点金属を使用することによって、ヒートシンク
は重くなり、しかも高価である。即ち、高融点金属の使
用は、軽量化及び低価格化の要求には不適当である。特
公平3−36304号公報では、軽量化及び低価格化を
図るため、高融点金属多孔質体に銅を含浸して成る方法
が開示されている。
On the other hand, in recent years, it has been desired to reduce the weight of semiconductor chips and heat sinks and to reduce the cost of semiconductor devices by mass production. However, refractory metals such as molybdenum and tungsten generally have a high density, and the use of the refractory metal makes the heat sink heavy and expensive. That is, the use of a high melting point metal is not suitable for the demand for weight reduction and cost reduction. Japanese Patent Publication No. 3-36304 discloses a method of impregnating a high-melting-point metal porous body with copper in order to reduce the weight and cost.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、次世代
では、半導体素子を搭載するための搭載基板において、
軽量かつ機能も損わないものが熱望されており、その要
求を満足するような搭載基板の特性としては、少くとも
熱伝導率が200W/m・K、望ましくは230W/m
・K以上で、密度については現在最も有力視されている
銅より著しく大きくならない範囲、言い換えれば10g
/cm3 以下であることが望ましい。ところが、図6に
示すように、剛性や加工性等を考慮に入れると上記した
従来のものではそれらを満足するものはなかった。
However, in the next generation, a mounting substrate for mounting a semiconductor element is
There is a strong demand for a light-weight and one that does not impair the function, and the characteristics of the mounting board that satisfies the demand include a thermal conductivity of at least 200 W / m · K, preferably 230 W / m.
-A range of not less than K, which is not significantly larger than the currently most promising copper, in other words, 10 g
/ Cm 3 or less. However, as shown in FIG. 6, when the rigidity and workability are taken into consideration, none of the above-mentioned conventional devices satisfy these requirements.

【0006】ここで、密度の点においては図6に示すよ
うにアルミニウム(Al)や炭化ケイ素(SiC)が優
れているが、前者は熱膨張が大きすぎる点、後者はもろ
く実用上加工に耐えられないという重大な問題がある。
Here, as shown in FIG. 6, aluminum (Al) and silicon carbide (SiC) are superior in terms of density, but the former is too large in thermal expansion and the latter is brittle and practically endurable in processing. There is a serious problem that can not be done.

【0007】又、今後の技術トレンドでは、軽量化及び
低価格化を図ることができ、さらに複数の素子あるいは
複数の機能を有するものを搭載することができる搭載基
板が熱望されている。従って、従来のように例えば搭載
基板の一片が10〜30mm、時として40mmであっ
たものは、今後は、従来の2倍以上の面積となることが
予想される。
[0007] In the future technical trend, there is a strong demand for a mounting substrate which can be reduced in weight and cost, and on which a device having a plurality of elements or a plurality of functions can be mounted. Therefore, for example, the size of a piece of the mounting substrate, which is 10 to 30 mm and sometimes 40 mm as in the related art, is expected to be twice as large as that of the related art in the future.

【0008】しかしながら、アルミニウムは、熱膨張が
大きいので基板面積が大きくなると高い熱に対する基板
のソリ等の変形が生じてしまうという問題点を生じる。
又、炭化ケイ素はもろく実用上加工に耐えられない。
However, since aluminum has a large thermal expansion, if the substrate area is large, there is a problem that the substrate is deformed by high heat, such as warping.
Also, silicon carbide is brittle and cannot withstand practical processing.

【0009】一方、銅基板は、熱伝導性が良く、高発熱
のモジュールには特に有効であるが、組立後の取り扱い
が面倒であり、全体として薄層化しにくいため、外部ピ
ンを別に設けなければならず、特にマルチチップモジュ
ールで面積が非常に大きいものである場合(例えば、大
きいもので一片100〜200mmのものがある)、高
い熱に対する基板のソリ等の変形は免れずモジュール自
体の信頼性を損ねることとなる。従って、今後高集積化
が進む中、銅基板では対応は不充分であることが予測さ
れる。
On the other hand, a copper substrate has good thermal conductivity and is particularly effective for a module generating high heat. However, since handling after assembly is troublesome and it is difficult to make the whole thin, it is necessary to provide external pins separately. In particular, in the case of a multi-chip module having a very large area (for example, a large one having a size of 100 to 200 mm), deformation such as warping of a substrate due to high heat is inevitable and the reliability of the module itself is not reduced. It will impair the nature. Therefore, it is expected that copper substrates will be insufficiently compatible with the progress of high integration.

【0010】本発明の課題は、面積が大きく、複数の素
子を搭載する搭載基板に高い熱が与えられてもソリ等の
変形が生じず、しかも軽量化及び低価格化を図ることが
できる半導体装置を提供することである。
SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor which has a large area, is free from deformation such as warpage even when high heat is applied to a mounting substrate on which a plurality of elements are mounted, and can be reduced in weight and cost. It is to provide a device.

【0011】本発明の他の課題は、加工性もよく、IC
パッケージに適した特性を有する半導体装置を提供する
ことである。
Another object of the present invention is to improve the workability and improve the IC
An object of the present invention is to provide a semiconductor device having characteristics suitable for a package.

【0012】本発明の更に他の課題は、上記特性を有す
る搭載基板としての半導体部品を製造する方法を提供す
ることである。
Still another object of the present invention is to provide a method for manufacturing a semiconductor component as a mounting substrate having the above characteristics.

【0013】[0013]

【課題を解決するための手段】本発明によれば、半導体
素子を搭載するための手段として、モリブデン又はタン
グステンによる第1の金属と銅による第2の金属とから
なる半導体部品を含む半導体装置において、前記第2の
金属が40重量%以上であって、前記半導体部品が、熱
伝導率200W/m・K以上、密度10g/cm3 以
下、ヤング率14,000kg/mm2 以上の特性を有
し、その半導体部品に300℃以上で温間プレス加工を
施すことによって、前記半導体部品が基板部と該基板部
の板面から突出する突出部とからなる段付き形状を呈す
るように形成されていることを特徴とする半導体装置が
得られる。
According to the present invention, there is provided, as a means for mounting a semiconductor element, a semiconductor device including a semiconductor component comprising a first metal made of molybdenum or tungsten and a second metal made of copper. The semiconductor component has a thermal conductivity of 200 W / m · K or more, a density of 10 g / cm 3 or less, and a Young's modulus of 14,000 kg / mm 2 or more; The semiconductor component is subjected to warm pressing at 300 ° C. or more, so that the semiconductor component is formed to have a stepped shape including a substrate portion and a protruding portion protruding from a plate surface of the substrate portion. A semiconductor device characterized by the following.

【0014】又、本発明によれば、銅が40重量%以上
であって、熱伝導率200W/m・K以上、密度10g
/cm3 以下、及びヤング率14,000kg/mm2
以上の特性を有する半導体部品の製造方法であって、モ
リブデン又はタングステンと銅とを混合すると共に有機
バインダーを混練し、押出し成形により前記半導体部品
用の焼結素材を得ることを特徴とする半導体部品の製造
方法が得られる。
According to the present invention, the copper content is 40% by weight or more, the thermal conductivity is 200W / m · K or more, and the density is 10g.
/ Cm 3 or less, and Young's modulus 14,000 kg / mm 2
A method for producing a semiconductor component having the above characteristics, comprising mixing molybdenum or tungsten and copper, kneading an organic binder, and extruding to obtain a sintered material for the semiconductor component. Is obtained.

【0015】[0015]

【実施例】本発明の実施例について図面を参照して詳細
に説明する。図1は、本発明に係る半導体装置の一実施
例を示す断面図である。図1において、搭載基板6上に
複数の半導体素子(以下、ICチップと呼ぶ)1及び複
数のリードフレーム5が搭載される。リード端子3は図
の表裏方向に複数並列に配置されており、各リード端子
3がそれぞれリード線2を介してICチップ1に接続さ
れている。さらに、搭載基板6とリード端子3の間には
絶縁材料4が設けられている。尚、絶縁材料4には、例
えばポリイミドフィルム等が用いられている。
Embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a sectional view showing one embodiment of a semiconductor device according to the present invention. In FIG. 1, a plurality of semiconductor elements (hereinafter referred to as IC chips) 1 and a plurality of lead frames 5 are mounted on a mounting substrate 6. A plurality of lead terminals 3 are arranged in parallel in the front and back directions in the figure, and each lead terminal 3 is connected to the IC chip 1 via a lead wire 2. Further, an insulating material 4 is provided between the mounting substrate 6 and the lead terminals 3. The insulating material 4 is, for example, a polyimide film.

【0016】このような面積の大きい搭載基板の材料と
して銅を用いた場合、銅は可撓性(柔らかくてたわみや
すい性質)であるので、そのままでは所望の特性、即
ち、基板のソリ等の変形が少なく、しかもICチップと
搭載基板との間の熱膨張係数を一致させるような特性を
有さず、かつ汎用に供し得る程安価な材料としては満足
することはできない。そのため、本願発明の発明者等
は、ICチップの膨張係数に近い高融点金属であるモリ
ブデン、タングステンとの複合材料をベースとして、上
記特性を有する搭載基板としての半導体部品をいかに製
造するのかをその製造方法から検討した。以下、上記特
性を有する半導体部品の製造方法を説明する。尚、以
下、半導体部品を搭載基板と呼ぶ。
When copper is used as the material of the mounting substrate having such a large area, since copper is flexible (soft and easily bendable), desired characteristics as it is, that is, deformation of the substrate such as warpage, etc. However, it does not have such characteristics as to make the thermal expansion coefficient between the IC chip and the mounting substrate equal, and cannot be satisfied as a material which is inexpensive enough for general use. Therefore, the inventors of the present invention have studied how to manufacture a semiconductor component as a mounting substrate having the above characteristics based on a composite material of molybdenum and tungsten, which are high-melting metals close to the expansion coefficient of an IC chip. Considered from the manufacturing method. Hereinafter, a method for manufacturing a semiconductor component having the above characteristics will be described. Hereinafter, the semiconductor component is referred to as a mounting substrate.

【0017】銅粉末とモリブデン粉末を混合し、焼結後
圧延し高精度な搭載基板を製作し得ることは本発明者等
がすでに公表しており(粉体粉末冶金協会平成5年秋季
大会)、周知の事実である。しかし、ここでは特に熱間
圧延においてが割れ易い等の理由でコスト的に問題とな
っており、耐変形性の一つの指標であるヤング率につい
て解決されていなかった。
The present inventors have already announced that copper powder and molybdenum powder can be mixed, sintered and then rolled to produce a high-precision mounting substrate (Powder and Powder Metallurgy Association Fall Meeting 1993). It is a well-known fact. However, this is a problem in terms of cost, particularly because hot rolling is easily broken, and the Young's modulus, which is one index of deformation resistance, has not been solved.

【0018】本発明者等は、銅粉末とモリブデン粉末の
混合物を有機バインダーとともに混練し、その混練物を
高密度、高粘度のスラリーにして0.5〜4mm厚、望
ましくは1〜1.5mm厚で押出し、脱バインダーして
焼結した後、2.5mm以下の焼結体では冷間圧延のみ
を施し、2.5mm以上の焼結体では熱間圧延後冷間圧
延を施すことで、搭載基板の表面にクボミ、欠け、シワ
がなく、さらに表面粗さの優れた基板材料を、極めて容
易に、しかも従来より大幅に安価にて製造し得ることを
見出した。この方法によって得られた圧延板即ち搭載基
板は、表2に示すように、ビッカース硬度が80Hv以
上の剛性を有し、極めて緻密で、伸びが15%以上であ
った。さらに、熱発生等の歪により変形が生じようとし
ても、その発生局部が伸びるためその歪を吸収するので
搭載基板に搭載されるICチップに影響を及ぼす程のソ
リ等の変形は生じなかった。
The present inventors knead a mixture of copper powder and molybdenum powder together with an organic binder, and convert the kneaded material into a high-density, high-viscosity slurry having a thickness of 0.5 to 4 mm, preferably 1 to 1.5 mm. By extruding with a thickness, debinding and sintering, only a cold rolling is performed on a sintered body of 2.5 mm or less, and a cold rolling is performed on a sintered body of 2.5 mm or more after hot rolling. It has been found that a substrate material having no surface irregularities, chips, or wrinkles on the surface of the mounting substrate and having excellent surface roughness can be produced extremely easily and at a much lower cost than before. As shown in Table 2, the rolled plate or mounting substrate obtained by this method had a Vickers hardness of 80 Hv or more, was extremely dense, and had an elongation of 15% or more. Further, even if the deformation is caused by distortion such as heat generation, since the generation local part is elongated and absorbs the distortion, there is no deformation such as warpage that affects the IC chip mounted on the mounting substrate.

【0019】ここで、銅が40重量%未満の場合には、
焼結が不充分で圧延によっても充分緻密なものが得られ
なかった。又、銅が90重量%以上の場合には、銅その
ものの利用に比べて特性上の効果はあまり期待できず、
したがってモリブデンやタングステンを含む分だけ高価
となるだけで材料上の利点が得られないため意味がな
い。
Here, when copper is less than 40% by weight,
Sintering was insufficient and a sufficiently dense product could not be obtained by rolling. When the content of copper is 90% by weight or more, the effect on the characteristics cannot be expected much as compared with the use of copper itself.
Therefore, it is meaningless because only the material containing molybdenum and tungsten is expensive and no material advantage is obtained.

【0020】以下に、上記方法により製造された搭載基
板の特性について述べる。図4、図5、表1〜表3は、
モリブデンに対する銅の重量%を40重量%、60重量
%、90重量%、100重量%の場合に、後ほど詳細に
説明する搭載基板を製造するための一連の工程、即ち、
混合工程、焼結工程、圧延工程等における条件を統一し
た場合の種々の特性を測定した結果を示している。銅の
重量%が40重量%、60重量%、90重量%の場合に
は、いずれも、図4、図5、表1に示すように、密度に
おいては10g/cm3 以下で、ヤング率においては
4000kg/mm 2 以上で、熱伝導率においては23
0W/m・K以上となる。すなわち、この特性を有すれ
ば、熱発生があっても搭載基板に搭載される素子に影響
を及ぼす程のソリ等の変形が生じないということであ
る。
Hereinafter, characteristics of the mounting substrate manufactured by the above method will be described. 4 and 5 and Tables 1 to 3
When the weight percentage of copper with respect to molybdenum is 40% by weight, 60% by weight, 90% by weight, and 100% by weight, a series of steps for manufacturing a mounting substrate, which will be described in detail later,
It shows the results of measuring various characteristics when the conditions in the mixing step, the sintering step, the rolling step and the like are unified. When the weight% of copper is 40%, 60%, and 90% by weight, as shown in FIGS. 4, 5 and Table 1, the density is 10 g / cm 3 or less, and the Young's modulus is 1
4000 kg / mm 2 or more, and the thermal conductivity is 23
0 W / m · K or more. In other words, with this characteristic, even when heat is generated, deformation such as warpage that does not affect the elements mounted on the mounting substrate occurs.

【0021】[0021]

【表1】 [Table 1]

【0022】[0022]

【表2】 [Table 2]

【0023】[0023]

【表3】 [Table 3]

【0024】搭載基板の硬度については、表2に示すよ
うに、銅とモリブデンの混合物の場合、銅が40重量%
のときはビッカース硬度が182、銅が60重量%のと
きはビッカース硬度が132、銅が90重量%のときは
ビッカース硬度が85、銅が100重量%のときはビッ
カース硬度が50〜70となり、いずれも高い剛性を有
することがわかる。尚、ビッカース硬度とは搭載基板の
剛性の指標となるものである。
With respect to the hardness of the mounting substrate, as shown in Table 2, in the case of a mixture of copper and molybdenum, copper was 40% by weight.
When the Vickers hardness is 182, when the copper is 60% by weight, the Vickers hardness is 132, when the copper is 90% by weight, the Vickers hardness is 85, when the copper is 100% by weight, the Vickers hardness is 50 to 70, It can be seen that all have high rigidity. The Vickers hardness is an index of the rigidity of the mounting substrate.

【0025】又、搭載基板の伸びについても、表3に示
すように、銅が40重量%のときは16.1%の伸び、
銅が60重量%のときは27.1%の伸び、銅が90重
量%のときは46.5%の伸び、銅が100重量%のと
きは54%の伸びとなり、いずれも伸びが15%以上で
あり、極めて緻密であることがわかる。
As shown in Table 3, the elongation of the mounting substrate is 16.1% when copper is 40% by weight.
When the copper is 60% by weight, the elongation is 27.1%. When the copper is 90% by weight, the elongation is 46.5%. When the copper is 100% by weight, the elongation is 54%. As described above, it can be seen that it is extremely dense.

【0026】以上の特性を鑑みると、上記銅とモリブデ
ンの複合材料は、モリブデンよりも熱伝導率が高く、銅
よりも剛性があるため、車載用パワー半導体装置、いわ
ゆる熱サイクルの過酷でしかも振動のあるところに用い
られる半導体装置化すべき電気部品等への利用も期待で
きる。
In view of the above characteristics, the composite material of copper and molybdenum has a higher thermal conductivity than molybdenum and is more rigid than copper. It can also be expected to be used for electrical parts and the like to be made into semiconductor devices used in places where there is.

【0027】ここで、上記特性を得るための製造方法に
おいて特に重要な点は、所望する板厚に近い焼結素材を
高密度、高粘度のスラリーで押出して製造し、焼結後わ
ずかの圧延で仕上げる点にある。さらに、銅とモリブデ
ンの粉末に混練するバインダーには濡れ性の良いものを
選択することが重要である。銅、モリブデン混合粉末に
対して混練するバインダーとしては、種々検討した結
果、ソフトワックスに非イオン性界面活性剤を加えたバ
インダー(有機バインダー)が最適であることが認めら
れた。ソフトワックスに非イオン性界面活性剤を加えた
バインダーを用いて銅モリブデン粉末に混練した結果、
所望の焼結素材(グリーン体)を得ることができた。
Here, a particularly important point in the manufacturing method for obtaining the above characteristics is that a sintered material having a thickness close to a desired plate thickness is extruded with a high-density, high-viscosity slurry, and is slightly rolled after sintering. The point is to finish with. Further, it is important to select a binder having good wettability as a binder to be kneaded with copper and molybdenum powder. As a result of various investigations, as a binder to be kneaded with the copper and molybdenum mixed powder, it was found that a binder (organic binder) obtained by adding a nonionic surfactant to soft wax was optimal. As a result of kneading the copper molybdenum powder using a binder obtained by adding a nonionic surfactant to soft wax,
A desired sintered material (green body) was obtained.

【0028】具体的には、パラフィン系のソフトワック
スに非イオン性界面活性剤のHLB(親水性−親油性バ
ランス)の4−12の値を示すものを添加したものであ
る。この場合、パラフィン系のソフトワックスとHLB
が4〜12の値を示す非イオン性界面活性剤の両者の総
量は13wt%以下にする必要がある。このバインダー
を用いた場合、グリーン体においては割れが生じないの
で、割れずにしかも残留炭素量の少ない押出しが可能と
なった。したがって、高密度で高粘度のスラリー押出し
が可能となり、焼結素材に近い板厚の製造を可能にし
た。
Specifically, a paraffinic soft wax having a HLB (hydrophilic-lipophilic balance) value of 4-12 as a nonionic surfactant is added. In this case, paraffin soft wax and HLB
The total amount of both of the nonionic surfactants having a value of 4 to 12 needs to be 13% by weight or less. When this binder was used, no cracking occurred in the green body, so that extrusion without cracking and with a small residual carbon amount was possible. Therefore, high-density and high-viscosity slurry extrusion can be performed, and a sheet thickness close to that of a sintered material can be manufactured.

【0029】尚、HLBの値が4以下のものはベトベト
してしまい、12を越えると吸湿性が高く管理運用が困
難であることが確認されている。
It has been confirmed that those having an HLB value of 4 or less are sticky, and those having an HLB value of more than 12 have high hygroscopicity and are difficult to manage and operate.

【0030】又、セラミックの押出しでよく用いられる
メチルセルロース/プロピレングリコール/水の系のバ
インダーでは、工業生産上は機器の安全上有利であり、
押出し可能な条件ではあるものの、前記メチルセルロー
スが溶解しにくいため、乾燥・脱バインダーの安定性が
得られにくい。
A methylcellulose / propylene glycol / water binder often used in ceramic extrusion is advantageous in terms of industrial production in terms of equipment safety.
Although it is possible to extrude, it is difficult to dissolve the methylcellulose, so that it is difficult to obtain stability of drying and debinding.

【0031】ここで、本発明に係る搭載基板の製造方法
について第1の実施例を説明する。粒径3μmのモリブ
デンMo粉2500gに電解銅粉1670g(銅40重
量%に相当)をボール入りアトライターにてアルコール
湿式混合を20時間実施した。次いでアルコールを脱液
・乾燥した後スクリュー式異回転双・腕型ニーダーにソ
フトワックス(融点120F)を400g、界面活性剤
エマルゲン903(市販品)15gを混ぜ10時間混練
した。その後、全量排出して、再びその混練物をニーダ
ーに装てんし、10時間混練しグリーン体を得た。その
後、前記グリーン体を1.5mmの板厚になるよう押出
し成形した。この成形体を5体積%のH2 −N2 ガス雰
囲気中で400℃で脱バインダーした後、H2 中で12
50℃で1時間焼結した。
Here, a first embodiment of the method of manufacturing a mounting board according to the present invention will be described. Alcohol wet mixing of 1670 g (corresponding to 40% by weight of copper) of electrolytic copper powder with 2500 g of molybdenum Mo powder having a particle size of 3 μm was performed for 20 hours using an attritor containing balls. Next, after removing and drying the alcohol, 400 g of soft wax (melting point: 120 F) and 15 g of surfactant Emulgen 903 (commercially available) were mixed in a screw-type rotating twin-arm kneader and kneaded for 10 hours. Thereafter, the whole amount was discharged, and the kneaded material was again loaded in a kneader and kneaded for 10 hours to obtain a green body. Thereafter, the green body was extruded to a thickness of 1.5 mm. After binder removal at 400 ° C. in the molded body 5 vol% H 2 -N 2 gas atmosphere, in H 2 12
Sintered at 50 ° C. for 1 hour.

【0032】次に、その焼結体を圧下率10%以下で冷
間圧延をし、その後900℃×15分アニールした後再
び圧下率10%以下で冷間圧延を施こし、厚さ1.0m
mの鏡面板を得た。得られた鏡面板を打抜きプレス加工
により一片25mmに切断して加工し、搭載基板を得
た。この搭載基板は、欠けがなく良好であった。この搭
載基板の面の粗さはRa0.3μmであり、密度は9.
6g/cm3 だった。物性を測定したところ、ビッカー
ス硬度178、伸び15.5%、熱膨張係数9.3×1
-6/K、熱伝導率235W/m・K、ヤング率195
00kg/mm2であった。
Next, the sintered body is cold-rolled at a rolling reduction of 10% or less, then annealed at 900 ° C. for 15 minutes, and cold-rolled again at a rolling reduction of 10% or less to obtain a thickness of 1. 0m
m was obtained. The obtained mirror-finished plate was cut into a piece of 25 mm by punching and press working to obtain a mounting substrate. This mounting substrate was good without chipping. The surface roughness of this mounting substrate is Ra 0.3 μm, and the density is 9.
It was 6 g / cm 3 . When physical properties were measured, Vickers hardness was 178, elongation was 15.5%, and thermal expansion coefficient was 9.3 × 1.
0 -6 / K, thermal conductivity 235 W / m · K, Young's modulus 195
It was 00 kg / mm 2 .

【0033】次に本発明に係る搭載基板の製造方法につ
いて第2の実施例を説明する。第1の実施例と同様の方
法で、モリブデン粉末1500g、銅粉末3500g
(銅70重量%に相当)、焼結助剤としてのニッケル
(Ni)5gを混合し、その混合物に上記バインダーを
混練し、グリーン体を得た。その後、前記グリーン体を
2.4mmの板厚になるように押出し成形した。その
後、実施例1と同様な方法で脱バインダーをし、H2
で1050℃で1時間焼結した。この焼結体を850℃
で15分間熱間圧延を施し、1.98mmの板厚にした
後、さらに冷間圧延を施し、1.86mmの板厚の鏡面
板を得た。
Next, a second embodiment of the method of manufacturing a mounting board according to the present invention will be described. In the same manner as in the first embodiment, molybdenum powder 1500 g, copper powder 3500 g
(Equivalent to 70% by weight of copper) and 5 g of nickel (Ni) as a sintering aid were mixed, and the mixture was kneaded with the binder to obtain a green body. Thereafter, the green body was extruded to a thickness of 2.4 mm. After that, the binder was removed in the same manner as in Example 1, and sintering was performed at 1050 ° C. for 1 hour in H 2 . 850 ° C
After hot rolling for 15 minutes at a thickness of 1.98 mm, cold rolling was further performed to obtain a mirror surface plate having a thickness of 1.86 mm.

【0034】次に、温間サイジング機を350℃にセッ
トして0.2mmの溝(四角)加工を施した結果、図2
に示すように、溝の段部に欠け、割れのない板厚が1.
8mmで、良好な外観の搭載基板が得られた。最終的に
はスリッターによって搭載基板の一片が100mmとな
るように切り出して仕上げた。尚、この搭載基板を含ん
だ半導体装置は図3に示すようになる。
Next, a warm sizing machine was set at 350 ° C., and 0.2 mm grooves (squares) were formed.
As shown in FIG.
At 8 mm, a mounting board having a good appearance was obtained. Finally, a piece of the mounting substrate was cut out by a slitter so as to have a length of 100 mm and finished. A semiconductor device including this mounting substrate is as shown in FIG.

【0035】この半導体モジュール用の搭載基板の特性
は密度9.3g/cm3 、ビッカース硬度125、伸び
25.0%、熱膨張係数13.8×10-6/K、熱伝導
率260W/m・K、ヤング率16000kg/mm2
であった。尚、銅とモリブデンのみの組成で板厚を1m
mにしたものについては、ビッカース硬度122、熱伝
導率300W/m・Kであった。
The characteristics of the mounting substrate for this semiconductor module are as follows: density 9.3 g / cm 3 , Vickers hardness 125, elongation 25.0%, coefficient of thermal expansion 13.8 × 10 -6 / K, thermal conductivity 260 W / m・ K, Young's modulus 16,000 kg / mm 2
Met. In addition, the thickness of the plate is 1 m with a composition of only copper and molybdenum.
m, the Vickers hardness was 122 and the thermal conductivity was 300 W / m · K.

【0036】又、実際に一片100mmの長さに対する
ソリを測ったところ20μmであり、純銅のものと比べ
て小さく良好なものであった。
When the warp was actually measured with respect to the length of one piece of 100 mm, it was 20 μm, which was smaller and better than that of pure copper.

【0037】次に本発明に係る搭載基板の製造方法につ
いて第3の実施例を説明する。第1の実施例と同様の方
法で、モリブデン粉末3000g、電解銅粉末2000
g(銅40重量%に相当)を混合し、その混合物に上記
バインダーを混練し、グリーン体を得た。その後、前記
グリーン体を2.5mmの板厚になるように押出し成形
した。その後、実施例1と同様な方法で脱バインダーを
し、H2 中で1250℃で1時間焼結した。この焼結素
材を900℃で15分間加熱した後、その焼結体を圧下
率10%以下で熱間圧延を施し、さらに加熱、圧延を繰
り返し、板厚1.0mmに仕上げた。その後、還元性雰
囲気において850℃で20分間アニールした後、冷間
圧延により厚み0.5mmの鏡面体を得た。得られた鏡
面板を打抜きプレス加工により一片25mmに切断して
加工し、搭載基板を得た。この搭載基板は、欠けがなく
良好であった。又、この搭載基板の面の粗さはRa0.
3μmであり、密度は9.6g/cm3 だった。物性を
測定したところ、ビッカース硬度182、伸び15%、
熱膨張係数9.1×10-6/K、熱伝導率230W/m
・K、ヤング率19000kg/mm2 であった。
Next, a third embodiment of the method of manufacturing a mounting board according to the present invention will be described. In the same manner as in the first embodiment, molybdenum powder 3000 g, electrolytic copper powder 2000
g (corresponding to 40% by weight of copper) was mixed, and the mixture was kneaded with the binder to obtain a green body. Thereafter, the green body was extruded to a thickness of 2.5 mm. After that, the binder was removed in the same manner as in Example 1, and sintering was performed at 1250 ° C. for 1 hour in H 2 . After heating this sintered material at 900 ° C. for 15 minutes, the sintered body was subjected to hot rolling at a rolling reduction of 10% or less, and further, repeated heating and rolling to finish to a sheet thickness of 1.0 mm. Then, after annealing at 850 ° C. for 20 minutes in a reducing atmosphere, a 0.5 mm-thick mirror body was obtained by cold rolling. The obtained mirror-finished plate was cut into a piece of 25 mm by punching and press working to obtain a mounting substrate. This mounting substrate was good without chipping. The surface roughness of the mounting substrate is Ra0.
3 μm and a density of 9.6 g / cm 3 . When physical properties were measured, Vickers hardness 182, elongation 15%,
Thermal expansion coefficient 9.1 × 10 -6 / K, thermal conductivity 230 W / m
· K, was a Young's modulus 19000kg / mm 2.

【0038】次に本発明に係る搭載基板の製造方法につ
いて第4の実施例を説明する。第1の実施例と同様の方
法で、モリブデン粉末1500g、電解銅粉末3500
g(銅70重量%に相当)を混合し、その混合物に上記
バインダーを混練し、グリーン体を得た。その後、前記
グリーン体を2.5mmの板厚になるように押出し成形
した。その後、実施例1と同様な方法で脱バインダーを
し、H2 中で1070℃で1時間焼結した。この焼結素
材を850℃で15分間加熱した後、その焼結体を圧下
率10%以下で熱間圧延を施し、さらに加熱、圧延を繰
り返し、板厚1.0mmに仕上げた。その後、還元性雰
囲気において850℃で20分間アニールした後、冷間
圧延により厚み0.5mmの鏡面体を得た。得られた鏡
面板を打抜きプレス加工により一片6mmに切断して加
工し、搭載基板を得た。この搭載基板は、欠けがなく良
好であった。又、この搭載基板の面の粗さはRa0.3
μmであり、密度は9.3g/cm3 だった。物性を測
定したところ、ビッカース硬度122、伸び28%、熱
膨張係数13.6×10-6/K、熱伝導率298W/m
・K、ヤング率15500kg/mm2 であった。
Next, a fourth embodiment of the method for manufacturing a mounting board according to the present invention will be described. In the same manner as in the first embodiment, molybdenum powder 1500 g, electrolytic copper powder 3500
g (corresponding to 70% by weight of copper) were mixed, and the mixture was kneaded with the binder to obtain a green body. Thereafter, the green body was extruded to a thickness of 2.5 mm. After that, the binder was removed in the same manner as in Example 1, and sintering was performed at 1070 ° C. for 1 hour in H 2 . After heating this sintered material at 850 ° C. for 15 minutes, the sintered body was subjected to hot rolling at a rolling reduction of 10% or less, and further, heating and rolling were repeated to finish to a sheet thickness of 1.0 mm. Then, after annealing at 850 ° C. for 20 minutes in a reducing atmosphere, a 0.5 mm-thick mirror body was obtained by cold rolling. The obtained mirror-finished plate was cut into 6 mm pieces by punching and pressing to obtain a mounting substrate. This mounting substrate was good without chipping. The surface roughness of the mounting substrate is Ra0.3.
μm and a density of 9.3 g / cm 3 . When the physical properties were measured, the Vickers hardness was 122, the elongation was 28%, the thermal expansion coefficient was 13.6 × 10 −6 / K, and the thermal conductivity was 298 W / m.
· K, was a Young's modulus 15500kg / mm 2.

【0039】尚、上記実施例における焼結温度の範囲
は、1000℃〜1400℃、望ましくは1050℃〜
1300℃である。これは、1000℃以下では完成品
である搭載基板の緻密化が図れず、1400℃を越える
と銅の溶出が急増し、炉内の汚染がひどくなり、上記特
性の搭載基板は得られないからである。
The range of the sintering temperature in the above embodiment is from 1000 ° C. to 1400 ° C., preferably from 1050 ° C.
1300 ° C. This is because, at 1000 ° C. or lower, the finished mounting substrate cannot be densified, and when the temperature exceeds 1400 ° C., the elution of copper rapidly increases, contamination in the furnace becomes severe, and a mounting substrate having the above characteristics cannot be obtained. It is.

【0040】又、銅とモリブデンの湿式混合する時間は
5〜40時間が望ましく、次の混練時間は1〜10時間
が望ましい。
The wet mixing time of copper and molybdenum is preferably 5 to 40 hours, and the next kneading time is preferably 1 to 10 hours.

【0041】又、上記実施例は銅粉末とモリブデン粉末
との混合によるものであるが、銅粉末とタングステン粉
末との混合によるものでも上記特性に近似した特性が得
られる。
Although the above embodiment is based on the mixing of copper powder and molybdenum powder, the characteristics similar to the above characteristics can be obtained by mixing copper powder and tungsten powder.

【0042】尚、上記実施例により得られたこの材料
は、打抜き加工が可能なため図1に示されるリード端子
3にも用いることが可能である。この場合、上記特性を
有するリード端子3は、剛性を有しているため、従来の
銅によるリード端子と比較して外部からの衝撃に対して
強い。又、搭載基板及びリード線が同質材料であるた
め、半導体モジュールの製造において、打ち抜き加工前
まで同一の工程で処理できる利点がある。
Since this material obtained in the above embodiment can be punched, it can be used also for the lead terminal 3 shown in FIG. In this case, since the lead terminal 3 having the above characteristics has rigidity, it is more resistant to an external impact than a conventional lead terminal made of copper. In addition, since the mounting substrate and the lead wires are made of the same material, there is an advantage that the semiconductor module can be processed in the same process until the punching process in the manufacture.

【0043】[0043]

【発明の効果】本発明によれば、半導体部品としての搭
載基板が、熱伝導率200W/m・K以上、密度10g
/cm3 以下、ヤング率14,000kg/mm2
上、伸びが15%以上、ビッカース硬度が80以上の特
性を有しているので、面積が非常に大きく、複数の素子
を搭載する搭載基板に高い熱が与えられてもソリ等の変
形が生じず、しかも軽量化及び低価格化を図ることがで
き、しかも加工性の向上も図ることができる。
According to the present invention, the mounting substrate as a semiconductor component has a thermal conductivity of 200 W / m · K or more and a density of 10 g.
/ Cm 3 or less, Young's modulus 14,000 kg / mm 2 or more, elongation 15% or more, Vickers hardness 80 or more. Even if high heat is applied, deformation of the warp or the like does not occur, and further, weight reduction and cost reduction can be achieved, and workability can be improved.

【0044】又、半導体部品としてのリード端子に発明
に係る製造方法によって得られた材料を用いた場合、外
部からの衝撃に対して強い剛性を有し、半導体装置の信
頼性を向上することができ、半導体装置の製造におい
て、打ち抜き加工前まで同一の工程で処理できる利点が
ある。
When a material obtained by the manufacturing method according to the present invention is used for a lead terminal as a semiconductor component, the lead terminal has high rigidity against an external impact, thereby improving the reliability of the semiconductor device. In the manufacture of a semiconductor device, there is an advantage that processing can be performed in the same process until before punching.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係る半導体装置の一実施例を示す断面
図である。
FIG. 1 is a sectional view showing one embodiment of a semiconductor device according to the present invention.

【図2】図2(a)は本発明に係る搭載基板の構造を示
す平面図であり、図2(b)は図2(a)の搭載基板の
断面図である。
FIG. 2A is a plan view showing a structure of a mounting board according to the present invention, and FIG. 2B is a cross-sectional view of the mounting board of FIG. 2A.

【図3】図2に示した搭載基板を含む半導体装置の一実
施例を示す断面図である。
FIG. 3 is a cross-sectional view illustrating one embodiment of a semiconductor device including the mounting substrate illustrated in FIG. 2;

【図4】本発明に係るの搭載基板の原料である銅の重量
%に対するその密度を表すグラフである。
FIG. 4 is a graph showing the density of copper, which is a raw material of a mounting substrate according to the present invention, with respect to% by weight.

【図5】図5(a)は、本発明に係る搭載基板の銅の重
量%に対するその熱膨脹係数を表すグラフであり、図5
(b)は、本発明に係る搭載基板の銅の重量%に対する
その熱伝導率を表したグラフである。
FIG. 5A is a graph showing the coefficient of thermal expansion of the mounting substrate according to the present invention with respect to the weight% of copper;
(B) is a graph showing the thermal conductivity of the mounting substrate according to the present invention with respect to the weight% of copper.

【図6】図6(a)は、密度及び熱伝導率から見た種々
の放熱材料を示す図であり、図6(b)は、密度及び熱
膨脹係数から見た種々の放熱材料を示す図である。
FIG. 6 (a) is a diagram showing various heat dissipation materials as viewed from density and thermal conductivity, and FIG. 6 (b) is a diagram showing various heat dissipation materials as viewed from density and thermal expansion coefficient. It is.

【符号の説明】[Explanation of symbols]

1 ICチップ 2 リード線 3 リード端子 4 絶縁材料 5 リードフレーム 6 搭載基板 DESCRIPTION OF SYMBOLS 1 IC chip 2 Lead wire 3 Lead terminal 4 Insulating material 5 Lead frame 6 Mounting board

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平4−180534(JP,A) 特開 平4−333265(JP,A) 特開 平7−153878(JP,A) 特許2717895(JP,B2) (58)調査した分野(Int.Cl.7,DB名) B22F 3/00 - 3/26 H01L 23/12 - 23/14 H01L 23/373 ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-4-180534 (JP, A) JP-A-4-333265 (JP, A) JP-A 7-153878 (JP, A) Patent 2717895 (JP, A B2) (58) Field surveyed (Int. Cl. 7 , DB name) B22F 3/00-3/26 H01L 23/12-23/14 H01L 23/373

Claims (4)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 半導体素子を搭載するための手段とし
て、モリブデン又はタングステンによる第1の金属と銅
による第2の金属とからなる半導体部品を含む半導体装
置において、前記第2の金属が40重量%以上であっ
て、前記半導体部品が、熱伝導率200W/m・K以
上、密度10g/cm3 以下、ヤング率14,000k
g/mm2 以上の特性を有し、その半導体部品に300
℃以上で温間プレス加工を施すことによって、前記半導
体部品が基板部と該基板部の板面から突出する突出部と
からなる段付き形状を呈するように形成されていること
を特徴とする半導体装置。
1. A semiconductor device including a semiconductor component comprising a first metal made of molybdenum or tungsten and a second metal made of copper as means for mounting a semiconductor element, wherein the second metal is 40% by weight. The semiconductor component has a thermal conductivity of 200 W / m · K or more, a density of 10 g / cm 3 or less, and a Young's modulus of 14,000 k.
g / mm2 or more, and 300
A semiconductor, wherein the semiconductor component is formed so as to exhibit a stepped shape composed of a substrate portion and a projecting portion projecting from a plate surface of the substrate portion by performing warm pressing at a temperature of not less than ℃. apparatus.
【請求項2】 請求項1記載の半導体装置において、前
記半導体部品は、ビッカース硬度が80以上の剛性を有
し、伸びが15%以上を併せ持つことを特徴とする半導
体装置。
2. The semiconductor device according to claim 1, wherein the semiconductor component has a Vickers hardness of 80 or more and an elongation of 15% or more.
【請求項3】 前記第1の金属と前記第2の金属とを混
合すると共に有機バインダーを混練し、押出し成形によ
り前記半導体部品用の焼結素材を得ることを特徴とする
請求項1又は2記載の半導体部品の製造方法。
3. The sintered material for a semiconductor component is obtained by mixing the first metal and the second metal, kneading an organic binder, and extrusion molding. The manufacturing method of the semiconductor component described in the above.
【請求項4】 請求項3記載の製造方法で焼結素材を製
造後、該焼結素材を焼結し、その焼結体に冷間圧延を施
すか又は熱間圧延及び冷間圧延を施すことにより製造さ
れることを特徴とする半導体部品の製造方法。
4. After producing a sintered material by the production method according to claim 3, the sintered material is sintered, and the sintered body is subjected to cold rolling or hot rolling and cold rolling. A method of manufacturing a semiconductor component, characterized by being manufactured by the above method.
JP5730694A 1994-03-16 1994-03-28 Semiconductor device and method of manufacturing semiconductor component used in the semiconductor device Expired - Fee Related JP3194118B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5730694A JP3194118B2 (en) 1994-03-16 1994-03-28 Semiconductor device and method of manufacturing semiconductor component used in the semiconductor device

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP4581994 1994-03-16
JP6-45819 1994-03-16
JP5730694A JP3194118B2 (en) 1994-03-16 1994-03-28 Semiconductor device and method of manufacturing semiconductor component used in the semiconductor device

Publications (2)

Publication Number Publication Date
JPH07307422A JPH07307422A (en) 1995-11-21
JP3194118B2 true JP3194118B2 (en) 2001-07-30

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Country Link
JP (1) JP3194118B2 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4579436B2 (en) * 2001-03-05 2010-11-10 株式会社カネカ Thin film photoelectric conversion module
JP2007223036A (en) * 2007-03-26 2007-09-06 Allied Material Corp Cu-w pipe and manufacturing method thereof, and electric discharging pipe electrode using the same and manufacturing method thereof

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